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From: aurelio remonda <aurelioremonda@gmail.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [ARM]: Adding support for Cortex-M4
Date: Thu, 7 May 2015 15:00:26 -0300	[thread overview]
Message-ID: <CAE_j2pvjB8ttHaVFeqD353YETH4dzj0VJd1VCaOUApGH9ukwRA@mail.gmail.com> (raw)
In-Reply-To: <CAE_j2puKSpCBMhsS5WvsaozQ0AprS_EFO0eHdWruJPWJW13-xQ@mail.gmail.com>

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Im replying this cause i made a mistake asking to someones private mail,
sorry:
> OK, another question. How come if Cortex-M3 doesnt support DSP
instructions
> qemu understand them? I tried some of them with an stellaris lm3s6965evb.
I
> do understand that they were implemented for the A profile cores, but not
> for M ones. Is this a bug or im missing something?

If our cortex-m3 model doesn't fault on an instruction that's not
implemented in the M3 then that's a bug, yes. If you provide more
detail we can fix it.

2015-05-05 9:52 GMT-03:00 aurelio remonda <aurelioremonda@gmail.com>:

> Hi, i would like to to add support for cortex-m4 on qemu. Most features of
> the Cortex-M3 and M4 are the same with the significant difference that
> Cortex-M4 has DSP extensions and optional FPU. Even so, i really need some
> pointers for this (im a newbie on qemu devel). I found out that qemu can
> manage dsp instructions such as ADD16, ASX, SAX, etc. and all their
> combinations with suffixes (u, s, sh, etc.), so half (if not all) of the
> work is done.
>
> How should I go about this? What's the standard procedure for adding a new
> CPU, even if it's so similar to the existing ones? That is, which are the
> relevant functions/files that I should modify, and so on.
>
> Thanks a lot!
>

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      parent reply	other threads:[~2015-05-07 18:00 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-05 12:52 [Qemu-devel] [ARM]: Adding support for Cortex-M4 aurelio remonda
2015-05-05 13:04 ` Peter Maydell
     [not found]   ` <CAE_j2pu_S=dDcm9aTh_EoTMpwV-5coPiy6O0Em7H==7h8hWueg@mail.gmail.com>
     [not found]     ` <CAFEAcA824ioMJq+3WdB3qkj9WR80M_CEeZhXzokpiHgzBjvRjQ@mail.gmail.com>
2015-05-12 12:46       ` aurelio remonda
2015-05-12 12:58         ` Peter Maydell
2015-05-26 15:29           ` aurelio remonda
2015-05-26 15:36             ` Peter Maydell
2015-05-26 17:13               ` aurelio remonda
2015-05-26 17:34                 ` Peter Maydell
2015-05-28 15:28                   ` aurelio remonda
2015-05-28 16:00                     ` Liviu Ionescu
2015-05-30 19:27                     ` Liviu Ionescu
2015-05-30 20:10                       ` Peter Crosthwaite
2015-05-30 20:54                         ` Peter Maydell
2015-05-30 20:58                           ` Peter Crosthwaite
2015-05-05 13:12 ` Liviu Ionescu
2015-05-07 18:00 ` aurelio remonda [this message]

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