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Sat, 18 Sep 2021 19:54:21 -0700 (PDT) MIME-Version: 1.0 References: <20210917093153.4067812-1-frank.chang@sifive.com> <93e9a615-94fb-3958-9560-111910668768@linaro.org> In-Reply-To: <93e9a615-94fb-3958-9560-111910668768@linaro.org> From: Frank Chang Date: Sun, 19 Sep 2021 10:54:10 +0800 Message-ID: Subject: Re: [PATCH RESEND v2] target/riscv: Set mstatus_hs.[SD|FS] bits if Clean and V=1 in mark_fs_dirty() To: Richard Henderson Content-Type: multipart/alternative; boundary="00000000000001ca2e05cc50486b" Received-SPF: pass client-ip=2607:f8b0:4864:20::d32; envelope-from=frank.chang@sifive.com; helo=mail-io1-xd32.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V" , Bin Meng , "qemu-devel@nongnu.org Developers" , Vincent Chen , Alistair Francis , Palmer Dabbelt Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --00000000000001ca2e05cc50486b Content-Type: text/plain; charset="UTF-8" On Sun, Sep 19, 2021 at 2:46 AM Richard Henderson < richard.henderson@linaro.org> wrote: > On 9/17/21 2:31 AM, frank.chang@sifive.com wrote: > > From: Frank Chang > > > > When V=1, both vsstauts.FS and HS-level sstatus.FS are in effect. > > Modifying the floating-point state when V=1 causes both fields to > > be set to 3 (Dirty). > > > > However, it's possible that HS-level sstatus.FS is Clean and VS-level > > vsstatus.FS is Dirty at the time mark_fs_dirty() is called when V=1. > > We can't early return for this case because we still need to set > > sstatus.FS to Dirty according to spec. > > > > Signed-off-by: Frank Chang > > Reviewed-by: Vincent Chen > > Tested-by: Vincent Chen > > --- > > target/riscv/cpu.h | 4 ++++ > > target/riscv/translate.c | 24 +++++++++++++++--------- > > 2 files changed, 19 insertions(+), 9 deletions(-) > > > Reviewed-by: Richard Henderson > > > static void mark_fs_dirty(DisasContext *ctx) > > { > > TCGv tmp; > > - target_ulong sd; > > + target_ulong sd = is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD; > > + > > + if (ctx->virt_enabled && ctx->mstatus_hs_fs != MSTATUS_FS) { > > + /* Remember the stage change for the rest of the TB. */ > > + ctx->mstatus_hs_fs = MSTATUS_FS; > > + > > + tmp = tcg_temp_new(); > > + tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, > mstatus_hs)); > > + tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd); > > + tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, > mstatus_hs)); > > + tcg_temp_free(tmp); > > + } > > > > if (ctx->mstatus_fs == MSTATUS_FS) { > > return; > > } > > + > > /* Remember the state change for the rest of the TB. */ > > ctx->mstatus_fs = MSTATUS_FS; > > > > tmp = tcg_temp_new(); > > - sd = is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD; > > - > > tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus)); > > tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd); > > tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus)); > > - > > - if (ctx->virt_enabled) { > > - tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, > mstatus_hs)); > > - tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd); > > - tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, > mstatus_hs)); > > - } > > tcg_temp_free(tmp); > > While it works, it would be nicer to keep these two cases as similar as > possible. > > Hi, Richard, thanks for the review. Do you mean it's better to change to code sequence to something like: static void mark_fs_dirty(DisasContext *ctx) { ..... if (ctx->virt_enabled && ctx->mstatus_hs_fs != MSTATUS_FS) { /* Remember the stage change for the rest of the TB. */ ctx->mstatus_hs_fs = MSTATUS_FS; ..... } if (ctx->mstatus_fs != MSTATUS_FS) { /* Remember the state change for the rest of the TB. */ ctx->mstatus_fs = MSTATUS_FS; ..... } } If so, I can update and send out the v3 patch. Regards, Frank Chang > > r~ > --00000000000001ca2e05cc50486b Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
On Sun, Sep 19, 2021 at 2:46 AM Richard H= enderson <richard.hender= son@linaro.org> wrote:
On 9/17/21 2:31 AM, frank.chang@sifive.com wr= ote:
> From: Frank Chang <frank.chang@sifive.com>
>
> When V=3D1, both vsstauts.FS and HS-level sstatus.FS are in effect. > Modifying the floating-point state when V=3D1 causes both fields to > be set to 3 (Dirty).
>
> However, it's possible that HS-level sstatus.FS is Clean and VS-le= vel
> vsstatus.FS is Dirty at the time mark_fs_dirty() is called when V=3D1.=
> We can't early return for this case because we still need to set > sstatus.FS to Dirty according to spec.
>
> Signed-off-by: Frank Chang <frank.chang@sifive.com>
> Reviewed-by: Vincent Chen <vincent.chen@sifive.com>
> Tested-by: Vincent Chen <vincent.chen@sifive.com>
> ---
>=C2=A0 =C2=A0target/riscv/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0|=C2=A0 4 +++= +
>=C2=A0 =C2=A0target/riscv/translate.c | 24 +++++++++++++++---------
>=C2=A0 =C2=A02 files changed, 19 insertions(+), 9 deletions(-)


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

>=C2=A0 =C2=A0static void mark_fs_dirty(DisasContext *ctx)
>=C2=A0 =C2=A0{
>=C2=A0 =C2=A0 =C2=A0 =C2=A0TCGv tmp;
> -=C2=A0 =C2=A0 target_ulong sd;
> +=C2=A0 =C2=A0 target_ulong sd =3D is_32bit(ctx) ? MSTATUS32_SD : MSTA= TUS64_SD;
> +
> +=C2=A0 =C2=A0 if (ctx->virt_enabled && ctx->mstatus_hs_= fs !=3D MSTATUS_FS) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Remember the stage change for the rest= of the TB. */
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 ctx->mstatus_hs_fs =3D MSTATUS_FS;
> +
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 tmp =3D tcg_temp_new();
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUR= ISCVState, mstatus_hs));
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd)= ;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 tcg_gen_st_tl(tmp, cpu_env, offsetof(CPUR= ISCVState, mstatus_hs));
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 tcg_temp_free(tmp);
> +=C2=A0 =C2=A0 }
>=C2=A0 =C2=A0
>=C2=A0 =C2=A0 =C2=A0 =C2=A0if (ctx->mstatus_fs =3D=3D MSTATUS_FS) {<= br> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return;
>=C2=A0 =C2=A0 =C2=A0 =C2=A0}
> +
>=C2=A0 =C2=A0 =C2=A0 =C2=A0/* Remember the state change for the rest of= the TB.=C2=A0 */
>=C2=A0 =C2=A0 =C2=A0 =C2=A0ctx->mstatus_fs =3D MSTATUS_FS;
>=C2=A0 =C2=A0
>=C2=A0 =C2=A0 =C2=A0 =C2=A0tmp =3D tcg_temp_new();
> -=C2=A0 =C2=A0 sd =3D is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD;
> -
>=C2=A0 =C2=A0 =C2=A0 =C2=A0tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISC= VState, mstatus));
>=C2=A0 =C2=A0 =C2=A0 =C2=A0tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd); >=C2=A0 =C2=A0 =C2=A0 =C2=A0tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISC= VState, mstatus));
> -
> -=C2=A0 =C2=A0 if (ctx->virt_enabled) {
> -=C2=A0 =C2=A0 =C2=A0 =C2=A0 tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPUR= ISCVState, mstatus_hs));
> -=C2=A0 =C2=A0 =C2=A0 =C2=A0 tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd)= ;
> -=C2=A0 =C2=A0 =C2=A0 =C2=A0 tcg_gen_st_tl(tmp, cpu_env, offsetof(CPUR= ISCVState, mstatus_hs));
> -=C2=A0 =C2=A0 }
>=C2=A0 =C2=A0 =C2=A0 =C2=A0tcg_temp_free(tmp);

While it works, it would be nicer to keep these two cases as similar as pos= sible.


Hi, Richard, thanks for the review.

Do you mean it's better to change to code sequen= ce to something like:

static void mark_fs_dirty(Di= sasContext *ctx)
{
=C2=A0 =C2=A0 .....
=C2=A0 =C2=A0 if (ctx->virt_enabled && ctx->msta= tus_hs_fs !=3D MSTATUS_FS) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Remember the= stage change for the rest of the TB. */
=C2=A0 =C2=A0 =C2=A0 =C2=A0 ctx= ->mstatus_hs_fs =3D MSTATUS_FS;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 .....
=
=C2=A0 =C2=A0 }

=C2=A0 =C2=A0 if (ctx-&= gt;mstatus_fs !=3D MSTATUS_FS) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0/* Remember the state change for the rest of the TB.=C2=A0 */
=C2= =A0 =C2=A0 =C2=A0 =C2=A0 ctx->mstatus_fs =3D MSTATUS_FS;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 .....
=C2=A0 =C2=A0 =C2=A0}
}

If so, I can upda= te and send out the v3 patch.

Regards,
Frank Chan= g
=C2=A0

r~
--00000000000001ca2e05cc50486b--