From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41970) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0JlU-0000EB-0N for qemu-devel@nongnu.org; Thu, 26 Jun 2014 20:11:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X0JlO-00079E-Q5 for qemu-devel@nongnu.org; Thu, 26 Jun 2014 20:11:39 -0400 Received: from mail-vc0-f180.google.com ([209.85.220.180]:42132) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0JlO-000794-NS for qemu-devel@nongnu.org; Thu, 26 Jun 2014 20:11:34 -0400 Received: by mail-vc0-f180.google.com with SMTP id im17so4387519vcb.11 for ; Thu, 26 Jun 2014 17:11:34 -0700 (PDT) MIME-Version: 1.0 Sender: peter.crosthwaite@petalogix.com In-Reply-To: <22b9e550138022caa0368f12c12c55f1675420a5.1403588925.git.alistair.francis@xilinx.com> References: <22b9e550138022caa0368f12c12c55f1675420a5.1403588925.git.alistair.francis@xilinx.com> Date: Fri, 27 Jun 2014 10:11:33 +1000 Message-ID: From: Peter Crosthwaite Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v1 1/1] char: cadence_uart: Convert to realize() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis , Peter Maydell Cc: "qemu-devel@nongnu.org Developers" , =?UTF-8?Q?Andreas_F=C3=A4rber?= On Tue, Jun 24, 2014 at 4:06 PM, Alistair Francis wrote: > SysBusDevice::init is deprecated. Convert to Object::init and > Device::realize as prescribed by QOM conventions. > > Signed-off-by: Alistair Francis Reviewed-by: Peter Crosthwaite CC Peter for target-arm. Regards, Peter > --- > > hw/char/cadence_uart.c | 29 ++++++++++++++++------------- > 1 files changed, 16 insertions(+), 13 deletions(-) > > diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c > index bf0c853..5a22a72 100644 > --- a/hw/char/cadence_uart.c > +++ b/hw/char/cadence_uart.c > @@ -468,27 +468,30 @@ static void cadence_uart_reset(DeviceState *dev) > uart_update_status(s); > } > > -static int cadence_uart_init(SysBusDevice *dev) > +static void candence_uart_realize(DeviceState *dev, Error **errp) > { > UartState *s = CADENCE_UART(dev); > > - memory_region_init_io(&s->iomem, OBJECT(s), &uart_ops, s, "uart", 0x1000); > - sysbus_init_mmio(dev, &s->iomem); > - sysbus_init_irq(dev, &s->irq); > - > - s->fifo_trigger_handle = timer_new_ns(QEMU_CLOCK_VIRTUAL, > - (QEMUTimerCB *)fifo_trigger_update, s); > - > - s->char_tx_time = (get_ticks_per_sec() / 9600) * 10; > - > s->chr = qemu_char_get_next_serial(); > > if (s->chr) { > qemu_chr_add_handlers(s->chr, uart_can_receive, uart_receive, > uart_event, s); > } > +} > > - return 0; > +static void cadence_uart_init(Object *obj) > +{ > + UartState *s = CADENCE_UART(obj); > + > + memory_region_init_io(&s->iomem, obj, &uart_ops, s, "uart", 0x1000); > + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem); > + sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq); > + > + s->fifo_trigger_handle = timer_new_ns(QEMU_CLOCK_VIRTUAL, > + (QEMUTimerCB *)fifo_trigger_update, s); > + > + s->char_tx_time = (get_ticks_per_sec() / 9600) * 10; > } > > static int cadence_uart_post_load(void *opaque, int version_id) > @@ -520,9 +523,8 @@ static const VMStateDescription vmstate_cadence_uart = { > static void cadence_uart_class_init(ObjectClass *klass, void *data) > { > DeviceClass *dc = DEVICE_CLASS(klass); > - SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); > > - sdc->init = cadence_uart_init; > + dc->realize = candence_uart_realize; > dc->vmsd = &vmstate_cadence_uart; > dc->reset = cadence_uart_reset; > } > @@ -531,6 +533,7 @@ static const TypeInfo cadence_uart_info = { > .name = TYPE_CADENCE_UART, > .parent = TYPE_SYS_BUS_DEVICE, > .instance_size = sizeof(UartState), > + .instance_init = cadence_uart_init, > .class_init = cadence_uart_class_init, > }; > > -- > 1.7.1 > >