From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35957) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X080E-0004s5-OU for qemu-devel@nongnu.org; Thu, 26 Jun 2014 07:38:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X0809-0006la-Hg for qemu-devel@nongnu.org; Thu, 26 Jun 2014 07:38:06 -0400 Received: from mail-vc0-f182.google.com ([209.85.220.182]:57093) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0809-0006lR-ER for qemu-devel@nongnu.org; Thu, 26 Jun 2014 07:38:01 -0400 Received: by mail-vc0-f182.google.com with SMTP id il7so3329518vcb.41 for ; Thu, 26 Jun 2014 04:38:00 -0700 (PDT) MIME-Version: 1.0 Sender: peter.crosthwaite@petalogix.com In-Reply-To: References: Date: Thu, 26 Jun 2014 21:38:00 +1000 Message-ID: From: Peter Crosthwaite Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v2 5/7] target-arm: Remove old code and replace with new functions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis Cc: Peter Maydell , "qemu-devel@nongnu.org Developers" , Christopher Covington On Thu, Jun 26, 2014 at 3:02 PM, Alistair Francis wrote: > Remove the old PMCCNTR code and replace it with calls to the new > pmccntr_sync() function and the CCNT_ENABLED macro arm_ccnt_enabled() function. > > Signed-off-by: Alistair Francis > --- > > target-arm/helper.c | 27 ++++----------------------- > 1 files changed, 4 insertions(+), 23 deletions(-) > > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 016fe47..0bd00cb 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -609,20 +609,7 @@ void pmccntr_sync(CPUARMState *env) > static void pmcr_write(CPUARMState *env, const ARMCPRegInfo *ri, > uint64_t value) > { > - uint64_t temp_ticks; > - > - temp_ticks = muldiv64(qemu_clock_get_us(QEMU_CLOCK_VIRTUAL), > - get_ticks_per_sec(), 1000000); > - > - if (env->cp15.c9_pmcr & PMCRE) { > - /* If the counter is enabled */ > - if (env->cp15.c9_pmcr & PMCRD) { > - /* Increment once every 64 processor clock cycles */ > - env->cp15.c15_ccnt = (temp_ticks/64) - env->cp15.c15_ccnt; > - } else { > - env->cp15.c15_ccnt = temp_ticks - env->cp15.c15_ccnt; > - } > - } > + pmccntr_sync(env); > > if (value & PMCRC) { > /* The counter has been reset */ > @@ -633,20 +620,14 @@ static void pmcr_write(CPUARMState *env, const ARMCPRegInfo *ri, > env->cp15.c9_pmcr &= ~0x39; > env->cp15.c9_pmcr |= (value & 0x39); > > - if (env->cp15.c9_pmcr & PMCRE) { > - if (env->cp15.c9_pmcr & PMCRD) { > - /* Increment once every 64 processor clock cycles */ > - temp_ticks /= 64; > - } > - env->cp15.c15_ccnt = temp_ticks - env->cp15.c15_ccnt; > - } > + pmccntr_sync(env); > } > > static uint64_t pmccntr_read(CPUARMState *env, const ARMCPRegInfo *ri) > { > uint64_t total_ticks; > > - if (!(env->cp15.c9_pmcr & PMCRE)) { > + if (!arm_ccnt_enabled(env)) { > /* Counter is disabled, do not change value */ > return env->cp15.c15_ccnt; > } > @@ -666,7 +647,7 @@ static void pmccntr_write(CPUARMState *env, const ARMCPRegInfo *ri, > { > uint64_t total_ticks; > > - if (!(env->cp15.c9_pmcr & PMCRE)) { > + if (!arm_ccnt_enabled(env)) { Is it valid to write to the running counter? If so you can sync(), update sync() to implement easily now and drop the if. Regards, Peter > /* Counter is disabled, set the absolute value */ > env->cp15.c15_ccnt = value; > return; > -- > 1.7.1 > >