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From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <rth@twiddle.net>
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Kirill Batuzov" <batuzovk@ispras.ru>,
	maria.klimushenkova@ispras.ru,
	"Pavel Dovgalyuk" <Pavel.Dovgaluk@ispras.ru>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Денис Дмитриев" <zealot351@gmail.com>,
	"Leon Alrae" <leon.alrae@imgtec.com>
Subject: Re: [Qemu-devel] [PATCH] arm: fix TB alignment check
Date: Thu, 23 Oct 2014 17:25:22 +0100	[thread overview]
Message-ID: <CAFEAcA--ZGExNsKAK7Cp8rU_fViECuROQnqR8XzK=0CGsQudhg@mail.gmail.com> (raw)
In-Reply-To: <5449299B.9070902@twiddle.net>

On 23 October 2014 17:15, Richard Henderson <rth@twiddle.net> wrote:
> [1] Why 32 when the maximum insn size is more like 15 bytes, I don't know.  But
> it likely doesn't matter since I'd expect such large TB's to fill up the opcode
> buffer first.  There would have to be a lot of nops on that page.

Do we actually correctly GPF if the guest hands us an instruction
with a huge long set of prefix bytes? I can't see anything obviously
in the code that catches this case...

-- PMM

  reply	other threads:[~2014-10-23 16:25 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-21 12:14 [Qemu-devel] [PATCH] arm: fix TB alignment check Pavel Dovgalyuk
2014-10-23 13:18 ` Peter Maydell
2014-10-23 13:42 ` Laurent Desnogues
2014-10-23 16:15 ` Richard Henderson
2014-10-23 16:25   ` Peter Maydell [this message]
2014-10-23 16:33     ` Richard Henderson
2014-10-24  5:24   ` Pavel Dovgaluk
2014-10-24 16:08   ` Leon Alrae
2015-09-19 10:00 ` Peter Maydell

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