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From: Peter Maydell <peter.maydell@linaro.org>
Date: Mon, 4 Jul 2016 13:11:26 +0100
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Subject: Re: [Qemu-devel] [PATCH v5 9/9] tests: add a m25p80 test
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To: =?UTF-8?Q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>
Cc: "mar.krzeminski" <mar.krzeminski@gmail.com>, Peter Crosthwaite <crosthwaite.peter@gmail.com>, Kevin Wolf <kwolf@redhat.com>, Andrew Jeffery <andrew@aj.id.au>, QEMU Developers <qemu-devel@nongnu.org>, Markus Armbruster <armbru@redhat.com>, qemu-arm <qemu-arm@nongnu.org>

On 4 July 2016 at 13:01, C=C3=A9dric Le Goater <clg@kaod.org> wrote:
> On 07/04/2016 01:14 PM, Peter Maydell wrote:
>> What is the test actually supposed to be doing?
>> writel() says "write this 32 bit value as if the (guest) CPU
>> wrote it to memory with a 32-bit write instruction".
>
> The test (and the guest) is writing and reading data on the memory
> region used by the SPI controller. This 'data' is then passed on
> to the SPI flash module objects which expects BE order when there
> are flash storage addresses are in the flow.
>
> So I think the test needs to use mem{write,read} and not write*.
> The result looks correct in the code. I will send a patchset
> right after starting with this patch.

If you were writing this test in a bit of native ARM code
running in the guest, how would you write it?
memread/memwrite are only the correct answer if you'd write
the native arm code as something like
memcpy(SPI_REGISTER, buf, len), which is not generally the
way you talk to devices.

thanks
-- PMM