From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v2 24/27] target/arm: Add PAuth system registers
Date: Mon, 7 Jan 2019 14:17:24 +0000 [thread overview]
Message-ID: <CAFEAcA-2qftWAs8f0pdTOdvGyNSyYnJVGAsUEke6P3ZFEAyhdA@mail.gmail.com> (raw)
In-Reply-To: <20181214052410.11863-25-richard.henderson@linaro.org>
On Fri, 14 Dec 2018 at 05:24, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/arm/helper.c | 70 +++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 70 insertions(+)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index b9ffc07fbc..f1e9254c9a 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -5061,6 +5061,70 @@ static CPAccessResult access_lor_other(CPUARMState *env,
> return access_lor_ns(env);
> }
>
> +#ifdef TARGET_AARCH64
> +static CPAccessResult access_pauth(CPUARMState *env, const ARMCPRegInfo *ri,
> + bool isread)
> +{
> + int el = arm_current_el(env);
> +
> + if (el < 2 &&
> + arm_feature(env, ARM_FEATURE_EL2) &&
> + !(arm_hcr_el2_eff(env) & HCR_APK)) {
> + return CP_ACCESS_TRAP_EL2;
> + }
> + if (el < 3 &&
> + arm_feature(env, ARM_FEATURE_EL3) &&
> + !(env->cp15.scr_el3 & SCR_APK)) {
> + return CP_ACCESS_TRAP_EL3;
> + }
> + return CP_ACCESS_OK;
> +}
> +
> +static const ARMCPRegInfo pauth_reginfo[] = {
> + { .name = "APDAKEYLOW_EL1", .state = ARM_CP_STATE_AA64,
The Arm ARM uses "LO" in these register names, not "LOW".
> + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 2, .opc2 = 0,
> + .access = PL1_RW, .accessfn = access_pauth,
> + .fieldoffset = offsetof(CPUARMState, apda_key.lo) },
> + { .name = "APDAKEYHI_EL1", .state = ARM_CP_STATE_AA64,
> + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 2, .opc2 = 1,
> + .access = PL1_RW, .accessfn = access_pauth,
> + .fieldoffset = offsetof(CPUARMState, apda_key.hi) },
> + { .name = "APDBKEYLOW_EL1", .state = ARM_CP_STATE_AA64,
> + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 2, .opc2 = 2,
> + .access = PL1_RW, .accessfn = access_pauth,
> + .fieldoffset = offsetof(CPUARMState, apdb_key.lo) },
> + { .name = "APDBKEYHI_EL1", .state = ARM_CP_STATE_AA64,
> + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 2, .opc2 = 3,
> + .access = PL1_RW, .accessfn = access_pauth,
> + .fieldoffset = offsetof(CPUARMState, apdb_key.hi) },
> + { .name = "APGAKEYLOW_EL1", .state = ARM_CP_STATE_AA64,
> + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 3, .opc2 = 0,
> + .access = PL1_RW, .accessfn = access_pauth,
> + .fieldoffset = offsetof(CPUARMState, apia_key.lo) },
Isn't this referring to the wrong field? Same with the HI version.
> + { .name = "APGAKEYHI_EL1", .state = ARM_CP_STATE_AA64,
> + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 3, .opc2 = 1,
> + .access = PL1_RW, .accessfn = access_pauth,
> + .fieldoffset = offsetof(CPUARMState, apia_key.hi) },
> + { .name = "APIAKEYLOW_EL1", .state = ARM_CP_STATE_AA64,
> + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 1, .opc2 = 0,
> + .access = PL1_RW, .accessfn = access_pauth,
> + .fieldoffset = offsetof(CPUARMState, apia_key.lo) },
> + { .name = "APIAKEYHI_EL1", .state = ARM_CP_STATE_AA64,
> + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 1, .opc2 = 1,
> + .access = PL1_RW, .accessfn = access_pauth,
> + .fieldoffset = offsetof(CPUARMState, apia_key.hi) },
> + { .name = "APIBKEYLOW_EL1", .state = ARM_CP_STATE_AA64,
> + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 1, .opc2 = 2,
> + .access = PL1_RW, .accessfn = access_pauth,
> + .fieldoffset = offsetof(CPUARMState, apib_key.lo) },
> + { .name = "APIBKEYHI_EL1", .state = ARM_CP_STATE_AA64,
> + .opc0 = 3, .opc1 = 0, .crn = 2, .crm = 1, .opc2 = 3,
> + .access = PL1_RW, .accessfn = access_pauth,
> + .fieldoffset = offsetof(CPUARMState, apib_key.hi) },
> + REGINFO_SENTINEL
> +};
> +#endif
Otherwise
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
next prev parent reply other threads:[~2019-01-07 14:17 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-14 5:23 [Qemu-devel] [PATCH v2 00/27] target/arm: Implement ARMv8.3-PAuth Richard Henderson
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 01/27] target/arm: Add state for the ARMv8.3-PAuth extension Richard Henderson
2019-01-04 16:25 ` Peter Maydell
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 02/27] target/arm: Add SCTLR bits through ARMv8.5 Richard Henderson
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 03/27] target/arm: Add PAuth active bit to tbflags Richard Henderson
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 04/27] target/arm: Add PAuth helpers Richard Henderson
2019-01-04 16:25 ` Peter Maydell
2019-01-08 2:32 ` Richard Henderson
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 05/27] target/arm: Decode PAuth within system hint space Richard Henderson
2019-01-04 16:50 ` Peter Maydell
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 06/27] target/arm: Rearrange decode in disas_data_proc_1src Richard Henderson
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 07/27] target/arm: Decode PAuth within disas_data_proc_1src Richard Henderson
2019-01-04 17:00 ` Peter Maydell
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 08/27] target/arm: Decode PAuth within disas_data_proc_2src Richard Henderson
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 09/27] target/arm: Move helper_exception_return to helper-a64.c Richard Henderson
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 10/27] target/arm: Add new_pc argument to helper_exception_return Richard Henderson
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 11/27] target/arm: Rearrange decode in disas_uncond_b_reg Richard Henderson
2019-01-04 17:05 ` Peter Maydell
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 12/27] target/arm: Decode PAuth within disas_uncond_b_reg Richard Henderson
2019-01-04 17:12 ` Peter Maydell
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 13/27] target/arm: Decode Load/store register (pac) Richard Henderson
2019-01-04 18:52 ` Peter Maydell
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 14/27] target/arm: Move cpu_mmu_index out of line Richard Henderson
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 15/27] target/arm: Introduce arm_mmu_idx Richard Henderson
2018-12-14 5:23 ` [Qemu-devel] [PATCH v2 16/27] target/arm: Introduce arm_stage1_mmu_idx Richard Henderson
2019-01-04 18:58 ` Peter Maydell
2018-12-14 5:24 ` [Qemu-devel] [PATCH v2 17/27] target/arm: Create ARMVAParameters and helpers Richard Henderson
2019-01-07 11:40 ` Peter Maydell
2018-12-14 5:24 ` [Qemu-devel] [PATCH v2 18/27] target/arm: Reuse aa64_va_parameters for setting tbflags Richard Henderson
2019-01-07 11:44 ` Peter Maydell
2018-12-14 5:24 ` [Qemu-devel] [PATCH v2 19/27] target/arm: Export aa64_va_parameters to internals.h Richard Henderson
2019-01-07 11:45 ` Peter Maydell
2019-01-07 22:22 ` Richard Henderson
2018-12-14 5:24 ` [Qemu-devel] [PATCH v2 20/27] target/arm: Implement pauth_strip Richard Henderson
2019-01-07 11:52 ` Peter Maydell
2018-12-14 5:24 ` [Qemu-devel] [PATCH v2 21/27] target/arm: Implement pauth_auth Richard Henderson
2019-01-07 11:58 ` Peter Maydell
2018-12-14 5:24 ` [Qemu-devel] [PATCH v2 22/27] target/arm: Implement pauth_addpac Richard Henderson
2019-01-07 13:31 ` Peter Maydell
2019-01-08 4:48 ` Richard Henderson
2018-12-14 5:24 ` [Qemu-devel] [PATCH v2 23/27] target/arm: Implement pauth_computepac Richard Henderson
2019-01-07 14:09 ` Peter Maydell
2019-01-08 5:00 ` Richard Henderson
2018-12-14 5:24 ` [Qemu-devel] [PATCH v2 24/27] target/arm: Add PAuth system registers Richard Henderson
2019-01-07 14:17 ` Peter Maydell [this message]
2018-12-14 5:24 ` [Qemu-devel] [PATCH v2 25/27] target/arm: Enable PAuth for -cpu max Richard Henderson
2019-01-07 14:18 ` Peter Maydell
2018-12-14 5:24 ` [Qemu-devel] [PATCH v2 26/27] target/arm: Enable PAuth for user-only, part 2 Richard Henderson
2019-01-07 14:23 ` Peter Maydell
2018-12-14 5:24 ` [Qemu-devel] [PATCH v2 27/27] target/arm: Tidy TBI handling in gen_a64_set_pc Richard Henderson
2019-01-07 14:34 ` Peter Maydell
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