From: Peter Maydell <peter.maydell@linaro.org>
To: Auger Eric <eric.auger@redhat.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
Shannon Zhao <shannon.zhaosl@gmail.com>,
qemu-arm <qemu-arm@nongnu.org>, Zenghui Yu <yuzenghui@huawei.com>,
wanghaibin.wang@huawei.com,
Prem Mallappa <prem.mallappa@broadcom.com>
Subject: Re: [PATCH] hw/arm/virt-acpi-build: Fix GSIV values of the {GERR, Sync} interrupts
Date: Tue, 6 Apr 2021 10:44:52 +0000 [thread overview]
Message-ID: <CAFEAcA-87+rOJa6kBZU2J2ACO07h1DDZe6MTcBCUrx_Zwp3UHg@mail.gmail.com> (raw)
In-Reply-To: <7f42bc9f-3fb8-d24d-d9e4-9b93784504a6@redhat.com>
On Tue, 6 Apr 2021 at 11:10, Auger Eric <eric.auger@redhat.com> wrote:
>
> Hi Zenghui,
>
> On 4/2/21 10:47 AM, Zenghui Yu wrote:
> > The GSIV values in SMMUv3 IORT node are not correct as they don't match
> > the SMMUIrq enumeration, which describes the IRQ<->PIN mapping used by
> > our emulated vSMMU.
> >
> > Fixes: a703b4f6c1ee ("hw/arm/virt-acpi-build: Add smmuv3 node in IORT table")
> > Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
> Acked-by: Eric Auger <eric.auger@redhat.com>
Eric, when you send an acked-by tag do you mean to say that you've
reviewed the patch, or merely that you think it's basically the
right thing but you haven't actually looked at the details?
(I ask because if the former I can just put this in target-arm.next,
but if the latter then I need to dig out the SMMU spec and review
the patch myself :-))
thanks
-- PMM
next prev parent reply other threads:[~2021-04-06 10:48 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-02 8:47 [PATCH] hw/arm/virt-acpi-build: Fix GSIV values of the {GERR, Sync} interrupts Zenghui Yu
2021-04-06 10:10 ` Auger Eric
2021-04-06 10:44 ` Peter Maydell [this message]
2021-04-06 12:22 ` Auger Eric
2021-04-06 12:31 ` Peter Maydell
2021-04-06 12:37 ` Auger Eric
2021-04-08 9:34 ` Peter Maydell
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