From: Peter Maydell <peter.maydell@linaro.org>
To: Maxim Uvarov <maxim.uvarov@linaro.org>
Cc: "Andrew Jones" <drjones@redhat.com>,
"Jose Marinho" <Jose.Marinho@arm.com>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
tf-a@lists.trustedfirmware.org, qemu-arm <qemu-arm@nongnu.org>
Subject: Re: [PATCHv7 3/3] arm-virt: add secure pl061 for reset/power down
Date: Tue, 19 Jan 2021 14:12:35 +0000 [thread overview]
Message-ID: <CAFEAcA-9NR4JtE_heC6N1tX9bd7zAxXgke4APyv81df0nBr2_A@mail.gmail.com> (raw)
In-Reply-To: <CAD8XO3YjP8RUDd2T6+VwfnnCm4fk-i6x5DbmtOHF553yxt9Jtw@mail.gmail.com>
On Tue, 19 Jan 2021 at 13:47, Maxim Uvarov <maxim.uvarov@linaro.org> wrote:
>
> On Tue, 19 Jan 2021 at 16:07, Peter Maydell <peter.maydell@linaro.org> wrote:
> >
> > On Fri, 15 Jan 2021 at 10:11, Maxim Uvarov <maxim.uvarov@linaro.org> wrote:
> > Remind me why we start with GPIO line number 3 and not 0 ?
> >
>
> Original gpio power key use 3 and 4 (non-secure). I just selected the
> same to be consistent.
Those are different GPIO lines on a different PL061 doing a
different job. I don't think they need to be the same number.
The power keys are on 3 and 4 because pins 0, 1 and 2 were
reserved for PCI hotplug, CPU hotplug and memory hotplug.
Unless you have some similar reason why you need to reserve
pins on the secure PL061, I would just start from 0.
> > > + qemu_fdt_add_subnode(vms->fdt, "/gpio-pwr");
> > > + qemu_fdt_setprop_string(vms->fdt, "/gpio-pwr", "compatible", "gpio-pwr");
> > > + qemu_fdt_setprop_cell(vms->fdt, "/gpio-pwr", "#size-cells", 0);
> > > + qemu_fdt_setprop_cell(vms->fdt, "/gpio-pwr", "#address-cells", 1);
> > > +
> > > + qemu_fdt_add_subnode(vms->fdt, "/gpio-pwr/poweroff");
> > > + qemu_fdt_setprop_string(vms->fdt, "/gpio-pwr/poweroff",
> > > + "label", "GPIO PWR Poweroff");
> > > + qemu_fdt_setprop_cell(vms->fdt, "/gpio-pwr/poweroff", "code",
> > > + ATF_GPIO_POWEROFF);
> > > + qemu_fdt_setprop_cells(vms->fdt, "/gpio-pwr/poweroff",
> > > + "gpios", phandle, 3, 0);
> > > +
> > > + qemu_fdt_add_subnode(vms->fdt, "/gpio-pwr/reboot");
> > > + qemu_fdt_setprop_string(vms->fdt, "/gpio-pwr/reboot",
> > > + "label", "GPIO PWR Reboot");
> > > + qemu_fdt_setprop_cell(vms->fdt, "/gpio-pwr/reboot", "code",
> > > + ATF_GPIO_REBOOT);
> > > + qemu_fdt_setprop_cells(vms->fdt, "/gpio-pwr/reboot",
> > > + "gpios", phandle, 3, 0);
> >
> > There doesn't seem to be any documented 'gpio-pwr' devicetree
> > binding. Where does this come from ?
> >
> gpio-pwr created from the first patch. There are no bindings yet.
You can't use bindings you've just made up -- you have to get them
accepted into the kernel's official devicetree documentation if
the ones already there aren't sufficient, before you can add
code to QEMU that generates them.
> > I think the bindings you want to be using are
> > https://www.kernel.org/doc/Documentation/devicetree/bindings/power/reset/gpio-restart.txt
> > https://www.kernel.org/doc/Documentation/devicetree/bindings/power/reset/gpio-poweroff.txt
> >
> These handles are from 'secure memory' where linux does not have
> access. But I think we can use that
> binding with other compatible. Like compatible = "gpio-poweroff,secure".
That's not how you specify that a node is only relevant to the
secure world: you set the 'status' property to 'disabled'
and the 'secure-status' property to 'okay':
https://www.kernel.org/doc/Documentation/devicetree/bindings/arm/secure.txt
thanks
-- PMM
prev parent reply other threads:[~2021-01-19 14:13 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-15 10:11 [PATCHv7 0/3] arm-virt: add secure pl061 for reset/power down Maxim Uvarov
2021-01-15 10:11 ` [PATCHv7 1/3] hw: gpio: implement gpio-pwr driver for qemu reset/poweroff Maxim Uvarov
2021-01-19 11:36 ` Peter Maydell
2021-01-15 10:11 ` [PATCHv7 2/3] arm-virt: refactor gpios creation Maxim Uvarov
2021-01-19 11:39 ` Peter Maydell
2021-01-15 10:11 ` [PATCHv7 3/3] arm-virt: add secure pl061 for reset/power down Maxim Uvarov
2021-01-19 13:07 ` Peter Maydell
2021-01-19 13:47 ` Maxim Uvarov
2021-01-19 14:12 ` Peter Maydell [this message]
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