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From: Peter Maydell <peter.maydell@linaro.org>
Date: Mon, 14 Oct 2013 16:43:11 +0100
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Content-Type: text/plain; charset=UTF-8
Subject: Re: [Qemu-devel] [RFC PATCH v2 4/6] arm_gic: Support
	setting/getting binary point reg
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To: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Patch Tracking <patches@linaro.org>, QEMU Developers <qemu-devel@nongnu.org>, "kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>

On 26 September 2013 22:03, Christoffer Dall
<christoffer.dall@linaro.org> wrote:
> @@ -606,10 +607,13 @@ static void gic_cpu_write(GICState *s, int cpu, int offset, uint32_t value)
>          s->priority_mask[cpu] = (value & 0xff);
>          break;
>      case 0x08: /* Binary Point */
> -        /* ??? Not implemented.  */
> +        s->bpr[cpu] = (value & 0x7);
>          break;
>      case 0x10: /* End Of Interrupt */
>          return gic_complete_irq(s, cpu, value & 0x3ff);
> +    case 0x1c: /* Aliased Binary Point */
> +        s->abpr[cpu] = (value & 0x7);
> +        break;

The ABPR should RAZ/WI for GICs prior to v2, so this needs
to be guarded with "if (s->revision >= 2) { ...".

Otherwise looks good.

-- PMM