From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57006) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vd2s1-0005x1-Sd for qemu-devel@nongnu.org; Sun, 03 Nov 2013 13:58:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vd2rv-0001sa-U9 for qemu-devel@nongnu.org; Sun, 03 Nov 2013 13:57:57 -0500 Received: from mail-lb0-f173.google.com ([209.85.217.173]:51241) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vd2rv-0001sR-Mh for qemu-devel@nongnu.org; Sun, 03 Nov 2013 13:57:51 -0500 Received: by mail-lb0-f173.google.com with SMTP id w7so4813356lbi.18 for ; Sun, 03 Nov 2013 10:57:50 -0800 (PST) MIME-Version: 1.0 In-Reply-To: References: From: Peter Maydell Date: Sun, 3 Nov 2013 18:57:30 +0000 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] Trace ARM PC List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Xin Tong Cc: QEMU Developers On 3 November 2013 10:31, Xin Tong wrote: > I would like to trace all the executed instruction PC in QEMU ARM. Because > ARM has conditional execution, we do not know whether an instruction will > execute or not at translation time. This is a rather odd way to look at conditional execution. It's better to think of it as "the instruction executes but may execute as a NOP". (In particular, it's architecturally valid for an instruction which fails its condition check to take an UNDEF exception, though QEMU chooses not to do this.) > Therefore the PC tracing code can not be > generated before the instruction is disassembled. (i.e. before > disas_thumb_insn/disas_arm_insn ). Then, is it correct to generate the PC > tracing code after the disas_XXX_insn functions are called ? I can keep the > old value of the PC before the PC in the disassemble context is updated by > the disas_XXX_insn. The more usual way to trace this kind of thing if you care about ccpass/ccfail status would be to always trace the PC of the instruction about to be executed, and then also trace ccpass/ccfail indications when the instruction is conditional. -- PMM