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Iglesias" Cc: Luc Michel , qemu-devel@nongnu.org, qemu-arm@nongnu.org, Francisco Iglesias , Francisco Iglesias , "Edgar E . Iglesias" , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , Alistair Francis , Frederic Konrad , Sai Pavan Boddu Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2607:f8b0:4864:20::b30; envelope-from=peter.maydell@linaro.org; helo=mail-yb1-xb30.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, 26 Aug 2025 at 20:33, Edgar E. Iglesias wrote: > > On Fri, Aug 22, 2025 at 05:15:48PM +0200, Luc Michel wrote: > > From: Francisco Iglesias > > > > Introduce a 'first-cpu-index' property for specifying the first QEMU CPU > > connected to the GICv3. This makes it possible to have multiple instances > > of the GICv3 connected to different CPU clusters. > > > > For KVM, mark this property has unsupported. It probably does not make > > much sense as it is intented to be used to model non-SMP systems. > > > > Signed-off-by: Luc Michel > > Signed-off-by: Francisco Iglesias > > Peter, were you looking at solving this with links to CPU's for the next > GIC? Perhaps we should do the same here? > > I'm also fine with this patch as simple way of solving this problem. Yeah, links to CPUs is my plan for GICv5. We don't currently support having an array of link properties, so you need this patch: https://lore.kernel.org/qemu-devel/20250606140327.1289993-1-peter.maydell@linaro.org/ which provides the macro for declaring the property array and some functions for setting it up in the board/SoC code (and a sketch in the commit message of how to do it). If you want to have a go at doing it that way, feel free; but I'm happy with doing what this patch does, since it's what we already did for GICv2. We can always come back and do the refactoring later. thanks -- PMM