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Mon, 15 Mar 2021 14:34:07 -0700 (PDT) MIME-Version: 1.0 References: <20210313194829.2193621-1-f4bug@amsat.org> <20210313194829.2193621-19-f4bug@amsat.org> In-Reply-To: <20210313194829.2193621-19-f4bug@amsat.org> From: Peter Maydell Date: Mon, 15 Mar 2021 21:33:45 +0000 Message-ID: Subject: Re: [PULL 18/27] target/mips: Extract MXU code to new mxu_translate.c file To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=peter.maydell@linaro.org; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Richard Henderson , QEMU Developers , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Sat, 13 Mar 2021 at 19:58, Philippe Mathieu-Daud=C3=A9 = wrote: > > Extract 1600+ lines from the big translate.c into a new file. > > Reviewed-by: Richard Henderson > Signed-off-by: Philippe Mathieu-Daud=C3=A9 This code motion caused Coverity to rescan this code, and it thinks there's a problem in this function (CID 1450831). It looks to me like it might be right... > +/* > + * D16MAX > + * Update XRa with the 16-bit-wise maximums of signed integers > + * contained in XRb and XRc. > + * > + * D16MIN > + * Update XRa with the 16-bit-wise minimums of signed integers > + * contained in XRb and XRc. > + */ > +static void gen_mxu_D16MAX_D16MIN(DisasContext *ctx) > +{ > + uint32_t pad, opc, XRc, XRb, XRa; > + > + pad =3D extract32(ctx->opcode, 21, 5); > + opc =3D extract32(ctx->opcode, 18, 3); > + XRc =3D extract32(ctx->opcode, 14, 4); > + XRb =3D extract32(ctx->opcode, 10, 4); > + XRa =3D extract32(ctx->opcode, 6, 4); > + > + if (unlikely(pad !=3D 0)) { > + /* opcode padding incorrect -> do nothing */ > + } else if (unlikely(XRc =3D=3D 0)) { > + /* destination is zero register -> do nothing */ > + } else if (unlikely((XRb =3D=3D 0) && (XRa =3D=3D 0))) { > + /* both operands zero registers -> just set destination to zero = */ > + tcg_gen_movi_i32(mxu_gpr[XRc - 1], 0); > + } else if (unlikely((XRb =3D=3D 0) || (XRa =3D=3D 0))) { In this block of code either XRb or XRa is zero... > + /* exactly one operand is zero register - find which one is not.= ..*/ > + uint32_t XRx =3D XRb ? XRb : XRc; > + /* ...and do half-word-wise max/min with one operand 0 */ > + TCGv_i32 t0 =3D tcg_temp_new(); > + TCGv_i32 t1 =3D tcg_const_i32(0); > + > + /* the left half-word first */ > + tcg_gen_andi_i32(t0, mxu_gpr[XRx - 1], 0xFFFF0000); > + if (opc =3D=3D OPC_MXU_D16MAX) { > + tcg_gen_smax_i32(mxu_gpr[XRa - 1], t0, t1); > + } else { > + tcg_gen_smin_i32(mxu_gpr[XRa - 1], t0, t1); > + } but in these smax/smin calls we're clearly assuming that XRa is not zero. There seems to be some confusion over which registers are the inputs and which is the output. The top-level function comment says XRa is the input and XRb/XRc the inputs. But the "destination is zero register" comment is against a check on XRc, and the "both operands zero" comment is against a check on XRa and XRb, as is the "one operand is zero" comment... > +/* > + * Q8MAX > + * Update XRa with the 8-bit-wise maximums of signed integers > + * contained in XRb and XRc. > + * > + * Q8MIN > + * Update XRa with the 8-bit-wise minimums of signed integers > + * contained in XRb and XRc. > + */ > +static void gen_mxu_Q8MAX_Q8MIN(DisasContext *ctx) > +{ > + uint32_t pad, opc, XRc, XRb, XRa; > + > + pad =3D extract32(ctx->opcode, 21, 5); > + opc =3D extract32(ctx->opcode, 18, 3); > + XRc =3D extract32(ctx->opcode, 14, 4); > + XRb =3D extract32(ctx->opcode, 10, 4); > + XRa =3D extract32(ctx->opcode, 6, 4); > + > + if (unlikely(pad !=3D 0)) { > + /* opcode padding incorrect -> do nothing */ > + } else if (unlikely(XRa =3D=3D 0)) { > + /* destination is zero register -> do nothing */ > + } else if (unlikely((XRb =3D=3D 0) && (XRc =3D=3D 0))) { > + /* both operands zero registers -> just set destination to zero = */ > + tcg_gen_movi_i32(mxu_gpr[XRa - 1], 0); > + } else if (unlikely((XRb =3D=3D 0) || (XRc =3D=3D 0))) { > + /* exactly one operand is zero register - make it be the first..= .*/ > + uint32_t XRx =3D XRb ? XRb : XRc; Contrast this function, where the code and the comments are all in agreement that XRa is destination and XRb/XRc inputs. thanks -- PMM