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From: Peter Maydell <peter.maydell@linaro.org>
To: Alistair Francis <alistair.francis@xilinx.com>
Cc: "QEMU Developers" <qemu-devel@nongnu.org>,
	"Peter Crosthwaite" <crosthwaitepeter@gmail.com>,
	"Edgar Iglesias" <edgar.iglesias@xilinx.com>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Andreas Färber" <afaerber@suse.de>,
	"KONRAD Frédéric" <fred.konrad@greensocs.com>,
	"Alex Bennée" <alex.bennee@linaro.org>
Subject: Re: [Qemu-devel] [PATCH v6 02/13] register: Add Register API
Date: Thu, 9 Jun 2016 19:55:40 +0100	[thread overview]
Message-ID: <CAFEAcA-TNco8vQ05xxJoXueOEN3FW0MMNPp7TwqYuGsec0tiHw@mail.gmail.com> (raw)
In-Reply-To: <8db13b5c1d4b5a9afed38f29fcb2b4b8c4f5aa57.1463093051.git.alistair.francis@xilinx.com>

On 12 May 2016 at 23:45, Alistair Francis <alistair.francis@xilinx.com> wrote:
> This API provides some encapsulation of registers and factors our some

"out"

> common functionality to common code. Bits of device state (usually MMIO
> registers), often have all sorts of access restrictions and semantics

spurious comma

> associated with them. This API allow you to define what those

"allows"

> restrictions are on a bit-by-bit basis.
>
> Helper functions are then used to access the register which observe the
> semantics defined by the RegisterAccessInfo struct.
>
> Some features:
> Bits can be marked as read_only (ro field)
> Bits can be marked as write-1-clear (w1c field)
> Bits can be marked as reserved (rsvd field)
> Reset values can be defined (reset)
> Bits can be marked clear on read (cor)
> Pre and post action callbacks can be added to read and write ops
> Verbose debugging info can be enabled/disabled
>
> Useful for defining device register spaces in a data driven way. Cuts
> down on a lot of the verbosity and repetition in the switch-case blocks
> in the standard foo_mmio_read/write functions.
>
> Also useful for automated generation of device models from hardware
> design sources.
>
> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> V5:
>  - Convert to using only one memory region
> V4:
>  - Rebase
>  - Remove the guest error masking
>  - Simplify the unimplemented masking
>  - Use the reserved value in the write calculations
>  - Remove read_lite and write_lite
>  - General fixes to asserts and log printing
> V3:
>  - Address some comments from Fred
>
>  hw/core/Makefile.objs |   1 +
>  hw/core/register.c    | 149 ++++++++++++++++++++++++++++++++++++++++++++++++++
>  include/hw/register.h | 110 +++++++++++++++++++++++++++++++++++++
>  3 files changed, 260 insertions(+)
>  create mode 100644 hw/core/register.c
>  create mode 100644 include/hw/register.h
>
> diff --git a/hw/core/Makefile.objs b/hw/core/Makefile.objs
> index abb3560..bf95db5 100644
> --- a/hw/core/Makefile.objs
> +++ b/hw/core/Makefile.objs
> @@ -14,4 +14,5 @@ common-obj-$(CONFIG_SOFTMMU) += machine.o
>  common-obj-$(CONFIG_SOFTMMU) += null-machine.o
>  common-obj-$(CONFIG_SOFTMMU) += loader.o
>  common-obj-$(CONFIG_SOFTMMU) += qdev-properties-system.o
> +common-obj-$(CONFIG_SOFTMMU) += register.o
>  common-obj-$(CONFIG_PLATFORM_BUS) += platform-bus.o
> diff --git a/hw/core/register.c b/hw/core/register.c
> new file mode 100644
> index 0000000..5e6f621
> --- /dev/null
> +++ b/hw/core/register.c
> @@ -0,0 +1,149 @@
> +/*
> + * Register Definition API
> + *
> + * Copyright (c) 2016 Xilinx Inc.
> + * Copyright (c) 2013 Peter Crosthwaite <peter.crosthwaite@xilinx.com>
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2.  See
> + * the COPYING file in the top-level directory.
> + */

Is this deliberately GPL2-only rather than 2-or-later ?

Otherwise
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM

  reply	other threads:[~2016-06-09 18:56 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-12 22:45 [Qemu-devel] [PATCH v6 00/13] data-driven device registers Alistair Francis
2016-05-12 22:45 ` [Qemu-devel] [PATCH v6 01/13] bitops: Add MAKE_64BIT_MASK macro Alistair Francis
2016-06-09 18:46   ` Peter Maydell
2016-06-13 20:57     ` Alistair Francis
2016-05-12 22:45 ` [Qemu-devel] [PATCH v6 02/13] register: Add Register API Alistair Francis
2016-06-09 18:55   ` Peter Maydell [this message]
2016-06-13 21:01     ` Alistair Francis
2016-05-12 22:45 ` [Qemu-devel] [PATCH v6 03/13] register: Add Memory API glue Alistair Francis
2016-06-09 13:08   ` KONRAD Frederic
2016-06-21 16:52     ` Alistair Francis
2016-06-09 19:03   ` Peter Maydell
2016-06-21  0:46     ` Alistair Francis
2016-06-21  6:48       ` Peter Maydell
2016-05-12 22:46 ` [Qemu-devel] [PATCH v6 04/13] register: Define REG and FIELD macros Alistair Francis
2016-06-10 10:52   ` Peter Maydell
2016-06-21 17:41     ` Alistair Francis
2016-05-12 22:46 ` [Qemu-devel] [PATCH v6 05/13] register: QOMify Alistair Francis
2016-06-10 10:55   ` Peter Maydell
2016-06-21 16:49     ` Alistair Francis
2016-05-12 22:46 ` [Qemu-devel] [PATCH v6 06/13] register: Add block initialise helper Alistair Francis
2016-06-10 11:02   ` Peter Maydell
2016-06-21 18:25     ` Alistair Francis
2016-06-21 19:45       ` Peter Maydell
2016-06-21 22:21         ` Alistair Francis
2016-05-12 22:46 ` [Qemu-devel] [PATCH v6 07/13] dma: Add Xilinx Zynq devcfg device model Alistair Francis
2016-06-10 11:16   ` Peter Maydell
2016-06-21 18:34     ` Alistair Francis
2016-05-12 22:46 ` [Qemu-devel] [PATCH v6 08/13] xilinx_zynq: Connect devcfg to the Zynq machine model Alistair Francis
2016-06-10 11:19   ` Peter Maydell
2016-06-21 18:36     ` Alistair Francis
2016-05-12 22:46 ` [Qemu-devel] [PATCH v6 09/13] qdev: Define qdev_get_gpio_out Alistair Francis
2016-06-10 11:48   ` Peter Maydell
2016-06-21 19:05     ` Alistair Francis
2016-05-12 22:46 ` [Qemu-devel] [PATCH v6 10/13] irq: Add opaque setter routine Alistair Francis
2016-05-12 22:46 ` [Qemu-devel] [PATCH v6 11/13] register: Add GPIO API Alistair Francis
2016-06-10 11:52   ` Peter Maydell
2016-06-21 22:34     ` Alistair Francis
2016-05-12 22:46 ` [Qemu-devel] [PATCH v6 12/13] misc: Introduce ZynqMP IOU SLCR Alistair Francis
2016-06-09  0:30 ` [Qemu-devel] [PATCH v6 00/13] data-driven device registers Alistair Francis
2016-06-10 11:53   ` Peter Maydell
2016-06-13 21:11     ` Alistair Francis

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