qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: Michael Davidsaver <mdavidsaver@gmail.com>
Cc: Peter Crosthwaite <crosthwaitepeter@gmail.com>,
	qemu-arm@nongnu.org, QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 00/18] Fix exception handling and msr/mrs access
Date: Tue, 17 Nov 2015 17:07:16 +0000	[thread overview]
Message-ID: <CAFEAcA-WerwObfwekpnRbfpcsUdkvV3Gqxr+krfiSJAFP-CxAw@mail.gmail.com> (raw)
In-Reply-To: <1447031505-12477-1-git-send-email-mdavidsaver@gmail.com>

On 9 November 2015 at 01:11, Michael Davidsaver <mdavidsaver@gmail.com> wrote:
> This series grew from a previous incorrect patch attempting to fix
> some incorrect behavior.  After spending some time going through the
> arch. ref. manual for v7-M I think I understand better how this should
> work and have made a number of changes which actually improve the situation.
>
> These changes have not yet been cross checked against real hardware, and
> I therefore don't consider them mergeable.  It's gotten big enough though
> that I'd like to get some feedback.

Thanks for this -- our M profile code has been in need of some love
for quite a while now.

> This series removes the dependence of the NVIC code on the GIC.  The GIC
> doesn't have the concept of PRIGROUP to change the size of the group
> priority field.  Also, there are a lot of cases in this code which
> I don't understand and worry about breaking.  Now that I have things
> working (I think), I could look at recombining them if this is desired.

I think separating out the NVIC is the right thing. Some of the
programmer-visible register views are superficially similar to the GIC,
but the underlying logic of how exceptions are dealt with is definitely
different, and trying to share code just makes it harder to maintain
both. (In particular for M profile external interrupts are just another
kind of exception and get prioritised along with all the internal
exceptions; for A/R profile the GIC really is an external thing
that prioritises external interrupts only to forward to the CPU.)

> I looked briefly at qtest, but can't quite see how to use it given
> the need to execute code to test most of the exception behavior.
>  Is something like this feasible at present?

You're correct that we don't have a very good story for how to test
parts of the system that really need execution of guest code.

I'll reply to the various patches individually with comments.

thanks
-- PMM

  parent reply	other threads:[~2015-11-17 17:07 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-09  1:11 [Qemu-devel] [PATCH 00/18] Fix exception handling and msr/mrs access Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 01/18] armv7m: MRS/MSR handle unprivileged access Michael Davidsaver
2015-11-17 17:09   ` Peter Maydell
2015-12-02 22:51     ` Michael Davidsaver
2015-12-02 23:04       ` Peter Maydell
2015-11-09  1:11 ` [Qemu-devel] [PATCH 02/18] armv7m: Undo armv7m.hack Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 03/18] armv7m: Complain about incorrect exception table entries Michael Davidsaver
2015-11-17 17:20   ` Peter Maydell
2015-12-02 22:52     ` Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 04/18] armv7m: Explicit error for bad vector table Michael Davidsaver
2015-11-17 17:33   ` Peter Maydell
2015-12-02 22:55     ` Michael Davidsaver
2015-12-02 23:09       ` Peter Maydell
2015-11-09  1:11 ` [Qemu-devel] [PATCH 05/18] armv7m: expand NVIC state Michael Davidsaver
2015-11-17 18:10   ` Peter Maydell
2015-12-02 22:58     ` Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 06/18] armv7m: new NVIC utility functions Michael Davidsaver
2015-11-20 13:25   ` Peter Maydell
2015-12-02 23:18     ` Michael Davidsaver
2015-12-03  0:11       ` Peter Maydell
2015-11-09  1:11 ` [Qemu-devel] [PATCH 07/18] armv7m: Update NVIC registers Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 08/18] armv7m: fix RETTOBASE Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 09/18] armv7m: NVIC update vmstate Michael Davidsaver
2015-11-17 17:58   ` Peter Maydell
2015-12-02 23:19     ` Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 10/18] armv7m: NVIC initialization Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 11/18] armv7m: fix I and F flag handling Michael Davidsaver
2015-11-20 13:47   ` Peter Maydell
2015-12-02 23:22     ` Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 12/18] armv7m: simpler/faster exception start Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 13/18] armv7m: implement CFSR and HFSR Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 14/18] armv7m: auto-clear FAULTMASK Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 15/18] arm: gic: Remove references to NVIC Michael Davidsaver
2015-11-17 18:00   ` Peter Maydell
2015-11-09  1:11 ` [Qemu-devel] [PATCH 16/18] armv7m: check exception return consistency Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 17/18] armv7m: implement CCR Michael Davidsaver
2015-11-09  1:11 ` [Qemu-devel] [PATCH 18/18] armv7m: prevent unprivileged write to STIR Michael Davidsaver
2015-11-17 17:07 ` Peter Maydell [this message]
2015-11-20 13:59   ` [Qemu-devel] [PATCH 00/18] Fix exception handling and msr/mrs access Peter Maydell
2015-12-02 22:48     ` Michael Davidsaver
2015-12-17 19:36 ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAFEAcA-WerwObfwekpnRbfpcsUdkvV3Gqxr+krfiSJAFP-CxAw@mail.gmail.com \
    --to=peter.maydell@linaro.org \
    --cc=crosthwaitepeter@gmail.com \
    --cc=mdavidsaver@gmail.com \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).