From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35914) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VsaIw-0003vq-L0 for qemu-devel@nongnu.org; Mon, 16 Dec 2013 10:42:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VsaIq-0004yT-RK for qemu-devel@nongnu.org; Mon, 16 Dec 2013 10:41:58 -0500 Received: from mail-pb0-f41.google.com ([209.85.160.41]:41795) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VsaIq-0004yC-LG for qemu-devel@nongnu.org; Mon, 16 Dec 2013 10:41:52 -0500 Received: by mail-pb0-f41.google.com with SMTP id jt11so5635585pbb.14 for ; Mon, 16 Dec 2013 07:41:51 -0800 (PST) MIME-Version: 1.0 In-Reply-To: References: From: Peter Maydell Date: Mon, 16 Dec 2013 15:41:31 +0000 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH target-arm v5 00/10] Fix Support for ARM CBAR and reset-hivecs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite Cc: =?UTF-8?Q?Andreas_F=C3=A4rber?= , Antony Pavlov , QEMU Developers , Mark Langsdorf , "Michael S. Tsirkin" On 16 December 2013 02:28, Peter Crosthwaite wrote: > Hi All, > > This patch series adds support for two board configurable ARM CPU > properties - Configuration Base Address Register and the > hivecs-on-reset. > > The CBAR is needed to fix Zynq and Highbank which both were broken for > linux boot. This series provides the fixes. > > I have added these properties as qdev properties rather than object > properties to pick up the desired writable-until-realize semantic. Looks good to me, thanks. Applied all to target-arm.next. thanks -- PMM