From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:52748) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UcDgV-00075g-72 for qemu-devel@nongnu.org; Tue, 14 May 2013 07:46:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UcDgQ-0000aH-Ew for qemu-devel@nongnu.org; Tue, 14 May 2013 07:46:22 -0400 Received: from mail-da0-x232.google.com ([2607:f8b0:400e:c00::232]:36186) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UcDgQ-0000aB-7p for qemu-devel@nongnu.org; Tue, 14 May 2013 07:46:18 -0400 Received: by mail-da0-f50.google.com with SMTP id i23so263026dad.37 for ; Tue, 14 May 2013 04:46:17 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <201303261108.50434.arnd@arndb.de> References: <1364293331-8722-1-git-send-email-peter.maydell@linaro.org> <201303261054.59928.arnd@arndb.de> <201303261108.50434.arnd@arndb.de> From: Peter Maydell Date: Tue, 14 May 2013 12:45:57 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v2 07/11] versatile_pci: Implement the correct PCI IRQ mapping List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Arnd Bergmann Cc: "Michael S. Tsirkin" , patches@linaro.org, Will Deacon , qemu-devel@nongnu.org, Paul Brook , =?UTF-8?Q?Andreas_F=C3=A4rber?= , Aurelien Jarno On 26 March 2013 11:08, Arnd Bergmann wrote: > On Tuesday 26 March 2013, Peter Maydell wrote: >> >> On 26 March 2013 10:54, Arnd Bergmann wrote: >> > Yes, very good. We will probably introduce sparse irq support on >> > versatile in the near future, and then the value we write into the >> > PCI_INTERRUPT_LINE field will become arbitrary from qemu's point >> > of view, but I will make sure that we fix the interrupt mapping >> > in the kernel at the same time so we always fall into the >> > "s->broken_irq_mapping = false;" case. >> >> Yeah, as long as you avoid the number 27 you're ok :-) > > Good point. I guess we'll have to keep using a legacy domain for > versatile then. So there turns out to be a problem with this. Newer kernels (I'm looking at current mainline master) write a number other than 27 (in this case 94) to the PCI_INTERRUPT_LINE register, but they still assume the old broken IRQ mapping. So our "autodetect busted kernels" code doesn't work. I've also discovered that there are some kernels (including current master) which don't like it when the host PCI bridge goes at slot 29 like it does on real hardware; so I think I'll just have to revert that patch. -- PMM