From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35125) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e96oi-00069K-3Q for qemu-devel@nongnu.org; Mon, 30 Oct 2017 05:57:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e96oh-0002HQ-8N for qemu-devel@nongnu.org; Mon, 30 Oct 2017 05:57:12 -0400 Received: from mail-wr0-x244.google.com ([2a00:1450:400c:c0c::244]:55466) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1e96oh-0002H0-1O for qemu-devel@nongnu.org; Mon, 30 Oct 2017 05:57:11 -0400 Received: by mail-wr0-x244.google.com with SMTP id l8so11877500wre.12 for ; Mon, 30 Oct 2017 02:57:10 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <20171030032521.2441-1-f4bug@amsat.org> References: <08178b4217d1692297b8c9620b6d13a80bfb6822.1509175660.git.alistair.francis@xilinx.com> <20171030032521.2441-1-f4bug@amsat.org> From: Peter Maydell Date: Mon, 30 Oct 2017 09:56:49 +0000 Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v3] xlnx-zcu102: Specify the number of max CPUs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Cc: Alistair Francis , "Edgar E . Iglesias" , QEMU Developers , qemu-arm , Alistair Francis On 30 October 2017 at 03:25, Philippe Mathieu-Daud=C3=A9 = wrote: > From: Alistair Francis > > Specify the number of CPUs that can run on ZynqMP. > > Signed-off-by: Alistair Francis > Reviewed-by: Philippe Mathieu-Daud=C3=A9 > Tested-by: Philippe Mathieu-Daud=C3=A9 > --- > V3: > - Fix my ASCII noncompliant last name in Reviewed-by tag :( > - added Tested-by for what it's worth > > V2: > - Use macros > > hw/arm/xlnx-zcu102.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c > index 519a16ed98..e2d15a1c9d 100644 > --- a/hw/arm/xlnx-zcu102.c > +++ b/hw/arm/xlnx-zcu102.c > @@ -240,6 +240,7 @@ static void xlnx_zcu102_machine_class_init(ObjectClas= s *oc, void *data) > mc->block_default_type =3D IF_IDE; > mc->units_per_default_bus =3D 1; > mc->ignore_memory_transaction_failures =3D true; > + mc->max_cpus =3D XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS= ; > } > > static const TypeInfo xlnx_zcu102_machine_init_typeinfo =3D { Applied to target-arm.next, thanks. -- PMM