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Thu, 12 Jun 2025 08:16:53 -0700 (PDT) MIME-Version: 1.0 References: <20250515153907.151174-1-cohuck@redhat.com> <20250515153907.151174-9-cohuck@redhat.com> In-Reply-To: <20250515153907.151174-9-cohuck@redhat.com> From: Peter Maydell Date: Thu, 12 Jun 2025 16:16:41 +0100 X-Gm-Features: AX0GCFuBHrJGT1DhrRgfURJ0MalgsW4xYAj3mIR8h1lKcbEjMTHrKhv4wIVn_nY Message-ID: Subject: Re: [PATCH v7 08/14] arm/cpu: Store id_isar0-7 into the idregs array To: Cornelia Huck Cc: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvmarm@lists.linux.dev, richard.henderson@linaro.org, alex.bennee@linaro.org, maz@kernel.org, oliver.upton@linux.dev, sebott@redhat.com, shameerali.kolothum.thodi@huawei.com, armbru@redhat.com, berrange@redhat.com, abologna@redhat.com, jdenemar@redhat.com, agraf@csgraf.de, shahuang@redhat.com, mark.rutland@arm.com, philmd@linaro.org, pbonzini@redhat.com Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2607:f8b0:4864:20::112d; envelope-from=peter.maydell@linaro.org; helo=mail-yw1-x112d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Thu, 15 May 2025 at 16:40, Cornelia Huck wrote: > > From: Eric Auger > > Reviewed-by: Richard Henderson > Reviewed-by: Sebastian Ott > Signed-off-by: Eric Auger > Signed-off-by: Cornelia Huck > --- > hw/intc/armv7m_nvic.c | 12 ++-- > target/arm/cpu-features.h | 36 +++++----- > target/arm/cpu.c | 24 +++---- > target/arm/cpu.h | 7 -- > target/arm/cpu64.c | 28 ++++---- > target/arm/helper.c | 14 ++-- > target/arm/kvm.c | 21 ++---- > target/arm/tcg/cpu-v7m.c | 90 +++++++++++++----------- > target/arm/tcg/cpu32.c | 144 +++++++++++++++++++++----------------- > target/arm/tcg/cpu64.c | 108 ++++++++++++++-------------- > 10 files changed, 243 insertions(+), 241 deletions(-) This doesn't compile: ../../target/arm/tcg/cpu-v7m.c:70:5: error: incompatible pointer types initializing 'ARMISARe gisters *' (aka 'struct ARMISARegisters *') with an expression of type 'uint64_t *' (aka 'unsigned long *') [-Werror,-Wincompatible-pointer-types] 70 | SET_IDREG(idregs, ID_ISAR0, 0x01141110); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../../target/arm/cpu.h:875:26: note: expanded from macro 'SET_IDREG' 875 | ARMISARegisters *i_ = (ISAR); \ | ^ ~~~~~~ ../../target/arm/tcg/cpu-v7m.c:71:5: error: incompatible pointer types initializing 'ARMISARegisters *' (aka 'struct ARMISARegisters *') with an expression of type 'uint64_t *' (aka 'unsigned long *') [-Werror,-Wincompatible-pointer-types] 71 | SET_IDREG(idregs, ID_ISAR1, 0x02111000); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../../target/arm/cpu.h:875:26: note: expanded from macro 'SET_IDREG' 875 | ARMISARegisters *i_ = (ISAR); \ | ^ ~~~~~~ (and more similar errors until the compiler gives up). -- PMM