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From: Peter Maydell <peter.maydell@linaro.org>
To: Chaos Shu <chaos.shun@live.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [Question] Qemu Register Mapping Directly in AARCH64
Date: Mon, 9 Jun 2014 08:51:45 +0100	[thread overview]
Message-ID: <CAFEAcA-ghXYow6mt48TmiLk7O4VSK7oAhPmBS6QGXTa=8L6C7A@mail.gmail.com> (raw)
In-Reply-To: <SNT149-DS19931E4D1C708520E5BC47FB290@phx.gbl>

On 9 June 2014 06:59, Chaos Shu <chaos.shun@live.com> wrote:
> I’ve noticed that Qemu maintained the target arch register in memory for
> capacity, but the load/store really cost a bit much, is there any way map
> the register directly.

Our JIT's register allocator will avoid storing the guest register value
back to RAM unless it has to (eg if we might be about to fault,
call a helper which would trash the host register, etc).
Using a target-agnostic JIT like this is a pretty fundamental design
decision that isn't easy to change. In any case the regs[] array
in the CPU state struct will always be in L1 cache so access will
be fast.

thanks
-- PMM

      reply	other threads:[~2014-06-09  7:52 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-09  5:59 [Qemu-devel] [Question] Qemu Register Mapping Directly in AARCH64 Chaos Shu
2014-06-09  7:51 ` Peter Maydell [this message]

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