[Qemu-devel] [Question] Qemu Register Mapping Directly in AARCH64

[Qemu-devel] [Question] Qemu Register Mapping Directly in AARCH64

[Chaos Shu]

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Hi all

 

I've noticed that Qemu maintained the target arch register in memory for
capacity, but the load/store really cost a bit much, is there any way map
the register directly.

 

For example, in x86 to aarch64, x86 uses 8 registers mostly such eax ebx ecx
and so on, and aarch64 arch got 31 general registers, is there any method
try to map eax ebx directly to aarch64 hardware registers? As far as I know,
may we need reserve those hardware registers in aarch64's compilers and in
Qemu we use hardware registers to instead of memory value. 

 

Anybody got any infos about those? Thanks.

 

Thanks

Chaos


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Re: [Qemu-devel] [Question] Qemu Register Mapping Directly in AARCH64

[Peter Maydell]

On 9 June 2014 06:59, Chaos Shu <chaos.shun@live.com> wrote:
> I’ve noticed that Qemu maintained the target arch register in memory for
> capacity, but the load/store really cost a bit much, is there any way map
> the register directly.

Our JIT's register allocator will avoid storing the guest register value
back to RAM unless it has to (eg if we might be about to fault,
call a helper which would trash the host register, etc).
Using a target-agnostic JIT like this is a pretty fundamental design
decision that isn't easy to change. In any case the regs[] array
in the CPU state struct will always be in L1 cache so access will
be fast.

thanks
-- PMM