From: Peter Maydell <peter.maydell@linaro.org>
To: QEMU Developers <qemu-devel@nongnu.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Eduardo Habkost <eduardo@habkost.net>
Subject: Re: [PATCH] target/i386: Mark VPERMILPS as not valid with prefix 0
Date: Fri, 14 Nov 2025 17:55:35 +0000 [thread overview]
Message-ID: <CAFEAcA-goNF38nxoYaG8_rn0c9mtDeu0h_PmcQL437qszbWGHw@mail.gmail.com> (raw)
Obviously the subject prefix here should be "target/i386" -- fingers
on autopilot ;-)
-- PMM
On Fri, 14 Nov 2025 at 17:54, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> There are a small set of binary SSE insns which have no MMX
> equivalent, which we create the gen functions for with the
> BINARY_INT_SSE() macro. This forwards to gen_binary_int_sse() with a
> NULL pointer for 'mmx'.
>
> For almost all of these insns we correctly mark them in the decode
> table as not permitting a zero prefix byte; however we got this wrong
> for VPERMILPS, with the result that a bogus instruction would get
> through the decode checks and end up in gen_binary_int_sse() trying
> to call a NULL pointer.
>
> Correct the decode table entry for VPERMILPD so that we get the
> expected #UD exception.
>
> In the x86 SDM, table A-4 "Three-byte Opcode Map: 08H-FFH
> (First Two Bytes are 0F 38H)" confirms that there is no pfx 0
> version of VPERMILPS.
>
> Cc: qemu-stable@nongnu.org
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3199
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> target/i386/tcg/decode-new.c.inc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
> index f4192f10068..805cfd08e83 100644
> --- a/target/i386/tcg/decode-new.c.inc
> +++ b/target/i386/tcg/decode-new.c.inc
> @@ -643,7 +643,7 @@ static const X86OpEntry opcodes_0F38_00toEF[240] = {
> [0x0a] = X86_OP_ENTRY3(PSIGND, V,x, H,x, W,x, vex4 cpuid(SSSE3) mmx avx2_256 p_00_66),
> [0x0b] = X86_OP_ENTRY3(PMULHRSW, V,x, H,x, W,x, vex4 cpuid(SSSE3) mmx avx2_256 p_00_66),
> /* Listed incorrectly as type 4 */
> - [0x0c] = X86_OP_ENTRY3(VPERMILPS, V,x, H,x, W,x, vex6 chk(W0) cpuid(AVX) p_00_66),
> + [0x0c] = X86_OP_ENTRY3(VPERMILPS, V,x, H,x, W,x, vex6 chk(W0) cpuid(AVX) p_66),
> [0x0d] = X86_OP_ENTRY3(VPERMILPD, V,x, H,x, W,x, vex6 chk(W0) cpuid(AVX) p_66),
> [0x0e] = X86_OP_ENTRY3(VTESTPS, None,None, V,x, W,x, vex6 chk(W0) cpuid(AVX) p_66),
> [0x0f] = X86_OP_ENTRY3(VTESTPD, None,None, V,x, W,x, vex6 chk(W0) cpuid(AVX) p_66),
> --
> 2.43.0
>
reply other threads:[~2025-11-14 17:57 UTC|newest]
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