From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH 07/10] target/arm: SCR_EL3.RW should be treated as 1 if EL2 doesn't support AArch32
Date: Fri, 7 Mar 2025 09:39:13 +0000 [thread overview]
Message-ID: <CAFEAcA-iYu3wUb7txeFLKm7T4P8rZWCzaLAZP7+SadqAa7Rn4Q@mail.gmail.com> (raw)
In-Reply-To: <54de9ed5-6314-4a49-a1ed-cc9d6225897d@linaro.org>
On Thu, 6 Mar 2025 at 22:54, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 3/6/25 08:39, Peter Maydell wrote:
> > +/* Return the effective value of SCR_EL3.RW */
> > +static inline bool arm_scr_rw_eff(CPUARMState *env)
> > +{
> > + /*
> > + * SCR_EL3.RW has an effective value of 1 if:
> > + * - we are NS and EL2 is implemented but doesn't support AArch32
> > + * - we are S and EL2 is enabled (in which case it must be AArch64)
> > + */
> > + ARMCPU *cpu = env_archcpu(env);
> > + bool ns_and_no_aarch32_el2 = arm_feature(env, ARM_FEATURE_EL2) &&
> > + (env->cp15.scr_el3 & SCR_NS) &&
> > + !cpu_isar_feature(aa64_aa32_el1, cpu);
> > + bool s_and_el2_enabled =
> > + (env->cp15.scr_el3 & (SCR_NS | SCR_EEL2)) == SCR_EEL2;
> > +
> > + return ns_and_no_aarch32_el2 || s_and_el2_enabled ||
> > + (env->cp15.scr_el3 & SCR_RW);
> > +}
>
> The computation here can be simplified.
>
> if (env->cp15.scr_el3 & SCR_RW) {
> return true;
> }
> if (env->cp15.scr_el3 & SCR_NS) {
> return arm_feature(env, ARM_FEATURE_EL2) &&
> !cpu_isar_feature(aa64_aa32_el1, cpu);
> } else {
> return env->cp15.scr_el3 & SCR_EEL2;
> }
Yes, but at the cost of moving it quite a long
way from how the condition is specified in the Arm ARM...
-- PMM
next prev parent reply other threads:[~2025-03-07 9:39 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-06 16:39 From ce9a42483c23c32cee233f648101a160b6604b45 Mon Sep 17 00:00:00 2001 Peter Maydell
2025-03-06 16:39 ` [PATCH 01/10] target/arm: Move A32_BANKED_REG_{GET, SET} macros to cpregs.h Peter Maydell
2025-03-06 22:09 ` Richard Henderson
2025-03-06 16:39 ` [PATCH 02/10] target/arm: Un-inline access_secure_reg() Peter Maydell
2025-03-06 22:09 ` Richard Henderson
2025-03-06 16:39 ` [PATCH 03/10] linux-user/aarch64: Remove unused get/put_user macros Peter Maydell
2025-03-06 22:09 ` Richard Henderson
2025-03-06 16:39 ` [PATCH 04/10] linux-user/arm: Remove unused get_put_user macros Peter Maydell
2025-03-06 22:09 ` Richard Henderson
2025-03-06 16:39 ` [PATCH 05/10] target/arm: Move arm_cpu_data_is_big_endian() etc to internals.h Peter Maydell
2025-03-06 22:12 ` Richard Henderson
2025-03-07 9:37 ` Peter Maydell
2025-03-06 16:39 ` [PATCH 06/10] target/arm: Move arm_current_el() and arm_el_is_aa64() " Peter Maydell
2025-03-06 22:40 ` Richard Henderson
2025-03-06 16:39 ` [PATCH 07/10] target/arm: SCR_EL3.RW should be treated as 1 if EL2 doesn't support AArch32 Peter Maydell
2025-03-06 17:12 ` Peter Maydell
2025-03-06 22:53 ` Richard Henderson
2025-03-07 9:39 ` Peter Maydell [this message]
2025-03-06 16:39 ` [PATCH 08/10] target/arm: HCR_EL2.RW should be RAO/WI if EL1 " Peter Maydell
2025-03-06 23:01 ` Richard Henderson
2025-03-06 16:39 ` [PATCH 09/10] target/arm: Add cpu local variable to exception_return helper Peter Maydell
2025-03-06 23:02 ` Richard Henderson
2025-03-06 16:39 ` [PATCH 10/10] target/arm: Forbid return to AArch32 when CPU is AArch64-only Peter Maydell
2025-03-06 23:16 ` Richard Henderson
2025-03-13 16:19 ` Peter Maydell
2025-03-06 16:41 ` [PATCH 00/10] target/arm: Forbid exception returns to unimplemented AArch32 ELs Peter Maydell
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