From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>,
QEMU Developers <qemu-devel@nongnu.org>,
remi.denis.courmont@huawei.com
Subject: Re: [PATCH 09/14] target/arm: add ARMv8.4-SEL2 system registers
Date: Tue, 3 Nov 2020 21:09:57 +0000 [thread overview]
Message-ID: <CAFEAcA-jnWsR_CM1t6DNu09f84m7HTSpfnOiV0DEBFDdP-DQzg@mail.gmail.com> (raw)
In-Reply-To: <d26e76be-9be6-e658-48c7-0f5246508517@linaro.org>
On Tue, 3 Nov 2020 at 19:50, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 11/2/20 2:57 AM, remi.denis.courmont@huawei.com wrote:
> > From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
> >
> > Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
> > ---
> > target/arm/cpu.h | 2 ++
> > target/arm/helper.c | 24 ++++++++++++++++++++++++
> > 2 files changed, 26 insertions(+)
>
> These need a new VMStateDescription section in machine.c.
Do they? I think they're handled by the existing generic
migration-of-sysregs code...
thanks
-- PMM
next prev parent reply other threads:[~2020-11-03 21:11 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <2172054.ElGaqSPkdT@basile.remlab.net>
2020-11-02 10:57 ` [PATCH 01/14] target/arm: add arm_is_el2_enabled() helper remi.denis.courmont
2020-11-02 11:06 ` Peter Maydell
2020-11-02 11:27 ` Peter Maydell
2020-11-02 13:35 ` Remi Denis Courmont
2020-11-03 16:42 ` Richard Henderson
2020-11-02 10:57 ` [PATCH 02/14] target/arm: use arm_is_el2_enabled() where applicable remi.denis.courmont
2020-11-03 16:53 ` Richard Henderson
2020-11-02 10:57 ` [PATCH 03/14] target/arm: use arm_hcr_el2_eff() " remi.denis.courmont
2020-11-03 16:56 ` Richard Henderson
2020-11-02 10:57 ` [PATCH 04/14] target/arm: factor MDCR_EL2 common handling remi.denis.courmont
2020-11-03 17:00 ` Richard Henderson
2020-11-02 10:57 ` [PATCH 05/14] target/arm: declare new AA64PFR0 bit-fields remi.denis.courmont
2020-11-03 17:02 ` Richard Henderson
2020-11-02 10:57 ` [PATCH 06/14] target/arm: add 64-bit S-EL2 to EL exception table remi.denis.courmont
2020-11-02 10:57 ` [PATCH 07/14] target/arm: return the stage 2 index for stage 1 remi.denis.courmont
2020-11-03 17:04 ` Richard Henderson
2020-11-02 10:57 ` [PATCH 08/14] target/arm: add MMU stage 1 for Secure EL2 remi.denis.courmont
2020-11-03 18:32 ` Richard Henderson
2020-11-03 18:49 ` Rémi Denis-Courmont
2020-11-03 19:41 ` Richard Henderson
2020-11-02 10:57 ` [PATCH 09/14] target/arm: add ARMv8.4-SEL2 system registers remi.denis.courmont
2020-11-03 19:49 ` Richard Henderson
2020-11-03 21:09 ` Peter Maydell [this message]
2020-11-03 21:40 ` Richard Henderson
2020-11-02 10:57 ` [PATCH 10/14] target/arm: do S1_ptw_translate() before address space lookup remi.denis.courmont
2020-11-03 19:54 ` Richard Henderson
2020-11-03 21:21 ` Rémi Denis-Courmont
2020-11-02 10:57 ` [PATCH 11/14] target/arm: secure stage 2 translation regime remi.denis.courmont
2020-11-02 10:58 ` [PATCH 12/14] target/arm: set HPFAR_EL2.NS on secure stage 2 faults remi.denis.courmont
2020-11-02 10:58 ` [PATCH 13/14] target/arm: add ARMv8.4-SEL2 extension remi.denis.courmont
2020-11-03 20:14 ` Richard Henderson
2020-11-02 10:58 ` [PATCH 14/14] target/arm: enable Secure EL2 in max CPU remi.denis.courmont
2020-11-03 7:38 ` Rémi Denis-Courmont
2020-11-03 16:38 ` Richard Henderson
2020-11-03 20:15 ` Richard Henderson
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