Re: [PATCH v2] target/arm: properly document FEAT_CRC32

[Peter Maydell <peter.maydell@linaro.org>]

On Thu, 24 Aug 2023 at 08:54, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> This is a mandatory feature for Armv8.1 architectures but we don't
> state the feature clearly in our emulation list. Also include
> FEAT_CRC32 comment in aarch64_max_tcg_initfn for ease of grepping.
>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Cc: qemu-stable@nongnu.org
> Message-Id: <20230222110104.3996971-1-alex.bennee@linaro.org>
>
> ---
> v2
>   - dropped the breakdown of setting ID registers in other CPU init fns
> ---
>  docs/system/arm/emulation.rst | 1 +
>  target/arm/tcg/cpu64.c        | 2 +-
>  2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
> index bdafc68819..65d1f39f4b 100644
> --- a/docs/system/arm/emulation.rst
> +++ b/docs/system/arm/emulation.rst
> @@ -14,6 +14,7 @@ the following architecture extensions:
>  - FEAT_BBM at level 2 (Translation table break-before-make levels)
>  - FEAT_BF16 (AArch64 BFloat16 instructions)
>  - FEAT_BTI (Branch Target Identification)
> +- FEAT_CRC32 (CRC32 instruction)

Applied to target-arm.next, thanks. I pluralized "instructions"
here to match the Arm ARM text.

-- PMM