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From: Peter Maydell <peter.maydell@linaro.org>
To: Stefan Hajnoczi <stefanha@gmail.com>
Cc: Roy Franz <roy.franz@linaro.org>, Kevin Wolf <kwolf@redhat.com>,
	QEMU Developers <qemu-devel@nongnu.org>,
	Stefan Hajnoczi <stefanha@redhat.com>,
	Patch Tracking <patches@linaro.org>
Subject: Re: [Qemu-devel] [PATCH] block: mask NOR flash buffered write length
Date: Fri, 18 Oct 2013 14:36:12 +0100	[thread overview]
Message-ID: <CAFEAcA-oH7dpM9D+f+E-u222u40_9PJJVTaRGh4ek0Eo7yPG+A@mail.gmail.com> (raw)
In-Reply-To: <20131018113847.GA17031@stefanha-thinkpad.redhat.com>

On 18 October 2013 12:38, Stefan Hajnoczi <stefanha@gmail.com> wrote:
> On Thu, Oct 17, 2013 at 07:30:02PM -0700, Roy Franz wrote:
>> For buffered writes, mask the length with the maximum supported
>> length.  This is required for block writes to work on the ARM vexpress
>> platform, where the flash interface is 32 bits wide.  For buffered writes
>> to the 2 16 bit flashes on the interface, the length is repeated in each
>> 16 bit word, and without this mask the two lengths are interpreted
>> as a single 32 bit value that is very large.

>> @@ -378,6 +378,7 @@ static void pflash_write(pflash_t *pfl, hwaddr offset,
>>
>>              break;
>>          case 0xe8:
>> +            value &= pfl->writeblock_size - 1;
>
> This patch feels weird.   Should the 32-bit interface width be truncated
> down to 16 bits before dispatching pflash_write()?
>
> It's not clear to me that truncating just in this specific case is
> correct.  But then I don't know the hardware :).

I think the problem may be that we're incorrectly modelling the
hardware's "2 side-by-side 16 bit wide flash chips" as "one 32 bit
wide flash chip", because our flash device code doesn't support
doing the former.

Probably instead of a single "width" property we should have two,
similar to the device tree binding's pair:
 - bank-width : Width (in bytes) of the bank.  Equal to the
   device width times the number of interleaved chips.
 - device-width : (optional) Width of a single mtd chip.  If
   omitted, assumed to be equal to 'bank-width'.

However I'm not very familiar with how flash hardware works...

-- PMM

  reply	other threads:[~2013-10-18 13:36 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-18  2:30 [Qemu-devel] [PATCH] block: mask NOR flash buffered write length Roy Franz
2013-10-18 11:38 ` Stefan Hajnoczi
2013-10-18 13:36   ` Peter Maydell [this message]
2013-10-18 13:54     ` Roy Franz
2013-10-18 14:01       ` Peter Maydell
2013-10-18 14:05         ` Roy Franz
2013-10-18 14:11           ` Peter Maydell
2013-10-18 14:14             ` Roy Franz

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