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From: Peter Maydell <peter.maydell@linaro.org>
To: BALATON Zoltan <balaton@eik.bme.hu>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
	QEMU Trivial <qemu-trivial@nongnu.org>,
	Magnus Damm <magnus.damm@gmail.com>,
	Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH v3 11/13] sm501: Add some more missing registers
Date: Fri, 3 Mar 2017 18:33:14 +0000	[thread overview]
Message-ID: <CAFEAcA-qq_5A4p364Faz-Ms57HjmbbrSOa64ZGmtb336MATzyQ@mail.gmail.com> (raw)
In-Reply-To: <7be6454441c7b61a02e22aa2d6f81f0c047d4312.1488504063.git.balaton@eik.bme.hu>

On 10 December 2016 at 02:05, BALATON Zoltan <balaton@eik.bme.hu> wrote:
> This is to allow clients to initialise these without failing as long
> as no 2D engine function is called that would use the written value.
> Saved values are not used yet (may get used when more of 2D engine is
> added sometimes) and clients normally only write to most of these
> registers, nothing is known to ever read them but they are documented
> as read/write so also implement read for these.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
>
> v2: Fixed mask of video_control register for a read only bit
>     Changed IRQ status register to write ignored as IRQ is not implemented
> v3: Squashed read implementation into this patch
>
>  hw/display/sm501.c | 107 ++++++++++++++++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 106 insertions(+), 1 deletion(-)
>

> @@ -1454,6 +1558,7 @@ static void sm501_reset(SM501State *s)
>      s->misc_timing = 0;
>      s->power_mode_control = 0;
>      s->dc_panel_control = 0x00010000; /* FIFO level 3 */
> +    s->dc_video_control = 0;
>      s->dc_crt_control = 0x00010000;
>      s->twoD_control = 0;
>  }

You want to reset all these new fields, not just one of them.
If you do that then you can add
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM

  reply	other threads:[~2017-03-03 18:33 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-03  1:21 [Qemu-devel] [PATCH v3 00/13] Improvements for SM501 display controller emulation BALATON Zoltan
2017-02-25 18:23 ` [Qemu-devel] [PATCH v3 05/13] sm501: Get rid of base address in draw_hwc_line BALATON Zoltan
2017-02-25 18:31 ` [Qemu-devel] [PATCH v3 06/13] sm501: Add emulation of chip connected via PCI BALATON Zoltan
2017-03-03 18:25   ` Peter Maydell
2017-02-25 18:46 ` [Qemu-devel] [PATCH v3 07/13] sm501: Fix device endianness BALATON Zoltan
2017-02-25 19:19 ` [Qemu-devel] [PATCH v3 09/13] sm501: Misc clean ups BALATON Zoltan
2017-02-25 19:25 ` [Qemu-devel] [PATCH v3 10/13] sm501: Add support for panel layer BALATON Zoltan
2017-02-25 23:53 ` [Qemu-devel] [PATCH v3 12/13] sm501: Add vmstate descriptor BALATON Zoltan
2017-03-03 18:34   ` Peter Maydell
2017-03-03  0:21 ` [Qemu-devel] [PATCH v3 02/13] sm501: Use defined constants instead of literal values where available BALATON Zoltan
2017-03-03 18:21   ` Peter Maydell
2017-03-03  1:03 ` [Qemu-devel] [PATCH v3 04/13] sm501: QOMify BALATON Zoltan
2017-03-03 18:23   ` Peter Maydell
2017-03-03 18:39   ` Peter Maydell
2017-03-03 20:56     ` BALATON Zoltan
2017-03-04 12:43       ` Peter Maydell
2017-03-03  1:50 ` [Qemu-devel] [PATCH v3 13/13] ppc: Add SM501 device in config for ppc and ppcemb targets BALATON Zoltan
2017-03-03 18:34   ` Peter Maydell
2017-03-06  7:00   ` Thomas Huth
2017-03-06  9:47     ` Peter Maydell
2017-03-06  9:52       ` Thomas Huth
2017-03-06  9:55         ` Peter Maydell
2017-03-06 18:34           ` BALATON Zoltan
2017-03-03  1:50 ` [Qemu-devel] [PATCH v3 11/13] sm501: Add some more missing registers BALATON Zoltan
2017-03-03 18:33   ` Peter Maydell [this message]
2017-03-03  1:50 ` [Qemu-devel] [PATCH v3 08/13] sm501: Fix hardware cursor BALATON Zoltan
2017-03-03 18:27   ` Peter Maydell
2017-03-03  1:50 ` [Qemu-devel] [PATCH v3 03/13] sm501: Add missing arbitration control register BALATON Zoltan
2017-03-03 18:21   ` Peter Maydell
2017-03-03  1:50 ` [Qemu-devel] [PATCH v3 01/13] sm501: Fixed code style and a few typos in comments BALATON Zoltan

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