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From: Peter Maydell <peter.maydell@linaro.org>
To: Laurent Vivier <laurent@vivier.eu>
Cc: Richard Henderson <rth@twiddle.net>,
	QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 0/5] target-m68k patches
Date: Mon, 7 Nov 2016 13:12:24 +0000	[thread overview]
Message-ID: <CAFEAcA8-w_iJ2-0J6iddGRgdNRH-=+xT2GJz1P5MyjhvOJV8ng@mail.gmail.com> (raw)
In-Reply-To: <48c5952a-0f12-bc53-c104-5440f79ffb7b@vivier.eu>

On 7 November 2016 at 12:24, Laurent Vivier <laurent@vivier.eu> wrote:
> If you want to have a try, this tree is based on tgt-m68k + what is
> needed to boot an etch-m68k container.
>
> git://github.com/vivier/qemu-m68k.git for-rth

You could try using 'risu' to do single-instruction level
comprehensive testing, if you've got enough of a linux-user port
to be able to run it...

thanks
-- PMM

  reply	other threads:[~2016-11-07 13:12 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-06  6:18 [Qemu-devel] [PATCH 0/5] target-m68k patches Richard Henderson
2016-11-06  6:18 ` [Qemu-devel] [PATCH 1/5] target-m68k: implement 680x0 movem Richard Henderson
2016-11-06 16:52   ` Laurent Vivier
2016-11-06  6:18 ` [Qemu-devel] [PATCH 2/5] target-m68k: Do not cpu_abort on undefined insns Richard Henderson
2016-11-06 16:53   ` Laurent Vivier
2016-11-06  6:18 ` [Qemu-devel] [PATCH 3/5] target-m68k: Inline shifts Richard Henderson
2016-11-06  6:18 ` [Qemu-devel] [PATCH 4/5] target-m68k: Implement bitfield ops for registers Richard Henderson
2016-11-06  6:18 ` [Qemu-devel] [PATCH 5/5] target-m68k: Implement bitfield ops for memory Richard Henderson
2016-11-06 19:52 ` [Qemu-devel] [PATCH 0/5] target-m68k patches Laurent Vivier
2016-11-07 12:08   ` Richard Henderson
2016-11-07 12:24     ` Laurent Vivier
2016-11-07 13:12       ` Peter Maydell [this message]
2016-11-07 13:44         ` Laurent Vivier
2016-11-07 13:50           ` Peter Maydell
2016-11-07 14:00             ` Laurent Vivier

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