From: Peter Maydell <peter.maydell@linaro.org>
To: Hao Wu <wuhaotsh@google.com>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, venture@google.com,
Avi.Fishman@nuvoton.com, kfting@nuvoton.com,
hskinnemoen@google.com, titusr@google.com,
chli30@nuvoton.corp-partner.google.com, pbonzini@redhat.com,
jasowang@redhat.com, alistair@alistair23.me, philmd@linaro.org
Subject: Re: [PATCH v5 03/17] hw/ssi: Make flash size a property in NPCM7XX FIU
Date: Thu, 20 Feb 2025 15:21:27 +0000 [thread overview]
Message-ID: <CAFEAcA81OORsvepsy6BN5G3_UTaUjFtNLpp71TiukgJt4-S6LA@mail.gmail.com> (raw)
In-Reply-To: <20250219184609.1839281-4-wuhaotsh@google.com>
On Wed, 19 Feb 2025 at 18:46, Hao Wu <wuhaotsh@google.com> wrote:
>
> This allows different FIUs to have different flash sizes, useful
> in NPCM8XX which has multiple different sized FIU modules.
>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Hao Wu <wuhaotsh@google.com>
> Reviewed-by: Philippe Mathieu-Daude <philmd@linaro.org>
> @@ -543,6 +554,7 @@ static const VMStateDescription vmstate_npcm7xx_fiu = {
>
> static const Property npcm7xx_fiu_properties[] = {
> DEFINE_PROP_INT32("cs-count", NPCM7xxFIUState, cs_count, 0),
> + DEFINE_PROP_SIZE("flash-size", NPCM7xxFIUState, flash_size, 0),
> };
>
> static void npcm7xx_fiu_class_init(ObjectClass *klass, void *data)
> diff --git a/include/hw/ssi/npcm7xx_fiu.h b/include/hw/ssi/npcm7xx_fiu.h
> index a3a1704289..1785ea16f4 100644
> --- a/include/hw/ssi/npcm7xx_fiu.h
> +++ b/include/hw/ssi/npcm7xx_fiu.h
> @@ -60,6 +60,7 @@ struct NPCM7xxFIUState {
> int32_t cs_count;
> int32_t active_cs;
> qemu_irq *cs_lines;
> + size_t flash_size;
> NPCM7xxFIUFlash *flash;
>
> SSIBus *spi;
The field for a DEFINE_PROP_SIZE must be a uint64_t, or it
won't build on 32-bit hosts:
In file included from ../include/qemu/osdep.h:53,
from ../hw/ssi/npcm7xx_fiu.c:17:
../include/qemu/compiler.h:65:35: error: invalid operands to binary -
(have ‘uint64_t *’ {aka ‘long long unsigned int *’} and ‘size_t *’
{aka ‘unsigned int *’})
65 | #define type_check(t1,t2) ((t1*)0 - (t2*)0)
| ^
../include/hw/qdev-properties.h:71:15: note: in expansion of macro ‘type_check’
71 | + type_check(_type, typeof_field(_state, _field)), \
| ^~~~~~~~~~
../include/hw/qdev-properties.h:90:5: note: in expansion of macro ‘DEFINE_PROP’
90 | DEFINE_PROP(_name, _state, _field, _prop, _type, \
| ^~~~~~~~~~~
../include/hw/qdev-properties.h:166:5: note: in expansion of macro
‘DEFINE_PROP_UNSIGNED’
166 | DEFINE_PROP_UNSIGNED(_n, _s, _f, _d, qdev_prop_size, uint64_t)
| ^~~~~~~~~~~~~~~~~~~~
../hw/ssi/npcm7xx_fiu.c:557:5: note: in expansion of macro ‘DEFINE_PROP_SIZE’
557 | DEFINE_PROP_SIZE("flash-size", NPCM7xxFIUState, flash_size, 0),
| ^~~~~~~~~~~~~~~~
-- PMM
next prev parent reply other threads:[~2025-02-20 15:22 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-19 18:45 [PATCH v5 00/17] hw/arm: Add NPCM8XX Support Hao Wu
2025-02-19 18:45 ` [PATCH v5 01/17] roms: Update vbootrom to 1287b6e Hao Wu
2025-02-19 18:45 ` [PATCH v5 02/17] pc-bios: Add NPCM8XX vBootrom Hao Wu
2025-02-19 18:45 ` [PATCH v5 03/17] hw/ssi: Make flash size a property in NPCM7XX FIU Hao Wu
2025-02-20 15:21 ` Peter Maydell [this message]
2025-02-19 18:45 ` [PATCH v5 04/17] hw/misc: Rename npcm7xx_gcr to npcm_gcr Hao Wu
2025-02-19 18:45 ` [PATCH v5 05/17] hw/misc: Move NPCM7XX GCR to NPCM GCR Hao Wu
2025-02-19 18:45 ` [PATCH v5 06/17] hw/misc: Add nr_regs and cold_reset_values " Hao Wu
2025-02-24 20:52 ` Pierrick Bouvier
2025-02-24 20:54 ` Hao Wu
2025-02-25 13:49 ` Peter Maydell
2025-02-19 18:45 ` [PATCH v5 07/17] hw/misc: Add support for NPCM8XX GCR Hao Wu
2025-02-19 18:45 ` [PATCH v5 08/17] hw/misc: Store DRAM size in NPCM8XX GCR Module Hao Wu
2025-02-19 18:46 ` [PATCH v5 09/17] hw/misc: Support 8-bytes memop in NPCM GCR module Hao Wu
2025-02-19 18:46 ` [PATCH v5 10/17] hw/misc: Rename npcm7xx_clk to npcm_clk Hao Wu
2025-02-19 18:46 ` [PATCH v5 11/17] hw/misc: Move NPCM7XX CLK to NPCM CLK Hao Wu
2025-02-19 18:46 ` [PATCH v5 12/17] hw/misc: Add nr_regs and cold_reset_values " Hao Wu
2025-02-19 18:46 ` [PATCH v5 13/17] hw/misc: Support NPCM8XX CLK Module Registers Hao Wu
2025-02-19 18:46 ` [PATCH v5 14/17] hw/net: Add NPCM8XX PCS Module Hao Wu
2025-02-19 18:46 ` [PATCH v5 15/17] hw/arm: Add NPCM8XX SoC Hao Wu
2025-02-19 18:46 ` [PATCH v5 16/17] hw/arm: Add NPCM845 Evaluation board Hao Wu
2025-02-19 18:46 ` [PATCH v5 17/17] docs/system/arm: Add Description for NPCM8XX SoC Hao Wu
2025-02-20 16:18 ` [PATCH v5 00/17] hw/arm: Add NPCM8XX Support Peter Maydell
2025-02-20 16:53 ` Hao Wu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAFEAcA81OORsvepsy6BN5G3_UTaUjFtNLpp71TiukgJt4-S6LA@mail.gmail.com \
--to=peter.maydell@linaro.org \
--cc=Avi.Fishman@nuvoton.com \
--cc=alistair@alistair23.me \
--cc=chli30@nuvoton.corp-partner.google.com \
--cc=hskinnemoen@google.com \
--cc=jasowang@redhat.com \
--cc=kfting@nuvoton.com \
--cc=pbonzini@redhat.com \
--cc=philmd@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=titusr@google.com \
--cc=venture@google.com \
--cc=wuhaotsh@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).