From: Peter Maydell <peter.maydell@linaro.org>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: alex.bennee@linaro.org, qemu-devel@nongnu.org
Subject: Re: [PATCH] target/i386: do not access beyond the low 128 bits of SSE registers
Date: Wed, 13 Apr 2022 17:25:18 +0100 [thread overview]
Message-ID: <CAFEAcA85dC7qgTuCd-s39=1LuCT5DnMqps_ctwZGDJESx+Xpcw@mail.gmail.com> (raw)
In-Reply-To: <20220413160945.544176-1-pbonzini@redhat.com>
On Wed, 13 Apr 2022 at 17:09, Paolo Bonzini <pbonzini@redhat.com> wrote:
>
> The i386 target consolidates all vector registers so that instead of
> XMMReg, YMMReg and ZMMReg structs there is a single ZMMReg that can
> fit all of SSE, AVX and AVX512.
>
> When TCG copies data from and to the SSE registers, it uses the
> full 64-byte width. This is not a correctness issue because TCG
> never lets guest code see beyond the first 128 bits of the ZMM
> registers, however it causes uninitialized stack memory to
> make it to the CPU's migration stream.
>
> Fix it by only copying the low 16 bytes of the ZMMReg union into
> the destination register.
>
> +/*
> + * Copy the relevant parts of a Reg value around. In the case where
> + * sizeof(Reg) > SIZE, these helpers operate only on the lower bytes of
> + * a 64 byte ZMMReg, so we must copy only those and keep the top bytes
> + * untouched in the guest-visible destination destination register.
> + * Note that the "lower bytes" are placed last in memory on big-endian
> + * hosts, which store the vector backwards in memory. In that case the
> + * copy *starts* at B(SIZE - 1) and ends at B(0), the opposite of
> + * the little-endian case.
> + */
> +#ifdef HOST_WORDS_BIGENDIAN
> +#define MOVE(d, r) memcpy(&((d).B(SIZE - 1)), &(d).B(SIZE - 1), SIZE)
Still has the typo where it's copying d to d, not r to d.
> +#else
> +#define MOVE(d, r) memcpy(&(d).B(0), &(r).B(0), SIZE)
> +#endif
Otherwise
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
next prev parent reply other threads:[~2022-04-13 16:26 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-13 16:09 [PATCH] target/i386: do not access beyond the low 128 bits of SSE registers Paolo Bonzini
2022-04-13 16:25 ` Peter Maydell [this message]
2022-04-13 18:44 ` Alex Bennée
2022-04-13 20:11 ` Paolo Bonzini
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