From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:53348) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UD1D0-0002nS-Lv for qemu-devel@nongnu.org; Tue, 05 Mar 2013 18:23:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UD1Cz-0002UE-Pd for qemu-devel@nongnu.org; Tue, 05 Mar 2013 18:23:46 -0500 Received: from mail-wg0-f43.google.com ([74.125.82.43]:33558) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UD1Cz-0002Ty-Iz for qemu-devel@nongnu.org; Tue, 05 Mar 2013 18:23:45 -0500 Received: by mail-wg0-f43.google.com with SMTP id e12so6754819wge.22 for ; Tue, 05 Mar 2013 15:23:43 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <1362510056-3316-2-git-send-email-pbonzini@redhat.com> References: <1362510056-3316-1-git-send-email-pbonzini@redhat.com> <1362510056-3316-2-git-send-email-pbonzini@redhat.com> From: Peter Maydell Date: Wed, 6 Mar 2013 07:23:23 +0800 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v2 1/3] cpu: make CPU_INTERRUPT_RESET available on all targets List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: lersek@redhat.com, aliguori@us.ibm.com, dwmw2@infradead.org, qemu-devel@nongnu.org, afaerber@suse.de On 6 March 2013 03:00, Paolo Bonzini wrote: > On the x86, some devices need access to the CPU reset pin (INIT#). > Provide a generic service to do this, using one of the internal > cpu_interrupt targets. Generalize the PPC-specific code for > CPU_INTERRUPT_RESET to other targets, and provide a function that > will raise the interrupt on all CPUs. Not sure this makes sense -- reset isn't an interrupt... -- PMM