qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: Navid Emamdoost <navidem@google.com>
Cc: qemu-devel@nongnu.org, farosas@suse.de, lvivier@redhat.com,
	 pbonzini@redhat.com, zsm@google.com, alxndr@bu.edu,
	 John Snow <jsnow@redhat.com>,
	"open list:IDE" <qemu-block@nongnu.org>
Subject: Re: [PATCH v2 3/5] tests/qtest: ahci-test: Check only implemented ports in verify_state
Date: Thu, 27 Nov 2025 13:27:34 +0000	[thread overview]
Message-ID: <CAFEAcA8=5g2zLQ_ueGv0oV-tRVOrD_GasXVGEHMRjHOC_GLksA@mail.gmail.com> (raw)
In-Reply-To: <20251127001247.1672873-4-navidem@google.com>

On Thu, 27 Nov 2025 at 00:12, Navid Emamdoost <navidem@google.com> wrote:
>
> The verify_state helper function in ahci-test.c incorrectly
> assumed that all 32 potential AHCI ports were implemented. During post-
> migration checks, it would loop through all 32 ports, attempting to
> read registers for non-existent ones.
> This resulted in an out-of-bounds access on the main HBA BAR. This
> latent bug was exposed by the recent introduction of strict bounds
> checking in the libqos PCI accessors, which now correctly triggers a
> fatal assertion.
> Fix this by modifying the loop in verify_state to first read the
> AHCI_PI (Ports Implemented) register and then only check the state
> for ports that the device reports as present.
>
> Signed-off-by: Navid Emamdoost <navidem@google.com>
> ---
>  tests/qtest/ahci-test.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/tests/qtest/ahci-test.c b/tests/qtest/ahci-test.c
> index e8aabfc13f..06c5bd08d8 100644
> --- a/tests/qtest/ahci-test.c
> +++ b/tests/qtest/ahci-test.c
> @@ -81,6 +81,7 @@ static void string_bswap16(uint16_t *s, size_t bytes)
>  static void verify_state(AHCIQState *ahci, uint64_t hba_old)
>  {
>      int i, j;
> +    uint32_t ports_impl;
>      uint32_t ahci_fingerprint;
>      uint64_t hba_base;
>      AHCICommandHeader cmd;
> @@ -99,7 +100,14 @@ static void verify_state(AHCIQState *ahci, uint64_t hba_old)
>      g_assert_cmphex(ahci_rreg(ahci, AHCI_CAP), ==, ahci->cap);
>      g_assert_cmphex(ahci_rreg(ahci, AHCI_CAP2), ==, ahci->cap2);
>
> +    ports_impl = ahci_rreg(ahci, AHCI_PI);
> +
>      for (i = 0; i < 32; i++) {
> +
> +        if (!(ports_impl & (1 << i))) {

We should use "1U << i" here, because coverity will probably
complain about shifting into the sign bit of a signed integer
otherwise.

> +            continue; /* Skip unimplemented ports */
> +        }
> +
>          g_assert_cmphex(ahci_px_rreg(ahci, i, AHCI_PX_FB), ==,
>                          ahci->port[i].fb);
>          g_assert_cmphex(ahci_px_rreg(ahci, i, AHCI_PX_CLB), ==,

Otherwise
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM


  reply	other threads:[~2025-11-27 13:28 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-08 19:19 [PATCH 1/2] libqos: pci: Avoid fatal assert on zero-sized BARs in fuzz builds Navid Emamdoost
2025-10-08 19:19 ` [PATCH 2/2] tests/qtest/fuzz: Add generic fuzzer for pcie-pci-bridge Navid Emamdoost
2025-10-10 15:58 ` [PATCH 1/2] libqos: pci: Avoid fatal assert on zero-sized BARs in fuzz builds Alexander Bulekov
2025-10-14  1:14   ` Navid Emamdoost
2025-11-06 18:41     ` Navid Emamdoost
2025-11-13 14:02 ` Peter Maydell
2025-11-25  2:30   ` Navid Emamdoost
2025-11-25 10:01     ` Peter Maydell
2025-11-27  0:12       ` [PATCH v2 0/5] tests/qtest: Rework libqos PCI BAR handling to support fuzzing Navid Emamdoost
2025-11-27  0:12         ` [PATCH v2 1/5] libqos: pci: Handle zero-sized BARs gracefully Navid Emamdoost
2025-11-27 13:17           ` Peter Maydell
2025-12-05  4:16             ` Navid Emamdoost
2025-11-27  0:12         ` [PATCH v2 2/5] libqos: pci: Require size for legacy I/O port mapping Navid Emamdoost
2025-11-27 13:24           ` Peter Maydell
2025-11-27  0:12         ` [PATCH v2 3/5] tests/qtest: ahci-test: Check only implemented ports in verify_state Navid Emamdoost
2025-11-27 13:27           ` Peter Maydell [this message]
2025-11-27  0:12         ` [PATCH v2 4/5] tests/qtest: Rework nvmetest_oob_cmb_test for BAR check Navid Emamdoost
2025-11-27 13:29           ` Peter Maydell
2025-11-27  0:12         ` [PATCH v2 5/5] tests/qtest/fuzz: Add generic fuzzer for pcie-pci-bridge Navid Emamdoost

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAFEAcA8=5g2zLQ_ueGv0oV-tRVOrD_GasXVGEHMRjHOC_GLksA@mail.gmail.com' \
    --to=peter.maydell@linaro.org \
    --cc=alxndr@bu.edu \
    --cc=farosas@suse.de \
    --cc=jsnow@redhat.com \
    --cc=lvivier@redhat.com \
    --cc=navidem@google.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-block@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=zsm@google.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).