From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57438) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WAelR-0004R7-3Q for qemu-devel@nongnu.org; Tue, 04 Feb 2014 07:06:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WAelM-0004pU-Qc for qemu-devel@nongnu.org; Tue, 04 Feb 2014 07:06:05 -0500 Received: from mail-la0-f51.google.com ([209.85.215.51]:56718) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WAelM-0004pM-K2 for qemu-devel@nongnu.org; Tue, 04 Feb 2014 07:06:00 -0500 Received: by mail-la0-f51.google.com with SMTP id c6so6506899lan.10 for ; Tue, 04 Feb 2014 04:05:59 -0800 (PST) MIME-Version: 1.0 In-Reply-To: References: <1389870811-4504-1-git-send-email-peter.maydell@linaro.org> From: Peter Maydell Date: Tue, 4 Feb 2014 12:05:39 +0000 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v2 0/5] disas: add libvixl to support A64 disassembly List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Laurent Desnogues Cc: Patch Tracking , Stefan Weil , Claudio Fontana , Alexander Graf , QEMU Developers , Blue Swirl , Aurelien Jarno , Anthony Liguori , =?UTF-8?B?QWxleCBCZW5uw6ll?= , "kvmarm@lists.cs.columbia.edu" , Christoffer Dall , Richard Henderson On 4 February 2014 11:47, Laurent Desnogues wrote: > On Wed, Jan 29, 2014 at 9:51 PM, Peter Maydell wrote: >> On 29 January 2014 20:01, Laurent Desnogues wrote: >>> On Tue, Jan 28, 2014 at 12:45 PM, Peter Maydell >>> wrote: >>>> Ping for review/testing/comments on this version, please? >>> >>> I still dislike the idea of importing so much code in particular for >>> something that is incomplete: as far as I can see, AdvSIMD >>> instructions are not supported. The very least that should be >>> done would be to add a file that gives a rough status of what is >>> and what is not implemented. >> >> I can add some text to a brief README file, sure. >> >>> And what if the vixl authors never implement AdvSIMD? This >>> is the most difficult part of Aarch64 to disassemble (integer and >>> FP instructions are really easy to disassemble). Will someone >>> add these and will vixl authors accept the changes or will we >>> then start diverging from vixl implementation? Is vixl even still >>> supported or in development (no commit for 6 months)? >> >> As I understand the situation, it is supported but the model >> is more "we'll push out a release occasionally when we've >> done a big chunk of work" rather than a continuously updated >> public-facing git tree. >> >> This is no worse at all (in fact better) than the situation we have >> with the binutils disassemblers in the tree at the moment -- those >> are effectively totally unmaintained by their upstream as >> a result of the GPL2/GPL3 split. >> >> I agree that it would be nice if we supported the SIMD >> instructions in the disassembler. Adding them to vixl >> should be no worse than adding them to anything else, >> and I'd rather have a disassembler that supported at >> least the integer set than none at all. > > That looks OK to me. Thanks. Here's some proposed text for a disas/libvixl/README: ===begin=== The code in this directory is a subset of libvixl: https://github.com/armvixl/vixl (specifically, it is the set of files needed for disassembly only, taken from libvixl 1.1). Bugfixes should preferably be sent upstream initially. The disassembler does not currently support the entire A64 instruction set. Notably: * No Advanced SIMD support. * Limited support for system instructions. * A few miscellaneous integer and floating point instructions are missing. ===endit=== (borrowed from https://github.com/armvixl/vixl/README.md and edited to remove things that only really apply to the simulator). thanks -- PMM