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X-Received-From: 2607:f8b0:4864:20::344 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S. Tsirkin" , QEMU Developers , Shannon Zhao , qemu-arm , Heyi Guo , wanghaibin.wang@huawei.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Tue, 10 Dec 2019 at 13:49, Igor Mammedov wrote: > > On Mon, 9 Dec 2019 17:51:10 +0000 > Peter Maydell wrote: > > > On Mon, 9 Dec 2019 at 06:38, Heyi Guo wrote: > > > > > > After the introduction of generic PCIe root port and PCIe-PCI bridge, we will > > > also have SHPC controller on ARM, and we don't support ACPI hot plug, so just > > > enable SHPC native hot plug. > > > > > > Igor also spotted the store operation outside of bit and/or is not necessary, so > > > simply the code at first. > > > > > > v6: > > > - Fix "make check" errors by updating tests/data/acpi/virt/DSDT*. > > > > > > v5: > > > - Refine commit message of patch 1/2 > > > > > > v4: > > > - Improve the code indention. > > > > > > Cc: Shannon Zhao > > > Cc: Peter Maydell > > > Cc: "Michael S. Tsirkin" > > > Cc: Igor Mammedov > > > > Thanks, applied to target-arm.next. (it's a bit awkward that acpi > > table updates require also updating a bunch of binary test files, > > but I suppose trying to make the golden-reference be some textual > > format would be not very feasible.) > > Michael tried document it (commit 30c63d4fbd69) > so that binary blobs would not be required (trusted). > > Problem is usually in blobs being un-review-able and > unresolvable merge conflicts, that's why Michael > updates tables manually for all changes in pull req. A workflow that requires me to do a blob update when I apply patches to target-arm.next isn't going to work for me. If Michael wants the blobs to be handled like that, then all patches which need to touch them will have to go via his tree. thanks -- PMM