From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([2001:4830:134:3::10]:45234)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1YgAsd-0004P4-8c
	for qemu-devel@nongnu.org; Thu, 09 Apr 2015 07:44:20 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1YgAsZ-0005D8-1C
	for qemu-devel@nongnu.org; Thu, 09 Apr 2015 07:44:19 -0400
Received: from mail-ig0-f172.google.com ([209.85.213.172]:37678)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1YgAsY-0005Ck-Sc
	for qemu-devel@nongnu.org; Thu, 09 Apr 2015 07:44:14 -0400
Received: by igblo3 with SMTP id lo3so62128115igb.0
	for <qemu-devel@nongnu.org>; Thu, 09 Apr 2015 04:44:14 -0700 (PDT)
MIME-Version: 1.0
In-Reply-To: <5526651F.7080908@redhat.com>
References: <1428437400-8474-1-git-send-email-peter.maydell@linaro.org>
	<1428437400-8474-7-git-send-email-peter.maydell@linaro.org>
	<20150409095904.GH30629@toto>
	<CAFEAcA_mVTnVAuekCFm=s4cfhoVi2cH2D1niJzEMNY=dbYjLzg@mail.gmail.com>
	<552652AA.5070701@redhat.com>
	<CAFEAcA-EhmJWzvsEMZH8AvJjdvNHScD0eCg6LiBmLG-UMVs0=w@mail.gmail.com>
	<5526651F.7080908@redhat.com>
From: Peter Maydell <peter.maydell@linaro.org>
Date: Thu, 9 Apr 2015 12:43:54 +0100
Message-ID: <CAFEAcA8DgxTCAyXXZ7z5+ppoK-OaqyNmXvNe_qd+E_Bd=U6stw@mail.gmail.com>
Content-Type: text/plain; charset=UTF-8
Subject: Re: [Qemu-devel] [PATCH 06/14] exec.c: Make address_space_rw take
	transaction attributes
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Crosthwaite <peter.crosthwaite@xilinx.com>, Patch Tracking <patches@linaro.org>, QEMU Developers <qemu-devel@nongnu.org>, Greg Bellows <greg.bellows@linaro.org>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, =?UTF-8?B?QWxleCBCZW5uw6ll?= <alex.bennee@linaro.org>, Richard Henderson <rth@twiddle.net>

On 9 April 2015 at 12:40, Paolo Bonzini <pbonzini@redhat.com> wrote:
>
>
> On 09/04/2015 12:43, Peter Maydell wrote:
>> > At this point, some memory barriers, basically.
>>
>> So what distinguishes a device that needs the memory barriers
>> and does its accesses via dma_* from a device that doesn't and
>> uses address_space_* or ld/st*_phys ? (Or for that matter a
>> non-device that does memory accesses...)
>
> I don't know exactly, I didn't follow the discussion very much back
> then.  The memory barriers were fixing PPC bugs; PCI devices definitely
> need them.

I suspect that actually we need barriers in a lot more places
and there shouldn't really be a separate set of APIs here;
it's just that nobody's tried using the wider set of devices
in PPC KVM systems.

-- PMM