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From: Peter Maydell <peter.maydell@linaro.org>
To: Vacha Bhavsar <vacha.bhavsar@oss.qualcomm.com>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org
Subject: Re: [PATCH v2 0/2] target/arm: Fix big-endian handling for NEON and SVE gdb remote debugging
Date: Fri, 1 Aug 2025 15:01:17 +0100	[thread overview]
Message-ID: <CAFEAcA8DqD+iBOaQu0M1_-1AiWna0pgf+gD39+x+nNx+9c45LA@mail.gmail.com> (raw)
In-Reply-To: <20250722173736.2332529-1-vacha.bhavsar@oss.qualcomm.com>

On Tue, 22 Jul 2025 at 18:37, Vacha Bhavsar
<vacha.bhavsar@oss.qualcomm.com> wrote:
>
> Upon examining the current implementation for getting/setting SIMD
> and SVE registers via remote GDB, there is a concern about mixed
> endian support. This patch series aims to address this concern and
> allow getting and setting the values of NEON and SVE registers via
> remote GDB regardless of the target endianness.

Thanks; I've applied these patches to target-arm.next (with
a bit of tweaking of the commit messages).

Something seems to have gone wrong with the creation of
this cover letter, by the way: it lists a lot of
patches that aren't in it.

> Glenn Miles (12):
>   ppc/xive2: Fix calculation of END queue sizes
>   ppc/xive2: Use fair irq target search algorithm
>   ppc/xive2: Fix irq preempted by lower priority group irq

[etc]

thanks
-- PMM


  parent reply	other threads:[~2025-08-01 14:02 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-22 17:37 [PATCH v2 0/2] target/arm: Fix big-endian handling for NEON and SVE gdb remote debugging Vacha Bhavsar
2025-07-22 17:37 ` [PATCH v2 1/2] target/arm: Fix big-endian handling of NEON " Vacha Bhavsar
2025-07-22 17:37 ` [PATCH v2 2/2] target/arm: Fix big-endian handling of SVE " Vacha Bhavsar
2025-08-01 14:01 ` Peter Maydell [this message]
2025-08-01 18:21   ` [PATCH v2 0/2] target/arm: Fix big-endian handling for NEON and " Vacha Bhavsar

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