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bh=rGYwOgcAUPynPg2lojlXUG7dNbcVuKkdrfVA3emSyFg=; b=OB/ETTzHzzLNKOHINOP15JETtjJ3iKM4NF5l1+K44hkmm8tGzHoA8DwDHT3TJ14i3a d0F5Lcn23kXVKbK9kEnk00V9QmKHK+r9091IM3rN5lEYzljsOHyhEj5SJSkcSlTuTXg9 AVk3aS99cvViHkMupDpUvjISSQtbDZF1hh9szREZ1h8jXSPfhYQ0R2QK9fqv9Ms670bE ugHaTGvc/Hh9EswPwdjDfpZFeNidSS7b77GUt+fwQiIwvH2D682TG4/juBgAUdTczZMP f5KMHHmVkdy0Y6nTFNyudvIXB1alqi0RVWoRAuUjPRGR3LXQO/Wesu0d81wDzng3Mjru M3yg== X-Forwarded-Encrypted: i=1; AJvYcCXZKOS2iHj5R1BG0uR3yNUPKPt3hryHQ7OAbg930RrGWAK+F9byiGVAeVRdXAU8TNd+PqlL5wDzGS2kgdIYjMoiIrKWgzE= X-Gm-Message-State: AOJu0Yx+rL6bwUDDZPZnR4PbSgamp+fOLXPpY2zEb74YF7+5i36HQqNy vQPe6SCgEnIb8gHwZZllegKLeZDUk18Y3xejjJaySePivd3B96PA3YKvCW4EcdzGY5UEpyh12ao TRqQ49+g7bILNKc99Vg8aTAe1eT1pXoJNgv6BlA== X-Google-Smtp-Source: AGHT+IFr+3QWgFhn6VxiuH13c/6D9CsxG+QEjJ2sZn/YfD2cnK34vGYsVQa71lDyPmCbMfv5xp2kGgK5nnL1E9LOawg= X-Received: by 2002:a50:a6d0:0:b0:56b:94e3:856c with SMTP id f16-20020a50a6d0000000b0056b94e3856cmr1670037edc.36.1712242056771; Thu, 04 Apr 2024 07:47:36 -0700 (PDT) MIME-Version: 1.0 References: <20240403101611.3204086-1-ruanjinjie@huawei.com> <20240403101611.3204086-11-ruanjinjie@huawei.com> In-Reply-To: <20240403101611.3204086-11-ruanjinjie@huawei.com> From: Peter Maydell Date: Thu, 4 Apr 2024 15:47:26 +0100 Message-ID: Subject: Re: [PATCH v12 10/23] hw/arm/virt: Wire NMI and VINMI irq lines from GIC to CPU To: Jinjie Ruan Cc: eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, wangyanan55@huawei.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, qemu-arm@nongnu.org Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=peter.maydell@linaro.org; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, 3 Apr 2024 at 11:18, Jinjie Ruan wrote: > > Wire the new NMI and VINMI interrupt line from the GIC to each CPU. > > Signed-off-by: Jinjie Ruan > Reviewed-by: Richard Henderson > --- > v9: > - Rename ARM_CPU_VNMI to ARM_CPU_VINMI. > - Update the commit message. > v4: > - Add Reviewed-by. > v3: > - Also add VNMI wire. > --- > hw/arm/virt.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/hw/arm/virt.c b/hw/arm/virt.c > index a9a913aead..ef2e6c2c4d 100644 > --- a/hw/arm/virt.c > +++ b/hw/arm/virt.c > @@ -821,7 +821,8 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem) > > /* Wire the outputs from each CPU's generic timer and the GICv3 > * maintenance interrupt signal to the appropriate GIC PPI inputs, > - * and the GIC's IRQ/FIQ/VIRQ/VFIQ interrupt outputs to the CPU's inputs. > + * and the GIC's IRQ/FIQ/VIRQ/VFIQ/NMI/VINMI interrupt outputs to the > + * CPU's inputs. > */ > for (i = 0; i < smp_cpus; i++) { > DeviceState *cpudev = DEVICE(qemu_get_cpu(i)); > @@ -865,6 +866,10 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem) > qdev_get_gpio_in(cpudev, ARM_CPU_VIRQ)); > sysbus_connect_irq(gicbusdev, i + 3 * smp_cpus, > qdev_get_gpio_in(cpudev, ARM_CPU_VFIQ)); > + sysbus_connect_irq(gicbusdev, i + 4 * smp_cpus, > + qdev_get_gpio_in(cpudev, ARM_CPU_NMI)); > + sysbus_connect_irq(gicbusdev, i + 5 * smp_cpus, > + qdev_get_gpio_in(cpudev, ARM_CPU_VINMI)); > } This patch needs to go after patch 11. Otherwise at this point in the patchseries we are trying to wire up GPIOs on the GIC which don't exist, and QEMU will assert: $ ./build/x86/qemu-system-aarch64 -M virt,gic-version=3 Unexpected error in object_property_find_err() at ../../qom/object.c:1366: qemu-system-aarch64: Property 'arm-gicv3.sysbus-irq[4]' not found Aborted (core dumped) We also need to only connect these up if vms->gic_version is not VIRT_GIC_VERSION_2. This is because these GPIOs don't exist on the GICv2, and otherwise we again assert if you try to wire them up but you're using GICv2: $ ./build/x86/qemu-system-aarch64 -M virt,gic-version=2 Unexpected error in object_property_find_err() at ../../qom/object.c:1366: qemu-system-aarch64: Property 'arm_gic.sysbus-irq[4]' not found Aborted (core dumped) thanks -- PMM