From: Peter Maydell <peter.maydell@linaro.org>
To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: Chris Rauer <crauer@google.com>,
alistair@alistair23.me, qemu-devel@nongnu.org
Subject: Re: [PATCH] hw/ssi: Fix Linux driver init issue with xilinx_spi
Date: Fri, 31 Mar 2023 11:11:28 +0100 [thread overview]
Message-ID: <CAFEAcA8F=GHxNx6S60WPjnk6PgS5a6A19OOeb6GHjo2Rz1i-MQ@mail.gmail.com> (raw)
In-Reply-To: <CAJy5ezqP50f3frM0tBNOHo4-4PaeaMA7-YXAd8G_w+iRqu2cjw@mail.gmail.com>
On Fri, 31 Mar 2023 at 11:09, Edgar E. Iglesias
<edgar.iglesias@gmail.com> wrote:
>
>
> On Thu, Mar 23, 2023 at 7:29 PM Chris Rauer <crauer@google.com> wrote:
>>
>> The problem is that the Linux driver expects the master transaction inhibit
>> bit(R_SPICR_MTI) to be set during driver initialization so that it can
>> detect the fifo size but QEMU defaults it to zero out of reset. The
>> datasheet indicates this bit is active on reset.
>>
>> See page 25, SPI Control Register section:
>> https://www.xilinx.com/content/dam/xilinx/support/documents/ip_documentation/axi_quad_spi/v3_2/pg153-axi-quad-spi.pdf
>>
>
> Yes, MTI should be set when the device comes out of reset.
>
> Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Thanks; applied to target-arm.next for 8.0.
-- PMM
prev parent reply other threads:[~2023-03-31 10:12 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-23 18:28 [PATCH] hw/ssi: Fix Linux driver init issue with xilinx_spi Chris Rauer
2023-03-30 9:51 ` Peter Maydell
2023-03-31 10:09 ` Edgar E. Iglesias
2023-03-31 10:11 ` Peter Maydell [this message]
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