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From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <rth@twiddle.net>
Cc: "Peter Crosthwaite" <peter.crosthwaite@xilinx.com>,
	"Patch Tracking" <patches@linaro.org>,
	"Michael Matz" <matz@suse.de>, "Alexander Graf" <agraf@suse.de>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Claudio Fontana" <claudio.fontana@linaro.org>,
	"Dirk Mueller" <dmueller@suse.de>,
	"Will Newton" <will.newton@linaro.org>,
	"Laurent Desnogues" <laurent.desnogues@gmail.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
	"Christoffer Dall" <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 7/8] softfloat: Support halving the result of muladd operation
Date: Mon, 10 Feb 2014 21:31:52 +0000	[thread overview]
Message-ID: <CAFEAcA8FgxTFnpYOmC-x8XEOv1=RNBbvzGBe5xOw9n1-MSEd7A@mail.gmail.com> (raw)
In-Reply-To: <52F93349.8040106@twiddle.net>

On 10 February 2014 20:15, Richard Henderson <rth@twiddle.net> wrote:
> On 02/07/2014 01:49 PM, Peter Maydell wrote:
>>          /* Zero plus something non-zero : just return the something */
>> +        if (flags & float_muladd_halve_result) {
>> +            if (cExp == 0) {
>> +                shift32RightJamming(cSig, 1, &cSig);
>> +            } else if (cExp == 1) {
>> +                shift32RightJamming(cSig, 1, &cSig);
>> +                cSig |= (1 << 22);
>> +                cExp = 0;
>> +            } else {
>> +                cExp--;
>> +            }
>
> Surely better to just use roundAndPackFloat for this case.  Looks to me that
> you're missing inexact and underflow exceptions at least.

Good point.

thanks
-- PMM

  reply	other threads:[~2014-02-10 21:32 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-02-07 21:49 [Qemu-devel] [PATCH 0/8] A64: Neon support, fourth set Peter Maydell
2014-02-07 21:49 ` [Qemu-devel] [PATCH 1/8] target-arm: A64: Implement plain vector SIMD indexed element insns Peter Maydell
2014-02-11 14:52   ` Peter Maydell
2014-02-07 21:49 ` [Qemu-devel] [PATCH 2/8] target-arm: A64: Implement long vector x indexed insns Peter Maydell
2014-02-07 21:49 ` [Qemu-devel] [PATCH 3/8] target-arm: A64: Implement SIMD scalar indexed instructions Peter Maydell
2014-02-07 21:49 ` [Qemu-devel] [PATCH 4/8] target-arm: A64: Implement scalar three different instructions Peter Maydell
2014-02-07 21:49 ` [Qemu-devel] [PATCH 5/8] target-arm: A64: Implement SIMD FP compare and set insns Peter Maydell
2014-02-07 21:49 ` [Qemu-devel] [PATCH 6/8] target-arm: A64: Implement floating point pairwise insns Peter Maydell
2014-02-07 21:49 ` [Qemu-devel] [PATCH 7/8] softfloat: Support halving the result of muladd operation Peter Maydell
2014-02-10 20:15   ` Richard Henderson
2014-02-10 21:31     ` Peter Maydell [this message]
2014-02-07 21:49 ` [Qemu-devel] [PATCH 8/8] target-arm: A64: Implement remaining 3-same instructions Peter Maydell
2014-02-10 20:15 ` [Qemu-devel] [PATCH 0/8] A64: Neon support, fourth set Richard Henderson

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