* [Qemu-devel] [PATCH Risu v2 0/3] PPC64 Improvements
@ 2017-03-09 18:38 Jose Ricardo Ziviani
2017-03-09 18:38 ` [Qemu-devel] [PATCH Risu v2 1/3] risugen_ppc64: Load random 128-bit data to VSX registers Jose Ricardo Ziviani
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Jose Ricardo Ziviani @ 2017-03-09 18:38 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, nikunj
v2:
- applied code review
This patchset include initial support to PPC64 (Big-Endian), that is pretty
much the same: only some fixes in configure and risugen.
Also, it adds a better random initialization of VSX registers.
Jose Ricardo Ziviani (3):
risugen_ppc64: Load random 128-bit data to VSX registers
configure: Add initial support to PPC64 (big endian)
risugen,risugen_ppc64.pm: Add support ppc64 (big-endian)
configure | 9 ++++-----
risugen | 6 +++++-
risugen_ppc64.pm | 44 +++++++++++++++++++++++++++++++++-----------
3 files changed, 42 insertions(+), 17 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH Risu v2 1/3] risugen_ppc64: Load random 128-bit data to VSX registers
2017-03-09 18:38 [Qemu-devel] [PATCH Risu v2 0/3] PPC64 Improvements Jose Ricardo Ziviani
@ 2017-03-09 18:38 ` Jose Ricardo Ziviani
2017-03-09 18:38 ` [Qemu-devel] [PATCH Risu v2 2/3] configure: Add initial support to PPC64 (big endian) Jose Ricardo Ziviani
2017-03-09 18:38 ` [Qemu-devel] [PATCH Risu v2 3/3] risugen, risugen_ppc64.pm: Add support ppc64 (big-endian) Jose Ricardo Ziviani
2 siblings, 0 replies; 6+ messages in thread
From: Jose Ricardo Ziviani @ 2017-03-09 18:38 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, nikunj
Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
---
risugen_ppc64.pm | 40 +++++++++++++++++++++++++++++-----------
1 file changed, 29 insertions(+), 11 deletions(-)
diff --git a/risugen_ppc64.pm b/risugen_ppc64.pm
index 341478c..45f7220 100644
--- a/risugen_ppc64.pm
+++ b/risugen_ppc64.pm
@@ -99,6 +99,29 @@ sub write_mov_ri64($$)
insn32((0x3e << 26) | (20 << 21) | (1 << 16) | 0x10);
}
+sub write_mov_ri128($$$$)
+{
+ my ($imhh, $imh, $iml, $imll) = @_;
+
+ # store the lowest 32 bits
+ write_mov_ri32(20, $imll);
+ # stw r20, 16(r1)
+ insn32((0x24 << 26) | (20 << 21) | (1 << 16) | 0x10);
+ # store the lower 32 bits
+ write_mov_ri32(20, $iml);
+ # stw r20, 20(r1)
+ insn32((0x24 << 26) | (20 << 21) | (1 << 16) | 0x14);
+ # store the higher 32 bits
+ write_mov_ri32(20, $imh);
+ # stw r20, 24(r1)
+ insn32((0x24 << 26) | (20 << 21) | (1 << 16) | 0x18);
+ # store the highest 32 bits
+ write_mov_ri32(20, $imhh);
+ # stw r20, 28(r1)
+ insn32((0x24 << 26) | (20 << 21) | (1 << 16) | 0x1c);
+
+}
+
sub write_random_ppc64_fpdata()
{
for (my $i = 0; $i < 32; $i++) {
@@ -106,22 +129,16 @@ sub write_random_ppc64_fpdata()
write_mov_ri64(rand(0xfffff), rand(0xfffff));
# since the EA is r1+16, load such value in FP reg
insn32((0x32 << 26) | ($i << 21) | (0x1 << 16) | 0x10);
- insn32((0x39 << 26) | ($i << 21) | (0x1 << 16) | 0x12);
-
}
}
-sub write_random_ppc64_fpdata_i()
+sub write_random_ppc64_vsxdata()
{
- # get an space from the stack
- insn32(0x3ac10020); # addi r22, r1, 32
- insn32(0x3ee03ff0); # lis r23, 0x3ff0
- insn32(0x3af70000); # addi r23, r23, 0
- insn32(0xfaf60000); # std r23, 0(r22)
-
for (my $i = 0; $i < 32; $i++) {
- # lfd f$i, 0(r22)
- insn32((0x32 << 26 | $i << 21 | 0x16 << 16));
+ # load a random doubleword value at r0
+ write_mov_ri128(rand(0xffff), rand(0xffff), rand(0xfffff), rand(0xfffff));
+ # load the 128-bit data in a vector register
+ insn32((0x3d << 26) | (($i >> 1) << 21) | (0x1 << 16) | (0x10 << 5) | (($i & 1) << 4) | 0x1);
}
}
@@ -172,6 +189,7 @@ sub write_random_register_data($)
clear_vr_registers();
+ write_random_ppc64_vsxdata();
if ($fp_enabled) {
# load floating point / SIMD registers
write_random_ppc64_fpdata();
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH Risu v2 2/3] configure: Add initial support to PPC64 (big endian)
2017-03-09 18:38 [Qemu-devel] [PATCH Risu v2 0/3] PPC64 Improvements Jose Ricardo Ziviani
2017-03-09 18:38 ` [Qemu-devel] [PATCH Risu v2 1/3] risugen_ppc64: Load random 128-bit data to VSX registers Jose Ricardo Ziviani
@ 2017-03-09 18:38 ` Jose Ricardo Ziviani
2017-03-13 11:10 ` Peter Maydell
2017-03-09 18:38 ` [Qemu-devel] [PATCH Risu v2 3/3] risugen, risugen_ppc64.pm: Add support ppc64 (big-endian) Jose Ricardo Ziviani
2 siblings, 1 reply; 6+ messages in thread
From: Jose Ricardo Ziviani @ 2017-03-09 18:38 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, nikunj
This commit set Makefile to point to ppc64le source for both archs
(ppc64 and ppc64le) because they do the exact same thing. The
difference is in risugen and how the binary is build.
Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
---
configure | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/configure b/configure
index 055e6d6..dd64d8b 100755
--- a/configure
+++ b/configure
@@ -51,11 +51,7 @@ guess_arch() {
elif check_define __aarch64__ ; then
ARCH="aarch64"
elif check_define __powerpc64__ ; then
- if check_define __BIG_ENDIAN__; then
- ARCH="ppc64"
- else
- ARCH="ppc64le"
- fi
+ ARCH="ppc64le"
else
echo "This cpu is not supported by risu. Try -h. " >&2
exit 1
@@ -127,6 +123,9 @@ OBJDUMP="${OBJDUMP-${CROSS_PREFIX}objdump}"
if test "x${ARCH}" = "x"; then
guess_arch
+elif test "x${ARCH}" = "xppc64"; then
+ # ppc64 and ppc64le uses the same C source code
+ ARCH="ppc64le"
fi
generate_makefilein
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH Risu v2 3/3] risugen, risugen_ppc64.pm: Add support ppc64 (big-endian)
2017-03-09 18:38 [Qemu-devel] [PATCH Risu v2 0/3] PPC64 Improvements Jose Ricardo Ziviani
2017-03-09 18:38 ` [Qemu-devel] [PATCH Risu v2 1/3] risugen_ppc64: Load random 128-bit data to VSX registers Jose Ricardo Ziviani
2017-03-09 18:38 ` [Qemu-devel] [PATCH Risu v2 2/3] configure: Add initial support to PPC64 (big endian) Jose Ricardo Ziviani
@ 2017-03-09 18:38 ` Jose Ricardo Ziviani
2 siblings, 0 replies; 6+ messages in thread
From: Jose Ricardo Ziviani @ 2017-03-09 18:38 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, nikunj
This commit adds an option to risugen in order to give the opportunity
to generated big-endian instructions. By passing --be, users force
risugen to generated big-endian instructions for ppc64.
./risugen --be --numinsns 1000 --pattern "ADD" ppc64.risu test.bin
./risugen --numinsns 1000 --pattern "ADD" ppc64.risu test.bin
Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
---
risugen | 6 +++++-
risugen_ppc64.pm | 4 ++++
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/risugen b/risugen
index 6aad626..086173c 100755
--- a/risugen
+++ b/risugen
@@ -264,6 +264,7 @@ Valid options:
a general set you have excluded.
--no-fp : disable floating point: no fp init, randomization etc.
Useful to test before support for FP is available.
+ --be : generate instructions in Big-Endian order (ppc64 only).
--help : print this message
EOT
}
@@ -274,6 +275,7 @@ sub main()
my $condprob = 0;
my $fpscr = 0;
my $fp_enabled = 1;
+ my $big_endian = 0;
my ($infile, $outfile);
GetOptions( "help" => sub { usage(); exit(0); },
@@ -287,6 +289,7 @@ sub main()
die "Value \"$condprob\" invalid for option condprob (must be between 0 and 1)\n";
}
},
+ "be" => sub { $big_endian = 1; },
"no-fp" => sub { $fp_enabled = 0; },
) or return 1;
# allow "--pattern re,re" and "--pattern re --pattern re"
@@ -317,7 +320,8 @@ sub main()
'not_pattern_re' => \@not_pattern_re,
'details' => \%insn_details,
'arch' => $full_arch[0],
- 'subarch' => $full_arch[1] || ''
+ 'subarch' => $full_arch[1] || '',
+ 'bigendian' => $big_endian
);
write_test_code(\%params);
diff --git a/risugen_ppc64.pm b/risugen_ppc64.pm
index 45f7220..0c030aa 100644
--- a/risugen_ppc64.pm
+++ b/risugen_ppc64.pm
@@ -373,6 +373,10 @@ sub write_test_code($)
my @not_pattern_re = @{ $params->{ 'not_pattern_re' } };
my %insn_details = %{ $params->{ 'details' } };
+ if ($params->{ 'bigendian' } eq 1) {
+ set_endian(1);
+ }
+
open_bin($outfile);
# convert from probability that insn will be conditional to
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PATCH Risu v2 2/3] configure: Add initial support to PPC64 (big endian)
2017-03-09 18:38 ` [Qemu-devel] [PATCH Risu v2 2/3] configure: Add initial support to PPC64 (big endian) Jose Ricardo Ziviani
@ 2017-03-13 11:10 ` Peter Maydell
2017-03-14 20:22 ` joserz
0 siblings, 1 reply; 6+ messages in thread
From: Peter Maydell @ 2017-03-13 11:10 UTC (permalink / raw)
To: Jose Ricardo Ziviani; +Cc: QEMU Developers, Nikunj A Dadhania
On 9 March 2017 at 19:38, Jose Ricardo Ziviani
<joserz@linux.vnet.ibm.com> wrote:
> This commit set Makefile to point to ppc64le source for both archs
> (ppc64 and ppc64le) because they do the exact same thing. The
> difference is in risugen and how the binary is build.
If we're going to share a single set of source files for ppc64le
and ppc64 (which makes sense) then I think we should use ARCH=ppc64
for that, and rename the 'ppc64le' source files to 'ppc64'.
The rest of these patches look OK.
> Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
> ---
> configure | 9 ++++-----
> 1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/configure b/configure
> index 055e6d6..dd64d8b 100755
> --- a/configure
> +++ b/configure
> @@ -51,11 +51,7 @@ guess_arch() {
> elif check_define __aarch64__ ; then
> ARCH="aarch64"
> elif check_define __powerpc64__ ; then
> - if check_define __BIG_ENDIAN__; then
> - ARCH="ppc64"
> - else
> - ARCH="ppc64le"
> - fi
> + ARCH="ppc64le"
> else
> echo "This cpu is not supported by risu. Try -h. " >&2
> exit 1
> @@ -127,6 +123,9 @@ OBJDUMP="${OBJDUMP-${CROSS_PREFIX}objdump}"
>
> if test "x${ARCH}" = "x"; then
> guess_arch
> +elif test "x${ARCH}" = "xppc64"; then
> + # ppc64 and ppc64le uses the same C source code
> + ARCH="ppc64le"
> fi
>
> generate_makefilein
> --
> 2.7.4
>
Incidentally, maybe we should just drop support for
specifying ARCH= manually to configure. I can't really
see a use case where the auto-detection won't do the
right thing.
thanks
-- PMM
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PATCH Risu v2 2/3] configure: Add initial support to PPC64 (big endian)
2017-03-13 11:10 ` Peter Maydell
@ 2017-03-14 20:22 ` joserz
0 siblings, 0 replies; 6+ messages in thread
From: joserz @ 2017-03-14 20:22 UTC (permalink / raw)
To: Peter Maydell; +Cc: QEMU Developers, Nikunj A Dadhania
On Mon, Mar 13, 2017 at 12:10:10PM +0100, Peter Maydell wrote:
> On 9 March 2017 at 19:38, Jose Ricardo Ziviani
> <joserz@linux.vnet.ibm.com> wrote:
> > This commit set Makefile to point to ppc64le source for both archs
> > (ppc64 and ppc64le) because they do the exact same thing. The
> > difference is in risugen and how the binary is build.
>
> If we're going to share a single set of source files for ppc64le
> and ppc64 (which makes sense) then I think we should use ARCH=ppc64
> for that, and rename the 'ppc64le' source files to 'ppc64'.
>
Your idea makes more sense. I'll do that and send another patch
tomorrow morning.
Thank you Peter!
> The rest of these patches look OK.
>
> > Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
> > ---
> > configure | 9 ++++-----
> > 1 file changed, 4 insertions(+), 5 deletions(-)
> >
> > diff --git a/configure b/configure
> > index 055e6d6..dd64d8b 100755
> > --- a/configure
> > +++ b/configure
> > @@ -51,11 +51,7 @@ guess_arch() {
> > elif check_define __aarch64__ ; then
> > ARCH="aarch64"
> > elif check_define __powerpc64__ ; then
> > - if check_define __BIG_ENDIAN__; then
> > - ARCH="ppc64"
> > - else
> > - ARCH="ppc64le"
> > - fi
> > + ARCH="ppc64le"
> > else
> > echo "This cpu is not supported by risu. Try -h. " >&2
> > exit 1
> > @@ -127,6 +123,9 @@ OBJDUMP="${OBJDUMP-${CROSS_PREFIX}objdump}"
> >
> > if test "x${ARCH}" = "x"; then
> > guess_arch
> > +elif test "x${ARCH}" = "xppc64"; then
> > + # ppc64 and ppc64le uses the same C source code
> > + ARCH="ppc64le"
> > fi
> >
> > generate_makefilein
> > --
> > 2.7.4
> >
>
> Incidentally, maybe we should just drop support for
> specifying ARCH= manually to configure. I can't really
> see a use case where the auto-detection won't do the
> right thing.
>
> thanks
> -- PMM
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-03-14 20:23 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2017-03-09 18:38 [Qemu-devel] [PATCH Risu v2 0/3] PPC64 Improvements Jose Ricardo Ziviani
2017-03-09 18:38 ` [Qemu-devel] [PATCH Risu v2 1/3] risugen_ppc64: Load random 128-bit data to VSX registers Jose Ricardo Ziviani
2017-03-09 18:38 ` [Qemu-devel] [PATCH Risu v2 2/3] configure: Add initial support to PPC64 (big endian) Jose Ricardo Ziviani
2017-03-13 11:10 ` Peter Maydell
2017-03-14 20:22 ` joserz
2017-03-09 18:38 ` [Qemu-devel] [PATCH Risu v2 3/3] risugen, risugen_ppc64.pm: Add support ppc64 (big-endian) Jose Ricardo Ziviani
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