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From: Peter Maydell <peter.maydell@linaro.org>
To: niuguoxiang <niuguoxiang@huawei.com>
Cc: P J P <ppandit@redhat.com>,
	QEMU Developers <qemu-devel@nongnu.org>,
	qemu-arm <qemu-arm@nongnu.org>,
	Prasad J Pandit <pjp@fedoraproject.org>
Subject: Re: [Qemu-devel] 答复: [PATCH] intc: arm_gicv3: limit GICR ipriority index
Date: Tue, 5 Sep 2017 13:35:38 +0100	[thread overview]
Message-ID: <CAFEAcA8JxuM-ddQVTBfgnSDD2fD+kz_RNShdNDqMqVH=zOKBfw@mail.gmail.com> (raw)
In-Reply-To: <7FD21DDFE9A3784693E393AF276FE7D21F17E49E@DGGEMA501-MBX.china.huawei.com>

On 5 September 2017 at 13:30, niuguoxiang <niuguoxiang@huawei.com> wrote:
> I think only assert is not enough, because assert() depends on NDEBUG
> preprocessing

The code cannot be reached with a non-aligned value,
because we register these functions via the gic_ops[]
MemoryRegionops in hw/intc/arm_gicv3.c, and since we
do not specify .valid.unaligned=true there, the memory.c
code will throw out attempts at unaligned accesses.

The assert is just checking at runtime that this never
becomes false accidentally (and also for the benefit of
people reading the code).

Incidentally, QEMU can never be compiled with NDEBUG not
set -- we will #error in the compilation if it is not set.
(It's not good practice to depend on the assert() actually
doing anything though, and indeed in this case we don't.)

thanks
-- PMM

  reply	other threads:[~2017-09-05 12:36 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-05 11:21 [Qemu-devel] [PATCH] intc: arm_gicv3: limit GICR ipriority index P J P
2017-09-05 11:58 ` Peter Maydell
2017-09-05 12:29   ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2017-09-05 12:30   ` [Qemu-devel] 答复: " niuguoxiang
2017-09-05 12:35     ` Peter Maydell [this message]
2017-09-05 19:42       ` Eric Blake
2017-09-06  6:45       ` P J P

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