From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>,
QEMU Developers <qemu-devel@nongnu.org>,
kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH] target/arm: Honor HCR_EL2.TID3 trapping requirements
Date: Tue, 26 Nov 2019 13:19:54 +0000 [thread overview]
Message-ID: <CAFEAcA8LzPyvav_Ycsq_wRv6Joemt881XBB7rUEu4Sw97WUNGg@mail.gmail.com> (raw)
In-Reply-To: <8f112583-c29c-11e2-c023-f4eb13831894@linaro.org>
On Tue, 26 Nov 2019 at 10:12, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 11/23/19 11:56 AM, Marc Zyngier wrote:
> > +static CPAccessResult access_aa64idreg(CPUARMState *env, const ARMCPRegInfo *ri,
> > + bool isread)
> > +{
> > + if ((arm_current_el(env) < 2) && (arm_hcr_el2_eff(env) & HCR_TID3)) {
> > + return CP_ACCESS_TRAP_EL2;
> > + }
> > +
> > + return CP_ACCESS_OK;
> > +}
> > +
>
> The only thing I would suggest is to call this access_aa64_tid3, because
> tid{0,1,2} also need to be handled in a similar way, and we'll need little
> helper functions for those too.
Good idea, I will make that change also.
-- PMM
next prev parent reply other threads:[~2019-11-26 13:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-23 11:56 [PATCH] target/arm: Honor HCR_EL2.TID3 trapping requirements Marc Zyngier
2019-11-25 10:40 ` Will Deacon
2019-11-25 10:59 ` Marc Zyngier
2019-11-25 16:21 ` Peter Maydell
2019-11-25 17:08 ` Marc Zyngier
2019-11-25 17:27 ` Peter Maydell
2019-11-25 17:49 ` Marc Zyngier
2019-11-26 12:46 ` Peter Maydell
2019-11-26 10:12 ` Richard Henderson
2019-11-26 13:19 ` Peter Maydell [this message]
2019-11-26 21:04 ` Richard Henderson
2019-11-27 9:13 ` Marc Zyngier
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