From: Peter Maydell <peter.maydell@linaro.org>
To: Xin Tong <xerox.time.tech@gmail.com>
Cc: qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] MMU Modes
Date: Fri, 6 Jan 2012 12:55:50 +0000 [thread overview]
Message-ID: <CAFEAcA8OSuk7SnUrbUeNjHJxcb9fZNh0gV4uueXrbanLS2ZJSg@mail.gmail.com> (raw)
In-Reply-To: <CALKntY1497BCPcqVv1L=Hg3VhpNwUMCxobgF2fZ1W6ABUH3VPA@mail.gmail.com>
On 6 January 2012 12:45, Xin Tong <xerox.time.tech@gmail.com> wrote:
> In qemu soft TLB, there is a MMU modes. what is it and what does it do
> ? I see target-mips, NB_MMU_MODES is defined to be 3, unfortunately,
> there is no comments on what each one of them means in the code.
This distinguishes TLB entries for kernel mode from those for user mode
and so on. Look in target-mips/cpu.h for the MMU_MODE[012]_SUFFIX
definitions and the cpu_mmu_index() function, which should tell you what
MIPS in particular uses them for.
-- PMM
next prev parent reply other threads:[~2012-01-06 12:55 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-06 12:45 [Qemu-devel] MMU Modes Xin Tong
2012-01-06 12:55 ` Peter Maydell [this message]
2012-01-07 14:40 ` Xin Tong
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