From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:40023) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rj9Kq-0003j4-3h for qemu-devel@nongnu.org; Fri, 06 Jan 2012 07:55:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Rj9Kp-0003lW-72 for qemu-devel@nongnu.org; Fri, 06 Jan 2012 07:55:52 -0500 Received: from mail-qw0-f45.google.com ([209.85.216.45]:39584) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rj9Kp-0003lS-3Y for qemu-devel@nongnu.org; Fri, 06 Jan 2012 07:55:51 -0500 Received: by qadc10 with SMTP id c10so970373qad.4 for ; Fri, 06 Jan 2012 04:55:50 -0800 (PST) MIME-Version: 1.0 In-Reply-To: References: Date: Fri, 6 Jan 2012 12:55:50 +0000 Message-ID: From: Peter Maydell Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] MMU Modes List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Xin Tong Cc: qemu-devel On 6 January 2012 12:45, Xin Tong wrote: > In qemu soft TLB, there is a MMU modes. what is it and what does it do > ? I see target-mips, NB_MMU_MODES is defined to be 3, unfortunately, > there is no comments on what each one of them means in the code. This distinguishes TLB entries for kernel mode from those for user mode and so on. Look in target-mips/cpu.h for the MMU_MODE[012]_SUFFIX definitions and the cpu_mmu_index() function, which should tell you what MIPS in particular uses them for. -- PMM