* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2018-08-16 13:34 Peter Maydell
2018-08-16 13:34 ` [Qemu-devel] [PULL 01/30] target/arm: Fix typo in helper_sve_ld1hss_r Peter Maydell
` (30 more replies)
0 siblings, 31 replies; 43+ messages in thread
From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw)
To: qemu-devel
Less than a day of post-3.0 code review and already enough
patches for another pullreq :-)
thanks
-- PMM
The following changes since commit c542a9f9794ec8e0bc3fcf5956d3cc8bce667789:
Merge remote-tracking branch 'remotes/armbru/tags/pull-tests-2018-08-16' into staging (2018-08-16 09:50:54 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180816
for you to fetch changes up to fcf13ca556f462b52956059bf8fa622bc8575edb:
hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj() (2018-08-16 14:29:58 +0100)
----------------------------------------------------------------
target-arm queue:
* Fixes for various bugs in SVE instructions
* Add model of Freescale i.MX6 UltraLite 14x14 EVK Board
* hw/arm: make bitbanded IO optional on ARMv7-M
* Add model of Cortex-M0 CPU
* Add support for loading Intel HEX files to the generic loader
* imx_spi: Unset XCH when TX FIFO becomes empty
* aspeed_sdmc: fix various bugs
* Fix bugs in Arm FP16 instruction support
* Fix aa64 FCADD and FCMLA decode
* softfloat: Fix missing inexact for floating-point add
* hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj()
----------------------------------------------------------------
Cédric Le Goater (1):
aspeed: add a max_ram_size property to the memory controller
Jean-Christophe Dubois (3):
i.MX6UL: Add i.MX6UL specific CCM device
i.MX6UL: Add i.MX6UL SOC
i.MX6UL: Add Freescale i.MX6 UltraLite 14x14 EVK Board
Joel Stanley (5):
aspeed_sdmc: Extend number of valid registers
aspeed_sdmc: Fix saved values
aspeed_sdmc: Set 'cache initial sequence' always true
aspeed_sdmc: Init status always idle
aspeed_sdmc: Handle ECC training
Richard Henderson (13):
target/arm: Fix typo in helper_sve_ld1hss_r
target/arm: Fix sign-extension in sve do_ldr/do_str
target/arm: Fix offset for LD1R instructions
target/arm: Fix offset scaling for LD_zprr and ST_zprr
target/arm: Reformat integer register dump
target/arm: Dump SVE state if enabled
target/arm: Add sve-max-vq cpu property to -cpu max
target/arm: Adjust FPCR_MASK for FZ16
target/arm: Ignore float_flag_input_denormal from fp_status_f16
target/arm: Use fp_status_fp16 for do_fmpa_zpzzz_h
target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-half
target/arm: Fix aa64 FCADD and FCMLA decode
softfloat: Fix missing inexact for floating-point add
Stefan Hajnoczi (4):
hw/arm: make bitbanded IO optional on ARMv7-M
target/arm: add "cortex-m0" CPU model
loader: extract rom_free() function
loader: add rom transaction API
Su Hang (2):
loader: Implement .hex file loader
Add QTest testcase for the Intel Hexadecimal
Thomas Huth (1):
hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj()
Trent Piepho (1):
imx_spi: Unset XCH when TX FIFO becomes empty
configure | 4 +
hw/arm/Makefile.objs | 1 +
hw/misc/Makefile.objs | 1 +
tests/Makefile.include | 2 +
include/hw/arm/armv7m.h | 2 +
include/hw/arm/fsl-imx6ul.h | 339 ++++++++++++++
include/hw/loader.h | 31 ++
include/hw/misc/aspeed_sdmc.h | 4 +-
include/hw/misc/imx6ul_ccm.h | 226 +++++++++
target/arm/cpu.h | 5 +-
fpu/softfloat.c | 2 +-
hw/arm/armv7m.c | 37 +-
hw/arm/aspeed.c | 31 ++
hw/arm/aspeed_soc.c | 2 +
hw/arm/fsl-imx6ul.c | 617 ++++++++++++++++++++++++
hw/arm/mcimx6ul-evk.c | 85 ++++
hw/arm/mps2-tz.c | 32 +-
hw/arm/mps2.c | 1 +
hw/arm/msf2-soc.c | 1 +
hw/arm/stellaris.c | 1 +
hw/arm/stm32f205_soc.c | 1 +
hw/core/generic-loader.c | 4 +
hw/core/loader.c | 302 +++++++++++-
hw/misc/aspeed_sdmc.c | 55 ++-
hw/misc/imx6ul_ccm.c | 886 +++++++++++++++++++++++++++++++++++
hw/ssi/imx_spi.c | 3 +-
linux-user/syscall.c | 19 +-
target/arm/cpu.c | 17 +-
target/arm/cpu64.c | 29 ++
target/arm/helper.c | 18 +-
target/arm/sve_helper.c | 4 +-
target/arm/translate-a64.c | 120 ++++-
target/arm/translate-sve.c | 30 +-
tests/hexloader-test.c | 45 ++
MAINTAINERS | 6 +
default-configs/arm-softmmu.mak | 1 +
hw/misc/trace-events | 7 +
tests/hex-loader-check-data/test.hex | 18 +
38 files changed, 2863 insertions(+), 126 deletions(-)
create mode 100644 include/hw/arm/fsl-imx6ul.h
create mode 100644 include/hw/misc/imx6ul_ccm.h
create mode 100644 hw/arm/fsl-imx6ul.c
create mode 100644 hw/arm/mcimx6ul-evk.c
create mode 100644 hw/misc/imx6ul_ccm.c
create mode 100644 tests/hexloader-test.c
create mode 100644 tests/hex-loader-check-data/test.hex
^ permalink raw reply [flat|nested] 43+ messages in thread* [Qemu-devel] [PULL 01/30] target/arm: Fix typo in helper_sve_ld1hss_r 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 02/30] target/arm: Fix sign-extension in sve do_ldr/do_str Peter Maydell ` (29 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Richard Henderson <richard.henderson@linaro.org> Cc: qemu-stable@nongnu.org (3.0.1) Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/sve_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index c3cbec9cf5f..e03f954a264 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -4045,7 +4045,7 @@ DO_LD1(sve_ld1bdu_r, cpu_ldub_data_ra, uint64_t, uint8_t, ) DO_LD1(sve_ld1bds_r, cpu_ldsb_data_ra, uint64_t, int8_t, ) DO_LD1(sve_ld1hsu_r, cpu_lduw_data_ra, uint32_t, uint16_t, H1_4) -DO_LD1(sve_ld1hss_r, cpu_ldsw_data_ra, uint32_t, int8_t, H1_4) +DO_LD1(sve_ld1hss_r, cpu_ldsw_data_ra, uint32_t, int16_t, H1_4) DO_LD1(sve_ld1hdu_r, cpu_lduw_data_ra, uint64_t, uint16_t, ) DO_LD1(sve_ld1hds_r, cpu_ldsw_data_ra, uint64_t, int16_t, ) -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 02/30] target/arm: Fix sign-extension in sve do_ldr/do_str 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 01/30] target/arm: Fix typo in helper_sve_ld1hss_r Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 03/30] target/arm: Fix offset for LD1R instructions Peter Maydell ` (28 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Richard Henderson <richard.henderson@linaro.org> The expression (int) imm + (uint32_t) len_align turns into uint32_t and thus with negative imm produces a memory operation at the wrong offset. None of the numbers involved are particularly large, so change everything to use int. Cc: qemu-stable@nongnu.org (3.0.1) Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/translate-sve.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 89efc80ee70..9e63b5f8e55 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -4372,12 +4372,11 @@ static bool trans_UCVTF_dd(DisasContext *s, arg_rpr_esz *a, uint32_t insn) * The load should begin at the address Rn + IMM. */ -static void do_ldr(DisasContext *s, uint32_t vofs, uint32_t len, - int rn, int imm) +static void do_ldr(DisasContext *s, uint32_t vofs, int len, int rn, int imm) { - uint32_t len_align = QEMU_ALIGN_DOWN(len, 8); - uint32_t len_remain = len % 8; - uint32_t nparts = len / 8 + ctpop8(len_remain); + int len_align = QEMU_ALIGN_DOWN(len, 8); + int len_remain = len % 8; + int nparts = len / 8 + ctpop8(len_remain); int midx = get_mem_index(s); TCGv_i64 addr, t0, t1; @@ -4458,12 +4457,11 @@ static void do_ldr(DisasContext *s, uint32_t vofs, uint32_t len, } /* Similarly for stores. */ -static void do_str(DisasContext *s, uint32_t vofs, uint32_t len, - int rn, int imm) +static void do_str(DisasContext *s, uint32_t vofs, int len, int rn, int imm) { - uint32_t len_align = QEMU_ALIGN_DOWN(len, 8); - uint32_t len_remain = len % 8; - uint32_t nparts = len / 8 + ctpop8(len_remain); + int len_align = QEMU_ALIGN_DOWN(len, 8); + int len_remain = len % 8; + int nparts = len / 8 + ctpop8(len_remain); int midx = get_mem_index(s); TCGv_i64 addr, t0; -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 03/30] target/arm: Fix offset for LD1R instructions 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 01/30] target/arm: Fix typo in helper_sve_ld1hss_r Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 02/30] target/arm: Fix sign-extension in sve do_ldr/do_str Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 04/30] target/arm: Fix offset scaling for LD_zprr and ST_zprr Peter Maydell ` (27 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Richard Henderson <richard.henderson@linaro.org> The immediate should be scaled by the size of the memory reference, not the size of the elements into which it is loaded. Cc: qemu-stable@nongnu.org (3.0.1) Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/translate-sve.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 9e63b5f8e55..f635822a613 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -4819,6 +4819,7 @@ static bool trans_LD1R_zpri(DisasContext *s, arg_rpri_load *a, uint32_t insn) unsigned vsz = vec_full_reg_size(s); unsigned psz = pred_full_reg_size(s); unsigned esz = dtype_esz[a->dtype]; + unsigned msz = dtype_msz(a->dtype); TCGLabel *over = gen_new_label(); TCGv_i64 temp; @@ -4842,7 +4843,7 @@ static bool trans_LD1R_zpri(DisasContext *s, arg_rpri_load *a, uint32_t insn) /* Load the data. */ temp = tcg_temp_new_i64(); - tcg_gen_addi_i64(temp, cpu_reg_sp(s, a->rn), a->imm << esz); + tcg_gen_addi_i64(temp, cpu_reg_sp(s, a->rn), a->imm << msz); tcg_gen_qemu_ld_i64(temp, temp, get_mem_index(s), s->be_data | dtype_mop[a->dtype]); -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 04/30] target/arm: Fix offset scaling for LD_zprr and ST_zprr 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (2 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 03/30] target/arm: Fix offset for LD1R instructions Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 05/30] target/arm: Reformat integer register dump Peter Maydell ` (26 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Richard Henderson <richard.henderson@linaro.org> The scaling should be solely on the memory operation size; the number of registers being loaded does not come in to the initial computation. Cc: qemu-stable@nongnu.org (3.0.1) Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/translate-sve.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index f635822a613..d27bc8c946b 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -4665,8 +4665,7 @@ static bool trans_LD_zprr(DisasContext *s, arg_rprr_load *a, uint32_t insn) } if (sve_access_check(s)) { TCGv_i64 addr = new_tmp_a64(s); - tcg_gen_muli_i64(addr, cpu_reg(s, a->rm), - (a->nreg + 1) << dtype_msz(a->dtype)); + tcg_gen_shli_i64(addr, cpu_reg(s, a->rm), dtype_msz(a->dtype)); tcg_gen_add_i64(addr, addr, cpu_reg_sp(s, a->rn)); do_ld_zpa(s, a->rd, a->pg, addr, a->dtype, a->nreg); } @@ -4899,7 +4898,7 @@ static bool trans_ST_zprr(DisasContext *s, arg_rprr_store *a, uint32_t insn) } if (sve_access_check(s)) { TCGv_i64 addr = new_tmp_a64(s); - tcg_gen_muli_i64(addr, cpu_reg(s, a->rm), (a->nreg + 1) << a->msz); + tcg_gen_shli_i64(addr, cpu_reg(s, a->rm), a->msz); tcg_gen_add_i64(addr, addr, cpu_reg_sp(s, a->rn)); do_st_zpa(s, a->rd, a->pg, addr, a->msz, a->esz, a->nreg); } -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 05/30] target/arm: Reformat integer register dump 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (3 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 04/30] target/arm: Fix offset scaling for LD_zprr and ST_zprr Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 06/30] target/arm: Dump SVE state if enabled Peter Maydell ` (25 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Richard Henderson <richard.henderson@linaro.org> With PC, there are 33 registers. Three per line lines up nicely without overflowing 80 columns. Cc: qemu-stable@nongnu.org (3.0.1) Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/translate-a64.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 45a6c2a3aa1..358f169c755 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -137,14 +137,13 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, int el = arm_current_el(env); const char *ns_status; - cpu_fprintf(f, "PC=%016"PRIx64" SP=%016"PRIx64"\n", - env->pc, env->xregs[31]); - for (i = 0; i < 31; i++) { - cpu_fprintf(f, "X%02d=%016"PRIx64, i, env->xregs[i]); - if ((i % 4) == 3) { - cpu_fprintf(f, "\n"); + cpu_fprintf(f, " PC=%016" PRIx64 " ", env->pc); + for (i = 0; i < 32; i++) { + if (i == 31) { + cpu_fprintf(f, " SP=%016" PRIx64 "\n", env->xregs[i]); } else { - cpu_fprintf(f, " "); + cpu_fprintf(f, "X%02d=%016" PRIx64 "%s", i, env->xregs[i], + (i + 2) % 3 ? " " : "\n"); } } -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 06/30] target/arm: Dump SVE state if enabled 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (4 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 05/30] target/arm: Reformat integer register dump Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 07/30] target/arm: Add sve-max-vq cpu property to -cpu max Peter Maydell ` (24 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Richard Henderson <richard.henderson@linaro.org> Also fold the FPCR/FPSR state onto the same line as PSTATE, and mention but do not dump disabled FPU state. Cc: qemu-stable@nongnu.org (3.0.1) Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/translate-a64.c | 95 +++++++++++++++++++++++++++++++++----- 1 file changed, 83 insertions(+), 12 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 358f169c755..b29dc49c4f8 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -152,8 +152,7 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, } else { ns_status = ""; } - - cpu_fprintf(f, "\nPSTATE=%08x %c%c%c%c %sEL%d%c\n", + cpu_fprintf(f, "PSTATE=%08x %c%c%c%c %sEL%d%c", psr, psr & PSTATE_N ? 'N' : '-', psr & PSTATE_Z ? 'Z' : '-', @@ -163,17 +162,89 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, el, psr & PSTATE_SP ? 'h' : 't'); - if (flags & CPU_DUMP_FPU) { - int numvfpregs = 32; - for (i = 0; i < numvfpregs; i++) { - uint64_t *q = aa64_vfp_qreg(env, i); - uint64_t vlo = q[0]; - uint64_t vhi = q[1]; - cpu_fprintf(f, "q%02d=%016" PRIx64 ":%016" PRIx64 "%c", - i, vhi, vlo, (i & 1 ? '\n' : ' ')); + if (!(flags & CPU_DUMP_FPU)) { + cpu_fprintf(f, "\n"); + return; + } + cpu_fprintf(f, " FPCR=%08x FPSR=%08x\n", + vfp_get_fpcr(env), vfp_get_fpsr(env)); + + if (arm_feature(env, ARM_FEATURE_SVE)) { + int j, zcr_len = env->vfp.zcr_el[1] & 0xf; /* fix for system mode */ + + for (i = 0; i <= FFR_PRED_NUM; i++) { + bool eol; + if (i == FFR_PRED_NUM) { + cpu_fprintf(f, "FFR="); + /* It's last, so end the line. */ + eol = true; + } else { + cpu_fprintf(f, "P%02d=", i); + switch (zcr_len) { + case 0: + eol = i % 8 == 7; + break; + case 1: + eol = i % 6 == 5; + break; + case 2: + case 3: + eol = i % 3 == 2; + break; + default: + /* More than one quadword per predicate. */ + eol = true; + break; + } + } + for (j = zcr_len / 4; j >= 0; j--) { + int digits; + if (j * 4 + 4 <= zcr_len + 1) { + digits = 16; + } else { + digits = (zcr_len % 4 + 1) * 4; + } + cpu_fprintf(f, "%0*" PRIx64 "%s", digits, + env->vfp.pregs[i].p[j], + j ? ":" : eol ? "\n" : " "); + } + } + + for (i = 0; i < 32; i++) { + if (zcr_len == 0) { + cpu_fprintf(f, "Z%02d=%016" PRIx64 ":%016" PRIx64 "%s", + i, env->vfp.zregs[i].d[1], + env->vfp.zregs[i].d[0], i & 1 ? "\n" : " "); + } else if (zcr_len == 1) { + cpu_fprintf(f, "Z%02d=%016" PRIx64 ":%016" PRIx64 + ":%016" PRIx64 ":%016" PRIx64 "\n", + i, env->vfp.zregs[i].d[3], env->vfp.zregs[i].d[2], + env->vfp.zregs[i].d[1], env->vfp.zregs[i].d[0]); + } else { + for (j = zcr_len; j >= 0; j--) { + bool odd = (zcr_len - j) % 2 != 0; + if (j == zcr_len) { + cpu_fprintf(f, "Z%02d[%x-%x]=", i, j, j - 1); + } else if (!odd) { + if (j > 0) { + cpu_fprintf(f, " [%x-%x]=", j, j - 1); + } else { + cpu_fprintf(f, " [%x]=", j); + } + } + cpu_fprintf(f, "%016" PRIx64 ":%016" PRIx64 "%s", + env->vfp.zregs[i].d[j * 2 + 1], + env->vfp.zregs[i].d[j * 2], + odd || j == 0 ? "\n" : ":"); + } + } + } + } else { + for (i = 0; i < 32; i++) { + uint64_t *q = aa64_vfp_qreg(env, i); + cpu_fprintf(f, "Q%02d=%016" PRIx64 ":%016" PRIx64 "%s", + i, q[1], q[0], (i & 1 ? "\n" : " ")); } - cpu_fprintf(f, "FPCR: %08x FPSR: %08x\n", - vfp_get_fpcr(env), vfp_get_fpsr(env)); } } -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 07/30] target/arm: Add sve-max-vq cpu property to -cpu max 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (5 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 06/30] target/arm: Dump SVE state if enabled Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 08/30] i.MX6UL: Add i.MX6UL specific CCM device Peter Maydell ` (23 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Richard Henderson <richard.henderson@linaro.org> This allows the default (and maximum) vector length to be set from the command-line. Which is extraordinarily helpful in debugging problems depending on vector length without having to bake knowledge of PR_SET_SVE_VL into every guest binary. Cc: qemu-stable@nongnu.org (3.0.1) Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/cpu.h | 3 +++ linux-user/syscall.c | 19 +++++++++++++------ target/arm/cpu.c | 6 +++--- target/arm/cpu64.c | 29 +++++++++++++++++++++++++++++ target/arm/helper.c | 7 +++++-- 5 files changed, 53 insertions(+), 11 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 4289c33ef4c..a81f3d83cd2 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -857,6 +857,9 @@ struct ARMCPU { /* Used to synchronize KVM and QEMU in-kernel device levels */ uint8_t device_irq_level; + + /* Used to set the maximum vector length the cpu will support. */ + uint32_t sve_max_vq; }; static inline ARMCPU *arm_env_get_cpu(CPUARMState *env) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index dfc851cc35f..5a4af76c032 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -10848,15 +10848,22 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1, #endif #ifdef TARGET_AARCH64 case TARGET_PR_SVE_SET_VL: - /* We cannot support either PR_SVE_SET_VL_ONEXEC - or PR_SVE_VL_INHERIT. Therefore, anything above - ARM_MAX_VQ results in EINVAL. */ + /* + * We cannot support either PR_SVE_SET_VL_ONEXEC or + * PR_SVE_VL_INHERIT. Note the kernel definition + * of sve_vl_valid allows for VQ=512, i.e. VL=8192, + * even though the current architectural maximum is VQ=16. + */ ret = -TARGET_EINVAL; if (arm_feature(cpu_env, ARM_FEATURE_SVE) - && arg2 >= 0 && arg2 <= ARM_MAX_VQ * 16 && !(arg2 & 15)) { + && arg2 >= 0 && arg2 <= 512 * 16 && !(arg2 & 15)) { CPUARMState *env = cpu_env; - int old_vq = (env->vfp.zcr_el[1] & 0xf) + 1; - int vq = MAX(arg2 / 16, 1); + ARMCPU *cpu = arm_env_get_cpu(env); + uint32_t vq, old_vq; + + old_vq = (env->vfp.zcr_el[1] & 0xf) + 1; + vq = MAX(arg2 / 16, 1); + vq = MIN(vq, cpu->sve_max_vq); if (vq < old_vq) { aarch64_sve_narrow_vq(env, vq); diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 3848ef46aa9..a4d46db13ae 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -168,9 +168,9 @@ static void arm_cpu_reset(CPUState *s) env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 16, 2, 3); env->cp15.cptr_el[3] |= CPTR_EZ; /* with maximum vector length */ - env->vfp.zcr_el[1] = ARM_MAX_VQ - 1; - env->vfp.zcr_el[2] = ARM_MAX_VQ - 1; - env->vfp.zcr_el[3] = ARM_MAX_VQ - 1; + env->vfp.zcr_el[1] = cpu->sve_max_vq - 1; + env->vfp.zcr_el[2] = env->vfp.zcr_el[1]; + env->vfp.zcr_el[3] = env->vfp.zcr_el[1]; #else /* Reset into the highest available EL */ if (arm_feature(env, ARM_FEATURE_EL3)) { diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index d0581d59d82..800bff780e2 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -29,6 +29,7 @@ #include "sysemu/sysemu.h" #include "sysemu/kvm.h" #include "kvm_arm.h" +#include "qapi/visitor.h" static inline void set_feature(CPUARMState *env, int feature) { @@ -217,6 +218,29 @@ static void aarch64_a53_initfn(Object *obj) define_arm_cp_regs(cpu, cortex_a57_a53_cp_reginfo); } +static void cpu_max_get_sve_vq(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + ARMCPU *cpu = ARM_CPU(obj); + visit_type_uint32(v, name, &cpu->sve_max_vq, errp); +} + +static void cpu_max_set_sve_vq(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + ARMCPU *cpu = ARM_CPU(obj); + Error *err = NULL; + + visit_type_uint32(v, name, &cpu->sve_max_vq, &err); + + if (!err && (cpu->sve_max_vq == 0 || cpu->sve_max_vq > ARM_MAX_VQ)) { + error_setg(&err, "unsupported SVE vector length"); + error_append_hint(&err, "Valid sve-max-vq in range [1-%d]\n", + ARM_MAX_VQ); + } + error_propagate(errp, err); +} + /* -cpu max: if KVM is enabled, like -cpu host (best possible with this host); * otherwise, a CPU with as many features enabled as our emulation supports. * The version of '-cpu max' for qemu-system-arm is defined in cpu.c; @@ -253,6 +277,10 @@ static void aarch64_max_initfn(Object *obj) cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */ cpu->dcz_blocksize = 7; /* 512 bytes */ #endif + + cpu->sve_max_vq = ARM_MAX_VQ; + object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_vq, + cpu_max_set_sve_vq, NULL, NULL, &error_fatal); } } @@ -405,6 +433,7 @@ void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq) uint64_t pmask; assert(vq >= 1 && vq <= ARM_MAX_VQ); + assert(vq <= arm_env_get_cpu(env)->sve_max_vq); /* Zap the high bits of the zregs. */ for (i = 0; i < 32; i++) { diff --git a/target/arm/helper.c b/target/arm/helper.c index 8b07bf214ec..873a0c215db 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -12437,9 +12437,12 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, zcr_len = 0; } else { int current_el = arm_current_el(env); + ARMCPU *cpu = arm_env_get_cpu(env); - zcr_len = env->vfp.zcr_el[current_el <= 1 ? 1 : current_el]; - zcr_len &= 0xf; + zcr_len = cpu->sve_max_vq - 1; + if (current_el <= 1) { + zcr_len = MIN(zcr_len, 0xf & (uint32_t)env->vfp.zcr_el[1]); + } if (current_el < 2 && arm_feature(env, ARM_FEATURE_EL2)) { zcr_len = MIN(zcr_len, 0xf & (uint32_t)env->vfp.zcr_el[2]); } -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 08/30] i.MX6UL: Add i.MX6UL specific CCM device 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (6 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 07/30] target/arm: Add sve-max-vq cpu property to -cpu max Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 09/30] i.MX6UL: Add i.MX6UL SOC Peter Maydell ` (22 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 34b6704ceb81b49e35ce1ad162bf758e5141ff87.1532984236.git.jcd@tribudubois.net [PMM: fixed some comment typos etc] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/misc/Makefile.objs | 1 + include/hw/misc/imx6ul_ccm.h | 226 +++++++++ hw/misc/imx6ul_ccm.c | 886 +++++++++++++++++++++++++++++++++++ hw/misc/trace-events | 7 + 4 files changed, 1120 insertions(+) create mode 100644 include/hw/misc/imx6ul_ccm.h create mode 100644 hw/misc/imx6ul_ccm.c diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 93509008451..51d27b3af1e 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -36,6 +36,7 @@ obj-$(CONFIG_IMX) += imx_ccm.o obj-$(CONFIG_IMX) += imx31_ccm.o obj-$(CONFIG_IMX) += imx25_ccm.o obj-$(CONFIG_IMX) += imx6_ccm.o +obj-$(CONFIG_IMX) += imx6ul_ccm.o obj-$(CONFIG_IMX) += imx6_src.o obj-$(CONFIG_IMX) += imx7_ccm.o obj-$(CONFIG_IMX) += imx2_wdt.o diff --git a/include/hw/misc/imx6ul_ccm.h b/include/hw/misc/imx6ul_ccm.h new file mode 100644 index 00000000000..377ddca2442 --- /dev/null +++ b/include/hw/misc/imx6ul_ccm.h @@ -0,0 +1,226 @@ +/* + * IMX6UL Clock Control Module + * + * Copyright (C) 2018 by Jean-Christophe Dubois <jcd@tribudubois.net> + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef IMX6UL_CCM_H +#define IMX6UL_CCM_H + +#include "hw/misc/imx_ccm.h" +#include "qemu/bitops.h" + +#define CCM_CCR 0 +#define CCM_CCDR 1 +#define CCM_CSR 2 +#define CCM_CCSR 3 +#define CCM_CACRR 4 +#define CCM_CBCDR 5 +#define CCM_CBCMR 6 +#define CCM_CSCMR1 7 +#define CCM_CSCMR2 8 +#define CCM_CSCDR1 9 +#define CCM_CS1CDR 10 +#define CCM_CS2CDR 11 +#define CCM_CDCDR 12 +#define CCM_CHSCCDR 13 +#define CCM_CSCDR2 14 +#define CCM_CSCDR3 15 +#define CCM_CDHIPR 18 +#define CCM_CTOR 20 +#define CCM_CLPCR 21 +#define CCM_CISR 22 +#define CCM_CIMR 23 +#define CCM_CCOSR 24 +#define CCM_CGPR 25 +#define CCM_CCGR0 26 +#define CCM_CCGR1 27 +#define CCM_CCGR2 28 +#define CCM_CCGR3 29 +#define CCM_CCGR4 30 +#define CCM_CCGR5 31 +#define CCM_CCGR6 32 +#define CCM_CMEOR 34 +#define CCM_MAX 35 + +#define CCM_ANALOG_PLL_ARM 0 +#define CCM_ANALOG_PLL_ARM_SET 1 +#define CCM_ANALOG_PLL_ARM_CLR 2 +#define CCM_ANALOG_PLL_ARM_TOG 3 +#define CCM_ANALOG_PLL_USB1 4 +#define CCM_ANALOG_PLL_USB1_SET 5 +#define CCM_ANALOG_PLL_USB1_CLR 6 +#define CCM_ANALOG_PLL_USB1_TOG 7 +#define CCM_ANALOG_PLL_USB2 8 +#define CCM_ANALOG_PLL_USB2_SET 9 +#define CCM_ANALOG_PLL_USB2_CLR 10 +#define CCM_ANALOG_PLL_USB2_TOG 11 +#define CCM_ANALOG_PLL_SYS 12 +#define CCM_ANALOG_PLL_SYS_SET 13 +#define CCM_ANALOG_PLL_SYS_CLR 14 +#define CCM_ANALOG_PLL_SYS_TOG 15 +#define CCM_ANALOG_PLL_SYS_SS 16 +#define CCM_ANALOG_PLL_SYS_NUM 20 +#define CCM_ANALOG_PLL_SYS_DENOM 24 +#define CCM_ANALOG_PLL_AUDIO 28 +#define CCM_ANALOG_PLL_AUDIO_SET 29 +#define CCM_ANALOG_PLL_AUDIO_CLR 30 +#define CCM_ANALOG_PLL_AUDIO_TOG 31 +#define CCM_ANALOG_PLL_AUDIO_NUM 32 +#define CCM_ANALOG_PLL_AUDIO_DENOM 36 +#define CCM_ANALOG_PLL_VIDEO 40 +#define CCM_ANALOG_PLL_VIDEO_SET 41 +#define CCM_ANALOG_PLL_VIDEO_CLR 42 +#define CCM_ANALOG_PLL_VIDEO_TOG 44 +#define CCM_ANALOG_PLL_VIDEO_NUM 46 +#define CCM_ANALOG_PLL_VIDEO_DENOM 48 +#define CCM_ANALOG_PLL_ENET 56 +#define CCM_ANALOG_PLL_ENET_SET 57 +#define CCM_ANALOG_PLL_ENET_CLR 58 +#define CCM_ANALOG_PLL_ENET_TOG 59 +#define CCM_ANALOG_PFD_480 60 +#define CCM_ANALOG_PFD_480_SET 61 +#define CCM_ANALOG_PFD_480_CLR 62 +#define CCM_ANALOG_PFD_480_TOG 63 +#define CCM_ANALOG_PFD_528 64 +#define CCM_ANALOG_PFD_528_SET 65 +#define CCM_ANALOG_PFD_528_CLR 66 +#define CCM_ANALOG_PFD_528_TOG 67 + +/* PMU registers */ +#define PMU_REG_1P1 68 +#define PMU_REG_3P0 72 +#define PMU_REG_2P5 76 +#define PMU_REG_CORE 80 + +#define CCM_ANALOG_MISC0 84 +#define PMU_MISC0 CCM_ANALOG_MISC0 +#define CCM_ANALOG_MISC0_SET 85 +#define PMU_MISC0_SET CCM_ANALOG_MISC0_SET +#define CCM_ANALOG_MISC0_CLR 86 +#define PMU_MISC0_CLR CCM_ANALOG_MISC0_CLR +#define CCM_ANALOG_MISC0_TOG 87 +#define PMU_MISC0_TOG CCM_ANALOG_MISC0_TOG + +#define CCM_ANALOG_MISC1 88 +#define PMU_MISC1 CCM_ANALOG_MISC1 +#define CCM_ANALOG_MISC1_SET 89 +#define PMU_MISC1_SET CCM_ANALOG_MISC1_SET +#define CCM_ANALOG_MISC1_CLR 90 +#define PMU_MISC1_CLR CCM_ANALOG_MISC1_CLR +#define CCM_ANALOG_MISC1_TOG 91 +#define PMU_MISC1_TOG CCM_ANALOG_MISC1_TOG + +#define CCM_ANALOG_MISC2 92 +#define PMU_MISC2 CCM_ANALOG_MISC2 +#define CCM_ANALOG_MISC2_SET 93 +#define PMU_MISC2_SET CCM_ANALOG_MISC2_SET +#define CCM_ANALOG_MISC2_CLR 94 +#define PMU_MISC2_CLR CCM_ANALOG_MISC2_CLR +#define CCM_ANALOG_MISC2_TOG 95 +#define PMU_MISC2_TOG CCM_ANALOG_MISC2_TOG + +#define TEMPMON_TEMPSENSE0 96 +#define TEMPMON_TEMPSENSE0_SET 97 +#define TEMPMON_TEMPSENSE0_CLR 98 +#define TEMPMON_TEMPSENSE0_TOG 99 +#define TEMPMON_TEMPSENSE1 100 +#define TEMPMON_TEMPSENSE1_SET 101 +#define TEMPMON_TEMPSENSE1_CLR 102 +#define TEMPMON_TEMPSENSE1_TOG 103 +#define TEMPMON_TEMPSENSE2 164 +#define TEMPMON_TEMPSENSE2_SET 165 +#define TEMPMON_TEMPSENSE2_CLR 166 +#define TEMPMON_TEMPSENSE2_TOG 167 + +#define PMU_LOWPWR_CTRL 155 +#define PMU_LOWPWR_CTRL_SET 156 +#define PMU_LOWPWR_CTRL_CLR 157 +#define PMU_LOWPWR_CTRL_TOG 158 + +#define USB_ANALOG_USB1_VBUS_DETECT 104 +#define USB_ANALOG_USB1_VBUS_DETECT_SET 105 +#define USB_ANALOG_USB1_VBUS_DETECT_CLR 106 +#define USB_ANALOG_USB1_VBUS_DETECT_TOG 107 +#define USB_ANALOG_USB1_CHRG_DETECT 108 +#define USB_ANALOG_USB1_CHRG_DETECT_SET 109 +#define USB_ANALOG_USB1_CHRG_DETECT_CLR 110 +#define USB_ANALOG_USB1_CHRG_DETECT_TOG 111 +#define USB_ANALOG_USB1_VBUS_DETECT_STAT 112 +#define USB_ANALOG_USB1_CHRG_DETECT_STAT 116 +#define USB_ANALOG_USB1_MISC 124 +#define USB_ANALOG_USB1_MISC_SET 125 +#define USB_ANALOG_USB1_MISC_CLR 126 +#define USB_ANALOG_USB1_MISC_TOG 127 +#define USB_ANALOG_USB2_VBUS_DETECT 128 +#define USB_ANALOG_USB2_VBUS_DETECT_SET 129 +#define USB_ANALOG_USB2_VBUS_DETECT_CLR 130 +#define USB_ANALOG_USB2_VBUS_DETECT_TOG 131 +#define USB_ANALOG_USB2_CHRG_DETECT 132 +#define USB_ANALOG_USB2_CHRG_DETECT_SET 133 +#define USB_ANALOG_USB2_CHRG_DETECT_CLR 134 +#define USB_ANALOG_USB2_CHRG_DETECT_TOG 135 +#define USB_ANALOG_USB2_VBUS_DETECT_STAT 136 +#define USB_ANALOG_USB2_CHRG_DETECT_STAT 140 +#define USB_ANALOG_USB2_MISC 148 +#define USB_ANALOG_USB2_MISC_SET 149 +#define USB_ANALOG_USB2_MISC_CLR 150 +#define USB_ANALOG_USB2_MISC_TOG 151 +#define USB_ANALOG_DIGPROG 152 +#define CCM_ANALOG_MAX 4096 + +/* CCM_CBCMR */ +#define R_CBCMR_PRE_PERIPH_CLK_SEL_SHIFT (18) +#define R_CBCMR_PRE_PERIPH_CLK_SEL_LENGTH (2) +#define R_CBCMR_PERIPH_CLK2_SEL_SHIFT (12) +#define R_CBCMR_PERIPH_CLK2_SEL_LENGTH (2) + +/* CCM_CBCDR */ +#define R_CBCDR_AHB_PODF_SHIFT (10) +#define R_CBCDR_AHB_PODF_LENGTH (3) +#define R_CBCDR_IPG_PODF_SHIFT (8) +#define R_CBCDR_IPG_PODF_LENGTH (2) +#define R_CBCDR_PERIPH_CLK_SEL_SHIFT (25) +#define R_CBCDR_PERIPH_CLK_SEL_LENGTH (1) +#define R_CBCDR_PERIPH_CLK2_PODF_SHIFT (27) +#define R_CBCDR_PERIPH_CLK2_PODF_LENGTH (3) + +/* CCM_CSCMR1 */ +#define R_CSCMR1_PERCLK_PODF_SHIFT (0) +#define R_CSCMR1_PERCLK_PODF_LENGTH (6) +#define R_CSCMR1_PERCLK_CLK_SEL_SHIFT (6) +#define R_CSCMR1_PERCLK_CLK_SEL_LENGTH (1) + +/* CCM_ANALOG_PFD_528 */ +#define R_ANALOG_PFD_528_PFD0_FRAC_SHIFT (0) +#define R_ANALOG_PFD_528_PFD0_FRAC_LENGTH (6) +#define R_ANALOG_PFD_528_PFD2_FRAC_SHIFT (16) +#define R_ANALOG_PFD_528_PFD2_FRAC_LENGTH (6) + +/* CCM_ANALOG_PLL_SYS */ +#define R_ANALOG_PLL_SYS_DIV_SELECT_SHIFT (0) +#define R_ANALOG_PLL_SYS_DIV_SELECT_LENGTH (1) + +#define CCM_ANALOG_PLL_LOCK (1 << 31); + +#define TYPE_IMX6UL_CCM "imx6ul.ccm" +#define IMX6UL_CCM(obj) OBJECT_CHECK(IMX6ULCCMState, (obj), TYPE_IMX6UL_CCM) + +typedef struct IMX6ULCCMState { + /* <private> */ + IMXCCMState parent_obj; + + /* <public> */ + MemoryRegion container; + MemoryRegion ioccm; + MemoryRegion ioanalog; + + uint32_t ccm[CCM_MAX]; + uint32_t analog[CCM_ANALOG_MAX]; + +} IMX6ULCCMState; + +#endif /* IMX6UL_CCM_H */ diff --git a/hw/misc/imx6ul_ccm.c b/hw/misc/imx6ul_ccm.c new file mode 100644 index 00000000000..90bc3742713 --- /dev/null +++ b/hw/misc/imx6ul_ccm.c @@ -0,0 +1,886 @@ +/* + * IMX6UL Clock Control Module + * + * Copyright (c) 2018 Jean-Christophe Dubois <jcd@tribudubois.net> + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * + * To get the timer frequencies right, we need to emulate at least part of + * the CCM. + */ + +#include "qemu/osdep.h" +#include "hw/registerfields.h" +#include "hw/misc/imx6ul_ccm.h" +#include "qemu/log.h" + +#include "trace.h" + +static const char *imx6ul_ccm_reg_name(uint32_t reg) +{ + static char unknown[20]; + + switch (reg) { + case CCM_CCR: + return "CCR"; + case CCM_CCDR: + return "CCDR"; + case CCM_CSR: + return "CSR"; + case CCM_CCSR: + return "CCSR"; + case CCM_CACRR: + return "CACRR"; + case CCM_CBCDR: + return "CBCDR"; + case CCM_CBCMR: + return "CBCMR"; + case CCM_CSCMR1: + return "CSCMR1"; + case CCM_CSCMR2: + return "CSCMR2"; + case CCM_CSCDR1: + return "CSCDR1"; + case CCM_CS1CDR: + return "CS1CDR"; + case CCM_CS2CDR: + return "CS2CDR"; + case CCM_CDCDR: + return "CDCDR"; + case CCM_CHSCCDR: + return "CHSCCDR"; + case CCM_CSCDR2: + return "CSCDR2"; + case CCM_CSCDR3: + return "CSCDR3"; + case CCM_CDHIPR: + return "CDHIPR"; + case CCM_CTOR: + return "CTOR"; + case CCM_CLPCR: + return "CLPCR"; + case CCM_CISR: + return "CISR"; + case CCM_CIMR: + return "CIMR"; + case CCM_CCOSR: + return "CCOSR"; + case CCM_CGPR: + return "CGPR"; + case CCM_CCGR0: + return "CCGR0"; + case CCM_CCGR1: + return "CCGR1"; + case CCM_CCGR2: + return "CCGR2"; + case CCM_CCGR3: + return "CCGR3"; + case CCM_CCGR4: + return "CCGR4"; + case CCM_CCGR5: + return "CCGR5"; + case CCM_CCGR6: + return "CCGR6"; + case CCM_CMEOR: + return "CMEOR"; + default: + sprintf(unknown, "%d ?", reg); + return unknown; + } +} + +static const char *imx6ul_analog_reg_name(uint32_t reg) +{ + static char unknown[20]; + + switch (reg) { + case CCM_ANALOG_PLL_ARM: + return "PLL_ARM"; + case CCM_ANALOG_PLL_ARM_SET: + return "PLL_ARM_SET"; + case CCM_ANALOG_PLL_ARM_CLR: + return "PLL_ARM_CLR"; + case CCM_ANALOG_PLL_ARM_TOG: + return "PLL_ARM_TOG"; + case CCM_ANALOG_PLL_USB1: + return "PLL_USB1"; + case CCM_ANALOG_PLL_USB1_SET: + return "PLL_USB1_SET"; + case CCM_ANALOG_PLL_USB1_CLR: + return "PLL_USB1_CLR"; + case CCM_ANALOG_PLL_USB1_TOG: + return "PLL_USB1_TOG"; + case CCM_ANALOG_PLL_USB2: + return "PLL_USB2"; + case CCM_ANALOG_PLL_USB2_SET: + return "PLL_USB2_SET"; + case CCM_ANALOG_PLL_USB2_CLR: + return "PLL_USB2_CLR"; + case CCM_ANALOG_PLL_USB2_TOG: + return "PLL_USB2_TOG"; + case CCM_ANALOG_PLL_SYS: + return "PLL_SYS"; + case CCM_ANALOG_PLL_SYS_SET: + return "PLL_SYS_SET"; + case CCM_ANALOG_PLL_SYS_CLR: + return "PLL_SYS_CLR"; + case CCM_ANALOG_PLL_SYS_TOG: + return "PLL_SYS_TOG"; + case CCM_ANALOG_PLL_SYS_SS: + return "PLL_SYS_SS"; + case CCM_ANALOG_PLL_SYS_NUM: + return "PLL_SYS_NUM"; + case CCM_ANALOG_PLL_SYS_DENOM: + return "PLL_SYS_DENOM"; + case CCM_ANALOG_PLL_AUDIO: + return "PLL_AUDIO"; + case CCM_ANALOG_PLL_AUDIO_SET: + return "PLL_AUDIO_SET"; + case CCM_ANALOG_PLL_AUDIO_CLR: + return "PLL_AUDIO_CLR"; + case CCM_ANALOG_PLL_AUDIO_TOG: + return "PLL_AUDIO_TOG"; + case CCM_ANALOG_PLL_AUDIO_NUM: + return "PLL_AUDIO_NUM"; + case CCM_ANALOG_PLL_AUDIO_DENOM: + return "PLL_AUDIO_DENOM"; + case CCM_ANALOG_PLL_VIDEO: + return "PLL_VIDEO"; + case CCM_ANALOG_PLL_VIDEO_SET: + return "PLL_VIDEO_SET"; + case CCM_ANALOG_PLL_VIDEO_CLR: + return "PLL_VIDEO_CLR"; + case CCM_ANALOG_PLL_VIDEO_TOG: + return "PLL_VIDEO_TOG"; + case CCM_ANALOG_PLL_VIDEO_NUM: + return "PLL_VIDEO_NUM"; + case CCM_ANALOG_PLL_VIDEO_DENOM: + return "PLL_VIDEO_DENOM"; + case CCM_ANALOG_PLL_ENET: + return "PLL_ENET"; + case CCM_ANALOG_PLL_ENET_SET: + return "PLL_ENET_SET"; + case CCM_ANALOG_PLL_ENET_CLR: + return "PLL_ENET_CLR"; + case CCM_ANALOG_PLL_ENET_TOG: + return "PLL_ENET_TOG"; + case CCM_ANALOG_PFD_480: + return "PFD_480"; + case CCM_ANALOG_PFD_480_SET: + return "PFD_480_SET"; + case CCM_ANALOG_PFD_480_CLR: + return "PFD_480_CLR"; + case CCM_ANALOG_PFD_480_TOG: + return "PFD_480_TOG"; + case CCM_ANALOG_PFD_528: + return "PFD_528"; + case CCM_ANALOG_PFD_528_SET: + return "PFD_528_SET"; + case CCM_ANALOG_PFD_528_CLR: + return "PFD_528_CLR"; + case CCM_ANALOG_PFD_528_TOG: + return "PFD_528_TOG"; + case CCM_ANALOG_MISC0: + return "MISC0"; + case CCM_ANALOG_MISC0_SET: + return "MISC0_SET"; + case CCM_ANALOG_MISC0_CLR: + return "MISC0_CLR"; + case CCM_ANALOG_MISC0_TOG: + return "MISC0_TOG"; + case CCM_ANALOG_MISC2: + return "MISC2"; + case CCM_ANALOG_MISC2_SET: + return "MISC2_SET"; + case CCM_ANALOG_MISC2_CLR: + return "MISC2_CLR"; + case CCM_ANALOG_MISC2_TOG: + return "MISC2_TOG"; + case PMU_REG_1P1: + return "PMU_REG_1P1"; + case PMU_REG_3P0: + return "PMU_REG_3P0"; + case PMU_REG_2P5: + return "PMU_REG_2P5"; + case PMU_REG_CORE: + return "PMU_REG_CORE"; + case PMU_MISC1: + return "PMU_MISC1"; + case PMU_MISC1_SET: + return "PMU_MISC1_SET"; + case PMU_MISC1_CLR: + return "PMU_MISC1_CLR"; + case PMU_MISC1_TOG: + return "PMU_MISC1_TOG"; + case USB_ANALOG_DIGPROG: + return "USB_ANALOG_DIGPROG"; + default: + sprintf(unknown, "%d ?", reg); + return unknown; + } +} + +#define CKIH_FREQ 24000000 /* 24MHz crystal input */ + +static const VMStateDescription vmstate_imx6ul_ccm = { + .name = TYPE_IMX6UL_CCM, + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT32_ARRAY(ccm, IMX6ULCCMState, CCM_MAX), + VMSTATE_UINT32_ARRAY(analog, IMX6ULCCMState, CCM_ANALOG_MAX), + VMSTATE_END_OF_LIST() + }, +}; + +static uint64_t imx6ul_analog_get_osc_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = CKIH_FREQ; + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint64_t imx6ul_analog_get_pll2_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = imx6ul_analog_get_osc_clk(dev); + + if (FIELD_EX32(dev->analog[CCM_ANALOG_PLL_SYS], + ANALOG_PLL_SYS, DIV_SELECT)) { + freq *= 22; + } else { + freq *= 20; + } + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint64_t imx6ul_analog_get_pll3_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = imx6ul_analog_get_osc_clk(dev) * 20; + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint64_t imx6ul_analog_get_pll2_pfd0_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = 0; + + freq = imx6ul_analog_get_pll2_clk(dev) * 18 + / FIELD_EX32(dev->analog[CCM_ANALOG_PFD_528], + ANALOG_PFD_528, PFD0_FRAC); + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint64_t imx6ul_analog_get_pll2_pfd2_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = 0; + + freq = imx6ul_analog_get_pll2_clk(dev) * 18 + / FIELD_EX32(dev->analog[CCM_ANALOG_PFD_528], + ANALOG_PFD_528, PFD2_FRAC); + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint64_t imx6ul_analog_pll2_bypass_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = 0; + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint64_t imx6ul_ccm_get_periph_clk2_sel_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = 0; + + switch (FIELD_EX32(dev->ccm[CCM_CBCMR], CBCMR, PERIPH_CLK2_SEL)) { + case 0: + freq = imx6ul_analog_get_pll3_clk(dev); + break; + case 1: + freq = imx6ul_analog_get_osc_clk(dev); + break; + case 2: + freq = imx6ul_analog_pll2_bypass_clk(dev); + break; + case 3: + /* We should never get there as 3 is a reserved value */ + qemu_log_mask(LOG_GUEST_ERROR, + "[%s]%s: unsupported PERIPH_CLK2_SEL value 3\n", + TYPE_IMX6UL_CCM, __func__); + /* freq is set to 0 as we don't know what it should be */ + break; + default: + g_assert_not_reached(); + } + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint64_t imx6ul_ccm_get_periph_clk_sel_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = 0; + + switch (FIELD_EX32(dev->ccm[CCM_CBCMR], CBCMR, PRE_PERIPH_CLK_SEL)) { + case 0: + freq = imx6ul_analog_get_pll2_clk(dev); + break; + case 1: + freq = imx6ul_analog_get_pll2_pfd2_clk(dev); + break; + case 2: + freq = imx6ul_analog_get_pll2_pfd0_clk(dev); + break; + case 3: + freq = imx6ul_analog_get_pll2_pfd2_clk(dev) / 2; + break; + default: + g_assert_not_reached(); + } + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint64_t imx6ul_ccm_get_periph_clk2_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = 0; + + freq = imx6ul_ccm_get_periph_clk2_sel_clk(dev) + / (1 + FIELD_EX32(dev->ccm[CCM_CBCDR], CBCDR, PERIPH_CLK2_PODF)); + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint64_t imx6ul_ccm_get_periph_sel_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = 0; + + switch (FIELD_EX32(dev->ccm[CCM_CBCDR], CBCDR, PERIPH_CLK_SEL)) { + case 0: + freq = imx6ul_ccm_get_periph_clk_sel_clk(dev); + break; + case 1: + freq = imx6ul_ccm_get_periph_clk2_clk(dev); + break; + default: + g_assert_not_reached(); + } + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint64_t imx6ul_ccm_get_ahb_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = 0; + + freq = imx6ul_ccm_get_periph_sel_clk(dev) + / (1 + FIELD_EX32(dev->ccm[CCM_CBCDR], CBCDR, AHB_PODF)); + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint64_t imx6ul_ccm_get_ipg_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = 0; + + freq = imx6ul_ccm_get_ahb_clk(dev) + / (1 + FIELD_EX32(dev->ccm[CCM_CBCDR], CBCDR, IPG_PODF)); + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint64_t imx6ul_ccm_get_per_sel_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = 0; + + switch (FIELD_EX32(dev->ccm[CCM_CSCMR1], CSCMR1, PERCLK_CLK_SEL)) { + case 0: + freq = imx6ul_ccm_get_ipg_clk(dev); + break; + case 1: + freq = imx6ul_analog_get_osc_clk(dev); + break; + default: + g_assert_not_reached(); + } + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint64_t imx6ul_ccm_get_per_clk(IMX6ULCCMState *dev) +{ + uint64_t freq = 0; + + freq = imx6ul_ccm_get_per_sel_clk(dev) + / (1 + FIELD_EX32(dev->ccm[CCM_CSCMR1], CSCMR1, PERCLK_PODF)); + + trace_ccm_freq((uint32_t)freq); + + return freq; +} + +static uint32_t imx6ul_ccm_get_clock_frequency(IMXCCMState *dev, IMXClk clock) +{ + uint32_t freq = 0; + IMX6ULCCMState *s = IMX6UL_CCM(dev); + + switch (clock) { + case CLK_NONE: + break; + case CLK_IPG: + freq = imx6ul_ccm_get_ipg_clk(s); + break; + case CLK_IPG_HIGH: + freq = imx6ul_ccm_get_per_clk(s); + break; + case CLK_32k: + freq = CKIL_FREQ; + break; + case CLK_HIGH: + freq = CKIH_FREQ; + break; + case CLK_HIGH_DIV: + freq = CKIH_FREQ / 8; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: unsupported clock %d\n", + TYPE_IMX6UL_CCM, __func__, clock); + break; + } + + trace_ccm_clock_freq(clock, freq); + + return freq; +} + +static void imx6ul_ccm_reset(DeviceState *dev) +{ + IMX6ULCCMState *s = IMX6UL_CCM(dev); + + trace_ccm_entry(); + + s->ccm[CCM_CCR] = 0x0401167F; + s->ccm[CCM_CCDR] = 0x00000000; + s->ccm[CCM_CSR] = 0x00000010; + s->ccm[CCM_CCSR] = 0x00000100; + s->ccm[CCM_CACRR] = 0x00000000; + s->ccm[CCM_CBCDR] = 0x00018D00; + s->ccm[CCM_CBCMR] = 0x24860324; + s->ccm[CCM_CSCMR1] = 0x04900080; + s->ccm[CCM_CSCMR2] = 0x03192F06; + s->ccm[CCM_CSCDR1] = 0x00490B00; + s->ccm[CCM_CS1CDR] = 0x0EC102C1; + s->ccm[CCM_CS2CDR] = 0x000336C1; + s->ccm[CCM_CDCDR] = 0x33F71F92; + s->ccm[CCM_CHSCCDR] = 0x000248A4; + s->ccm[CCM_CSCDR2] = 0x00029B48; + s->ccm[CCM_CSCDR3] = 0x00014841; + s->ccm[CCM_CDHIPR] = 0x00000000; + s->ccm[CCM_CTOR] = 0x00000000; + s->ccm[CCM_CLPCR] = 0x00000079; + s->ccm[CCM_CISR] = 0x00000000; + s->ccm[CCM_CIMR] = 0xFFFFFFFF; + s->ccm[CCM_CCOSR] = 0x000A0001; + s->ccm[CCM_CGPR] = 0x0000FE62; + s->ccm[CCM_CCGR0] = 0xFFFFFFFF; + s->ccm[CCM_CCGR1] = 0xFFFFFFFF; + s->ccm[CCM_CCGR2] = 0xFC3FFFFF; + s->ccm[CCM_CCGR3] = 0xFFFFFFFF; + s->ccm[CCM_CCGR4] = 0xFFFFFFFF; + s->ccm[CCM_CCGR5] = 0xFFFFFFFF; + s->ccm[CCM_CCGR6] = 0xFFFFFFFF; + s->ccm[CCM_CMEOR] = 0xFFFFFFFF; + + s->analog[CCM_ANALOG_PLL_ARM] = 0x00013063; + s->analog[CCM_ANALOG_PLL_USB1] = 0x00012000; + s->analog[CCM_ANALOG_PLL_USB2] = 0x00012000; + s->analog[CCM_ANALOG_PLL_SYS] = 0x00013001; + s->analog[CCM_ANALOG_PLL_SYS_SS] = 0x00000000; + s->analog[CCM_ANALOG_PLL_SYS_NUM] = 0x00000000; + s->analog[CCM_ANALOG_PLL_SYS_DENOM] = 0x00000012; + s->analog[CCM_ANALOG_PLL_AUDIO] = 0x00011006; + s->analog[CCM_ANALOG_PLL_AUDIO_NUM] = 0x05F5E100; + s->analog[CCM_ANALOG_PLL_AUDIO_DENOM] = 0x2964619C; + s->analog[CCM_ANALOG_PLL_VIDEO] = 0x0001100C; + s->analog[CCM_ANALOG_PLL_VIDEO_NUM] = 0x05F5E100; + s->analog[CCM_ANALOG_PLL_VIDEO_DENOM] = 0x10A24447; + s->analog[CCM_ANALOG_PLL_ENET] = 0x00011001; + s->analog[CCM_ANALOG_PFD_480] = 0x1311100C; + s->analog[CCM_ANALOG_PFD_528] = 0x1018101B; + + s->analog[PMU_REG_1P1] = 0x00001073; + s->analog[PMU_REG_3P0] = 0x00000F74; + s->analog[PMU_REG_2P5] = 0x00001073; + s->analog[PMU_REG_CORE] = 0x00482012; + s->analog[PMU_MISC0] = 0x04000000; + s->analog[PMU_MISC1] = 0x00000000; + s->analog[PMU_MISC2] = 0x00272727; + s->analog[PMU_LOWPWR_CTRL] = 0x00004009; + + s->analog[USB_ANALOG_USB1_VBUS_DETECT] = 0x01000004; + s->analog[USB_ANALOG_USB1_CHRG_DETECT] = 0x00000000; + s->analog[USB_ANALOG_USB1_VBUS_DETECT_STAT] = 0x00000000; + s->analog[USB_ANALOG_USB1_CHRG_DETECT_STAT] = 0x00000000; + s->analog[USB_ANALOG_USB1_MISC] = 0x00000002; + s->analog[USB_ANALOG_USB2_VBUS_DETECT] = 0x01000004; + s->analog[USB_ANALOG_USB2_CHRG_DETECT] = 0x00000000; + s->analog[USB_ANALOG_USB2_MISC] = 0x00000002; + s->analog[USB_ANALOG_DIGPROG] = 0x00640000; + + /* all PLLs need to be locked */ + s->analog[CCM_ANALOG_PLL_ARM] |= CCM_ANALOG_PLL_LOCK; + s->analog[CCM_ANALOG_PLL_USB1] |= CCM_ANALOG_PLL_LOCK; + s->analog[CCM_ANALOG_PLL_USB2] |= CCM_ANALOG_PLL_LOCK; + s->analog[CCM_ANALOG_PLL_SYS] |= CCM_ANALOG_PLL_LOCK; + s->analog[CCM_ANALOG_PLL_AUDIO] |= CCM_ANALOG_PLL_LOCK; + s->analog[CCM_ANALOG_PLL_VIDEO] |= CCM_ANALOG_PLL_LOCK; + s->analog[CCM_ANALOG_PLL_ENET] |= CCM_ANALOG_PLL_LOCK; + + s->analog[TEMPMON_TEMPSENSE0] = 0x00000001; + s->analog[TEMPMON_TEMPSENSE1] = 0x00000001; + s->analog[TEMPMON_TEMPSENSE2] = 0x00000000; +} + +static uint64_t imx6ul_ccm_read(void *opaque, hwaddr offset, unsigned size) +{ + uint32_t value = 0; + uint32_t index = offset >> 2; + IMX6ULCCMState *s = (IMX6ULCCMState *)opaque; + + assert(index < CCM_MAX); + + value = s->ccm[index]; + + trace_ccm_read_reg(imx6ul_ccm_reg_name(index), (uint32_t)value); + + return (uint64_t)value; +} + +static void imx6ul_ccm_write(void *opaque, hwaddr offset, uint64_t value, + unsigned size) +{ + uint32_t index = offset >> 2; + IMX6ULCCMState *s = (IMX6ULCCMState *)opaque; + + assert(index < CCM_MAX); + + trace_ccm_write_reg(imx6ul_ccm_reg_name(index), (uint32_t)value); + + /* + * We will do a better implementation later. In particular some bits + * cannot be written to. + */ + s->ccm[index] = (uint32_t)value; +} + +static uint64_t imx6ul_analog_read(void *opaque, hwaddr offset, unsigned size) +{ + uint32_t value; + uint32_t index = offset >> 2; + IMX6ULCCMState *s = (IMX6ULCCMState *)opaque; + + assert(index < CCM_ANALOG_MAX); + + switch (index) { + case CCM_ANALOG_PLL_ARM_SET: + case CCM_ANALOG_PLL_USB1_SET: + case CCM_ANALOG_PLL_USB2_SET: + case CCM_ANALOG_PLL_SYS_SET: + case CCM_ANALOG_PLL_AUDIO_SET: + case CCM_ANALOG_PLL_VIDEO_SET: + case CCM_ANALOG_PLL_ENET_SET: + case CCM_ANALOG_PFD_480_SET: + case CCM_ANALOG_PFD_528_SET: + case CCM_ANALOG_MISC0_SET: + case PMU_MISC1_SET: + case CCM_ANALOG_MISC2_SET: + case USB_ANALOG_USB1_VBUS_DETECT_SET: + case USB_ANALOG_USB1_CHRG_DETECT_SET: + case USB_ANALOG_USB1_MISC_SET: + case USB_ANALOG_USB2_VBUS_DETECT_SET: + case USB_ANALOG_USB2_CHRG_DETECT_SET: + case USB_ANALOG_USB2_MISC_SET: + case TEMPMON_TEMPSENSE0_SET: + case TEMPMON_TEMPSENSE1_SET: + case TEMPMON_TEMPSENSE2_SET: + /* + * All REG_NAME_SET register access are in fact targeting + * the REG_NAME register. + */ + value = s->analog[index - 1]; + break; + case CCM_ANALOG_PLL_ARM_CLR: + case CCM_ANALOG_PLL_USB1_CLR: + case CCM_ANALOG_PLL_USB2_CLR: + case CCM_ANALOG_PLL_SYS_CLR: + case CCM_ANALOG_PLL_AUDIO_CLR: + case CCM_ANALOG_PLL_VIDEO_CLR: + case CCM_ANALOG_PLL_ENET_CLR: + case CCM_ANALOG_PFD_480_CLR: + case CCM_ANALOG_PFD_528_CLR: + case CCM_ANALOG_MISC0_CLR: + case PMU_MISC1_CLR: + case CCM_ANALOG_MISC2_CLR: + case USB_ANALOG_USB1_VBUS_DETECT_CLR: + case USB_ANALOG_USB1_CHRG_DETECT_CLR: + case USB_ANALOG_USB1_MISC_CLR: + case USB_ANALOG_USB2_VBUS_DETECT_CLR: + case USB_ANALOG_USB2_CHRG_DETECT_CLR: + case USB_ANALOG_USB2_MISC_CLR: + case TEMPMON_TEMPSENSE0_CLR: + case TEMPMON_TEMPSENSE1_CLR: + case TEMPMON_TEMPSENSE2_CLR: + /* + * All REG_NAME_CLR register access are in fact targeting + * the REG_NAME register. + */ + value = s->analog[index - 2]; + break; + case CCM_ANALOG_PLL_ARM_TOG: + case CCM_ANALOG_PLL_USB1_TOG: + case CCM_ANALOG_PLL_USB2_TOG: + case CCM_ANALOG_PLL_SYS_TOG: + case CCM_ANALOG_PLL_AUDIO_TOG: + case CCM_ANALOG_PLL_VIDEO_TOG: + case CCM_ANALOG_PLL_ENET_TOG: + case CCM_ANALOG_PFD_480_TOG: + case CCM_ANALOG_PFD_528_TOG: + case CCM_ANALOG_MISC0_TOG: + case PMU_MISC1_TOG: + case CCM_ANALOG_MISC2_TOG: + case USB_ANALOG_USB1_VBUS_DETECT_TOG: + case USB_ANALOG_USB1_CHRG_DETECT_TOG: + case USB_ANALOG_USB1_MISC_TOG: + case USB_ANALOG_USB2_VBUS_DETECT_TOG: + case USB_ANALOG_USB2_CHRG_DETECT_TOG: + case USB_ANALOG_USB2_MISC_TOG: + case TEMPMON_TEMPSENSE0_TOG: + case TEMPMON_TEMPSENSE1_TOG: + case TEMPMON_TEMPSENSE2_TOG: + /* + * All REG_NAME_TOG register access are in fact targeting + * the REG_NAME register. + */ + value = s->analog[index - 3]; + break; + default: + value = s->analog[index]; + break; + } + + trace_ccm_read_reg(imx6ul_analog_reg_name(index), (uint32_t)value); + + return (uint64_t)value; +} + +static void imx6ul_analog_write(void *opaque, hwaddr offset, uint64_t value, + unsigned size) +{ + uint32_t index = offset >> 2; + IMX6ULCCMState *s = (IMX6ULCCMState *)opaque; + + assert(index < CCM_ANALOG_MAX); + + trace_ccm_write_reg(imx6ul_analog_reg_name(index), (uint32_t)value); + + switch (index) { + case CCM_ANALOG_PLL_ARM_SET: + case CCM_ANALOG_PLL_USB1_SET: + case CCM_ANALOG_PLL_USB2_SET: + case CCM_ANALOG_PLL_SYS_SET: + case CCM_ANALOG_PLL_AUDIO_SET: + case CCM_ANALOG_PLL_VIDEO_SET: + case CCM_ANALOG_PLL_ENET_SET: + case CCM_ANALOG_PFD_480_SET: + case CCM_ANALOG_PFD_528_SET: + case CCM_ANALOG_MISC0_SET: + case PMU_MISC1_SET: + case CCM_ANALOG_MISC2_SET: + case USB_ANALOG_USB1_VBUS_DETECT_SET: + case USB_ANALOG_USB1_CHRG_DETECT_SET: + case USB_ANALOG_USB1_MISC_SET: + case USB_ANALOG_USB2_VBUS_DETECT_SET: + case USB_ANALOG_USB2_CHRG_DETECT_SET: + case USB_ANALOG_USB2_MISC_SET: + /* + * All REG_NAME_SET register access are in fact targeting + * the REG_NAME register. So we change the value of the + * REG_NAME register, setting bits passed in the value. + */ + s->analog[index - 1] |= value; + break; + case CCM_ANALOG_PLL_ARM_CLR: + case CCM_ANALOG_PLL_USB1_CLR: + case CCM_ANALOG_PLL_USB2_CLR: + case CCM_ANALOG_PLL_SYS_CLR: + case CCM_ANALOG_PLL_AUDIO_CLR: + case CCM_ANALOG_PLL_VIDEO_CLR: + case CCM_ANALOG_PLL_ENET_CLR: + case CCM_ANALOG_PFD_480_CLR: + case CCM_ANALOG_PFD_528_CLR: + case CCM_ANALOG_MISC0_CLR: + case PMU_MISC1_CLR: + case CCM_ANALOG_MISC2_CLR: + case USB_ANALOG_USB1_VBUS_DETECT_CLR: + case USB_ANALOG_USB1_CHRG_DETECT_CLR: + case USB_ANALOG_USB1_MISC_CLR: + case USB_ANALOG_USB2_VBUS_DETECT_CLR: + case USB_ANALOG_USB2_CHRG_DETECT_CLR: + case USB_ANALOG_USB2_MISC_CLR: + /* + * All REG_NAME_CLR register access are in fact targeting + * the REG_NAME register. So we change the value of the + * REG_NAME register, unsetting bits passed in the value. + */ + s->analog[index - 2] &= ~value; + break; + case CCM_ANALOG_PLL_ARM_TOG: + case CCM_ANALOG_PLL_USB1_TOG: + case CCM_ANALOG_PLL_USB2_TOG: + case CCM_ANALOG_PLL_SYS_TOG: + case CCM_ANALOG_PLL_AUDIO_TOG: + case CCM_ANALOG_PLL_VIDEO_TOG: + case CCM_ANALOG_PLL_ENET_TOG: + case CCM_ANALOG_PFD_480_TOG: + case CCM_ANALOG_PFD_528_TOG: + case CCM_ANALOG_MISC0_TOG: + case PMU_MISC1_TOG: + case CCM_ANALOG_MISC2_TOG: + case USB_ANALOG_USB1_VBUS_DETECT_TOG: + case USB_ANALOG_USB1_CHRG_DETECT_TOG: + case USB_ANALOG_USB1_MISC_TOG: + case USB_ANALOG_USB2_VBUS_DETECT_TOG: + case USB_ANALOG_USB2_CHRG_DETECT_TOG: + case USB_ANALOG_USB2_MISC_TOG: + /* + * All REG_NAME_TOG register access are in fact targeting + * the REG_NAME register. So we change the value of the + * REG_NAME register, toggling bits passed in the value. + */ + s->analog[index - 3] ^= value; + break; + default: + /* + * We will do a better implementation later. In particular some bits + * cannot be written to. + */ + s->analog[index] = value; + break; + } +} + +static const struct MemoryRegionOps imx6ul_ccm_ops = { + .read = imx6ul_ccm_read, + .write = imx6ul_ccm_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + /* + * Our device would not work correctly if the guest was doing + * unaligned access. This might not be a limitation on the real + * device but in practice there is no reason for a guest to access + * this device unaligned. + */ + .min_access_size = 4, + .max_access_size = 4, + .unaligned = false, + }, +}; + +static const struct MemoryRegionOps imx6ul_analog_ops = { + .read = imx6ul_analog_read, + .write = imx6ul_analog_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + /* + * Our device would not work correctly if the guest was doing + * unaligned access. This might not be a limitation on the real + * device but in practice there is no reason for a guest to access + * this device unaligned. + */ + .min_access_size = 4, + .max_access_size = 4, + .unaligned = false, + }, +}; + +static void imx6ul_ccm_init(Object *obj) +{ + DeviceState *dev = DEVICE(obj); + SysBusDevice *sd = SYS_BUS_DEVICE(obj); + IMX6ULCCMState *s = IMX6UL_CCM(obj); + + /* initialize a container for the all memory range */ + memory_region_init(&s->container, OBJECT(dev), TYPE_IMX6UL_CCM, 0x8000); + + /* We initialize an IO memory region for the CCM part */ + memory_region_init_io(&s->ioccm, OBJECT(dev), &imx6ul_ccm_ops, s, + TYPE_IMX6UL_CCM ".ccm", CCM_MAX * sizeof(uint32_t)); + + /* Add the CCM as a subregion at offset 0 */ + memory_region_add_subregion(&s->container, 0, &s->ioccm); + + /* We initialize an IO memory region for the ANALOG part */ + memory_region_init_io(&s->ioanalog, OBJECT(dev), &imx6ul_analog_ops, s, + TYPE_IMX6UL_CCM ".analog", + CCM_ANALOG_MAX * sizeof(uint32_t)); + + /* Add the ANALOG as a subregion at offset 0x4000 */ + memory_region_add_subregion(&s->container, 0x4000, &s->ioanalog); + + sysbus_init_mmio(sd, &s->container); +} + +static void imx6ul_ccm_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + IMXCCMClass *ccm = IMX_CCM_CLASS(klass); + + dc->reset = imx6ul_ccm_reset; + dc->vmsd = &vmstate_imx6ul_ccm; + dc->desc = "i.MX6UL Clock Control Module"; + + ccm->get_clock_frequency = imx6ul_ccm_get_clock_frequency; +} + +static const TypeInfo imx6ul_ccm_info = { + .name = TYPE_IMX6UL_CCM, + .parent = TYPE_IMX_CCM, + .instance_size = sizeof(IMX6ULCCMState), + .instance_init = imx6ul_ccm_init, + .class_init = imx6ul_ccm_class_init, +}; + +static void imx6ul_ccm_register_types(void) +{ + type_register_static(&imx6ul_ccm_info); +} + +type_init(imx6ul_ccm_register_types) diff --git a/hw/misc/trace-events b/hw/misc/trace-events index c956e1419b7..1341508b336 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -109,3 +109,10 @@ iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit Sec iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u" iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u" iotkit_secctl_reset(void) "IoTKit SecCtl: reset" + +# hw/misc/imx6ul_ccm.c +ccm_entry(void) "\n" +ccm_freq(uint32_t freq) "freq = %d\n" +ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d\n" +ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32 "\n" +ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32 "\n" -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 09/30] i.MX6UL: Add i.MX6UL SOC 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (7 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 08/30] i.MX6UL: Add i.MX6UL specific CCM device Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2019-07-11 12:53 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 10/30] i.MX6UL: Add Freescale i.MX6 UltraLite 14x14 EVK Board Peter Maydell ` (21 subsequent siblings) 30 siblings, 1 reply; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 3853ec555d68e7e25d726170833b775796151a07.1532984236.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/arm/Makefile.objs | 1 + include/hw/arm/fsl-imx6ul.h | 339 ++++++++++++++++++ hw/arm/fsl-imx6ul.c | 617 ++++++++++++++++++++++++++++++++ default-configs/arm-softmmu.mak | 1 + 4 files changed, 958 insertions(+) create mode 100644 include/hw/arm/fsl-imx6ul.h create mode 100644 hw/arm/fsl-imx6ul.c diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs index d51fcecaf24..e419ad040b2 100644 --- a/hw/arm/Makefile.objs +++ b/hw/arm/Makefile.objs @@ -36,3 +36,4 @@ obj-$(CONFIG_MSF2) += msf2-soc.o msf2-som.o obj-$(CONFIG_IOTKIT) += iotkit.o obj-$(CONFIG_FSL_IMX7) += fsl-imx7.o mcimx7d-sabre.o obj-$(CONFIG_ARM_SMMUV3) += smmu-common.o smmuv3.o +obj-$(CONFIG_FSL_IMX6UL) += fsl-imx6ul.o diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h new file mode 100644 index 00000000000..58972171943 --- /dev/null +++ b/include/hw/arm/fsl-imx6ul.h @@ -0,0 +1,339 @@ +/* + * Copyright (c) 2018 Jean-Christophe Dubois <jcd@tribudubois.net> + * + * i.MX6ul SoC definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef FSL_IMX6UL_H +#define FSL_IMX6UL_H + +#include "hw/arm/arm.h" +#include "hw/cpu/a15mpcore.h" +#include "hw/misc/imx6ul_ccm.h" +#include "hw/misc/imx6_src.h" +#include "hw/misc/imx7_snvs.h" +#include "hw/misc/imx7_gpr.h" +#include "hw/intc/imx_gpcv2.h" +#include "hw/misc/imx2_wdt.h" +#include "hw/gpio/imx_gpio.h" +#include "hw/char/imx_serial.h" +#include "hw/timer/imx_gpt.h" +#include "hw/timer/imx_epit.h" +#include "hw/i2c/imx_i2c.h" +#include "hw/gpio/imx_gpio.h" +#include "hw/sd/sdhci.h" +#include "hw/ssi/imx_spi.h" +#include "hw/net/imx_fec.h" +#include "exec/memory.h" +#include "cpu.h" + +#define TYPE_FSL_IMX6UL "fsl,imx6ul" +#define FSL_IMX6UL(obj) OBJECT_CHECK(FslIMX6ULState, (obj), TYPE_FSL_IMX6UL) + +enum FslIMX6ULConfiguration { + FSL_IMX6UL_NUM_CPUS = 1, + FSL_IMX6UL_NUM_UARTS = 8, + FSL_IMX6UL_NUM_ETHS = 2, + FSL_IMX6UL_ETH_NUM_TX_RINGS = 2, + FSL_IMX6UL_NUM_USDHCS = 2, + FSL_IMX6UL_NUM_WDTS = 3, + FSL_IMX6UL_NUM_GPTS = 2, + FSL_IMX6UL_NUM_EPITS = 2, + FSL_IMX6UL_NUM_IOMUXCS = 2, + FSL_IMX6UL_NUM_GPIOS = 5, + FSL_IMX6UL_NUM_I2CS = 4, + FSL_IMX6UL_NUM_ECSPIS = 4, + FSL_IMX6UL_NUM_ADCS = 2, +}; + +typedef struct FslIMX6ULState { + /*< private >*/ + DeviceState parent_obj; + + /*< public >*/ + ARMCPU cpu[FSL_IMX6UL_NUM_CPUS]; + A15MPPrivState a7mpcore; + IMXGPTState gpt[FSL_IMX6UL_NUM_GPTS]; + IMXEPITState epit[FSL_IMX6UL_NUM_EPITS]; + IMXGPIOState gpio[FSL_IMX6UL_NUM_GPIOS]; + IMX6ULCCMState ccm; + IMX6SRCState src; + IMX7SNVSState snvs; + IMXGPCv2State gpcv2; + IMX7GPRState gpr; + IMXSPIState spi[FSL_IMX6UL_NUM_ECSPIS]; + IMXI2CState i2c[FSL_IMX6UL_NUM_I2CS]; + IMXSerialState uart[FSL_IMX6UL_NUM_UARTS]; + IMXFECState eth[FSL_IMX6UL_NUM_ETHS]; + SDHCIState usdhc[FSL_IMX6UL_NUM_USDHCS]; + IMX2WdtState wdt[FSL_IMX6UL_NUM_WDTS]; + MemoryRegion rom; + MemoryRegion caam; + MemoryRegion ocram; + MemoryRegion ocram_alias; +} FslIMX6ULState; + +enum FslIMX6ULMemoryMap { + FSL_IMX6UL_MMDC_ADDR = 0x80000000, + FSL_IMX6UL_MMDC_SIZE = 2 * 1024 * 1024 * 1024UL, + + FSL_IMX6UL_QSPI1_MEM_ADDR = 0x60000000, + FSL_IMX6UL_EIM_ALIAS_ADDR = 0x58000000, + FSL_IMX6UL_EIM_CS_ADDR = 0x50000000, + FSL_IMX6UL_AES_ENCRYPT_ADDR = 0x10000000, + FSL_IMX6UL_QSPI1_RX_ADDR = 0x0C000000, + + /* AIPS-2 */ + FSL_IMX6UL_UART6_ADDR = 0x021FC000, + FSL_IMX6UL_I2C4_ADDR = 0x021F8000, + FSL_IMX6UL_UART5_ADDR = 0x021F4000, + FSL_IMX6UL_UART4_ADDR = 0x021F0000, + FSL_IMX6UL_UART3_ADDR = 0x021EC000, + FSL_IMX6UL_UART2_ADDR = 0x021E8000, + FSL_IMX6UL_WDOG3_ADDR = 0x021E4000, + FSL_IMX6UL_QSPI_ADDR = 0x021E0000, + FSL_IMX6UL_SYS_CNT_CTRL_ADDR = 0x021DC000, + FSL_IMX6UL_SYS_CNT_CMP_ADDR = 0x021D8000, + FSL_IMX6UL_SYS_CNT_RD_ADDR = 0x021D4000, + FSL_IMX6UL_TZASC_ADDR = 0x021D0000, + FSL_IMX6UL_PXP_ADDR = 0x021CC000, + FSL_IMX6UL_LCDIF_ADDR = 0x021C8000, + FSL_IMX6UL_CSI_ADDR = 0x021C4000, + FSL_IMX6UL_CSU_ADDR = 0x021C0000, + FSL_IMX6UL_OCOTP_CTRL_ADDR = 0x021BC000, + FSL_IMX6UL_EIM_ADDR = 0x021B8000, + FSL_IMX6UL_SIM2_ADDR = 0x021B4000, + FSL_IMX6UL_MMDC_CFG_ADDR = 0x021B0000, + FSL_IMX6UL_ROMCP_ADDR = 0x021AC000, + FSL_IMX6UL_I2C3_ADDR = 0x021A8000, + FSL_IMX6UL_I2C2_ADDR = 0x021A4000, + FSL_IMX6UL_I2C1_ADDR = 0x021A0000, + FSL_IMX6UL_ADC2_ADDR = 0x0219C000, + FSL_IMX6UL_ADC1_ADDR = 0x02198000, + FSL_IMX6UL_USDHC2_ADDR = 0x02194000, + FSL_IMX6UL_USDHC1_ADDR = 0x02190000, + FSL_IMX6UL_SIM1_ADDR = 0x0218C000, + FSL_IMX6UL_ENET1_ADDR = 0x02188000, + FSL_IMX6UL_USBO2_USBMISC_ADDR = 0x02184800, + FSL_IMX6UL_USBO2_USB_ADDR = 0x02184000, + FSL_IMX6UL_USBO2_PL301_ADDR = 0x02180000, + FSL_IMX6UL_AIPS2_CFG_ADDR = 0x0217C000, + FSL_IMX6UL_CAAM_ADDR = 0x02140000, + FSL_IMX6UL_A7MPCORE_DAP_ADDR = 0x02100000, + + /* AIPS-1 */ + FSL_IMX6UL_PWM8_ADDR = 0x020FC000, + FSL_IMX6UL_PWM7_ADDR = 0x020F8000, + FSL_IMX6UL_PWM6_ADDR = 0x020F4000, + FSL_IMX6UL_PWM5_ADDR = 0x020F0000, + FSL_IMX6UL_SDMA_ADDR = 0x020EC000, + FSL_IMX6UL_GPT2_ADDR = 0x020E8000, + FSL_IMX6UL_IOMUXC_GPR_ADDR = 0x020E4000, + FSL_IMX6UL_IOMUXC_ADDR = 0x020E0000, + FSL_IMX6UL_GPC_ADDR = 0x020DC000, + FSL_IMX6UL_SRC_ADDR = 0x020D8000, + FSL_IMX6UL_EPIT2_ADDR = 0x020D4000, + FSL_IMX6UL_EPIT1_ADDR = 0x020D0000, + FSL_IMX6UL_SNVS_HP_ADDR = 0x020CC000, + FSL_IMX6UL_ANALOG_ADDR = 0x020C8000, + FSL_IMX6UL_CCM_ADDR = 0x020C4000, + FSL_IMX6UL_WDOG2_ADDR = 0x020C0000, + FSL_IMX6UL_WDOG1_ADDR = 0x020BC000, + FSL_IMX6UL_KPP_ADDR = 0x020B8000, + FSL_IMX6UL_ENET2_ADDR = 0x020B4000, + FSL_IMX6UL_SNVS_LP_ADDR = 0x020B0000, + FSL_IMX6UL_GPIO5_ADDR = 0x020AC000, + FSL_IMX6UL_GPIO4_ADDR = 0x020A8000, + FSL_IMX6UL_GPIO3_ADDR = 0x020A4000, + FSL_IMX6UL_GPIO2_ADDR = 0x020A0000, + FSL_IMX6UL_GPIO1_ADDR = 0x0209C000, + FSL_IMX6UL_GPT1_ADDR = 0x02098000, + FSL_IMX6UL_CAN2_ADDR = 0x02094000, + FSL_IMX6UL_CAN1_ADDR = 0x02090000, + FSL_IMX6UL_PWM4_ADDR = 0x0208C000, + FSL_IMX6UL_PWM3_ADDR = 0x02088000, + FSL_IMX6UL_PWM2_ADDR = 0x02084000, + FSL_IMX6UL_PWM1_ADDR = 0x02080000, + FSL_IMX6UL_AIPS1_CFG_ADDR = 0x0207C000, + FSL_IMX6UL_BEE_ADDR = 0x02044000, + FSL_IMX6UL_TOUCH_CTRL_ADDR = 0x02040000, + FSL_IMX6UL_SPBA_ADDR = 0x0203C000, + FSL_IMX6UL_ASRC_ADDR = 0x02034000, + FSL_IMX6UL_SAI3_ADDR = 0x02030000, + FSL_IMX6UL_SAI2_ADDR = 0x0202C000, + FSL_IMX6UL_SAI1_ADDR = 0x02028000, + FSL_IMX6UL_UART8_ADDR = 0x02024000, + FSL_IMX6UL_UART1_ADDR = 0x02020000, + FSL_IMX6UL_UART7_ADDR = 0x02018000, + FSL_IMX6UL_ECSPI4_ADDR = 0x02014000, + FSL_IMX6UL_ECSPI3_ADDR = 0x02010000, + FSL_IMX6UL_ECSPI2_ADDR = 0x0200C000, + FSL_IMX6UL_ECSPI1_ADDR = 0x02008000, + FSL_IMX6UL_SPDIF_ADDR = 0x02004000, + + FSL_IMX6UL_APBH_DMA_ADDR = 0x01804000, + FSL_IMX6UL_APBH_DMA_SIZE = (32 * 1024), + + FSL_IMX6UL_A7MPCORE_ADDR = 0x00A00000, + + FSL_IMX6UL_OCRAM_ALIAS_ADDR = 0x00920000, + FSL_IMX6UL_OCRAM_ALIAS_SIZE = 0x00060000, + FSL_IMX6UL_OCRAM_MEM_ADDR = 0x00900000, + FSL_IMX6UL_OCRAM_MEM_SIZE = 0x00020000, + FSL_IMX6UL_CAAM_MEM_ADDR = 0x00100000, + FSL_IMX6UL_CAAM_MEM_SIZE = 0x00008000, + FSL_IMX6UL_ROM_ADDR = 0x00000000, + FSL_IMX6UL_ROM_SIZE = 0x00018000, +}; + +enum FslIMX6ULIRQs { + FSL_IMX6UL_IOMUXC_IRQ = 0, + FSL_IMX6UL_DAP_IRQ = 1, + FSL_IMX6UL_SDMA_IRQ = 2, + FSL_IMX6UL_TSC_IRQ = 3, + FSL_IMX6UL_SNVS_IRQ = 4, + FSL_IMX6UL_LCDIF_IRQ = 5, + FSL_IMX6UL_BEE_IRQ = 6, + FSL_IMX6UL_CSI_IRQ = 7, + FSL_IMX6UL_PXP_IRQ = 8, + FSL_IMX6UL_SCTR1_IRQ = 9, + FSL_IMX6UL_SCTR2_IRQ = 10, + FSL_IMX6UL_WDOG3_IRQ = 11, + FSL_IMX6UL_APBH_DMA_IRQ = 13, + FSL_IMX6UL_WEIM_IRQ = 14, + FSL_IMX6UL_RAWNAND1_IRQ = 15, + FSL_IMX6UL_RAWNAND2_IRQ = 16, + FSL_IMX6UL_UART6_IRQ = 17, + FSL_IMX6UL_SRTC_IRQ = 19, + FSL_IMX6UL_SRTC_SEC_IRQ = 20, + FSL_IMX6UL_CSU_IRQ = 21, + FSL_IMX6UL_USDHC1_IRQ = 22, + FSL_IMX6UL_USDHC2_IRQ = 23, + FSL_IMX6UL_SAI3_IRQ = 24, + FSL_IMX6UL_SAI32_IRQ = 25, + + FSL_IMX6UL_UART1_IRQ = 26, + FSL_IMX6UL_UART2_IRQ = 27, + FSL_IMX6UL_UART3_IRQ = 28, + FSL_IMX6UL_UART4_IRQ = 29, + FSL_IMX6UL_UART5_IRQ = 30, + + FSL_IMX6UL_ECSPI1_IRQ = 31, + FSL_IMX6UL_ECSPI2_IRQ = 32, + FSL_IMX6UL_ECSPI3_IRQ = 33, + FSL_IMX6UL_ECSPI4_IRQ = 34, + + FSL_IMX6UL_I2C4_IRQ = 35, + FSL_IMX6UL_I2C1_IRQ = 36, + FSL_IMX6UL_I2C2_IRQ = 37, + FSL_IMX6UL_I2C3_IRQ = 38, + + FSL_IMX6UL_UART7_IRQ = 39, + FSL_IMX6UL_UART8_IRQ = 40, + + FSL_IMX6UL_USB1_IRQ = 42, + FSL_IMX6UL_USB2_IRQ = 43, + FSL_IMX6UL_USB_PHY1_IRQ = 44, + FSL_IMX6UL_USB_PHY2_IRQ = 44, + + FSL_IMX6UL_CAAM_JQ2_IRQ = 46, + FSL_IMX6UL_CAAM_ERR_IRQ = 47, + FSL_IMX6UL_CAAM_RTIC_IRQ = 48, + FSL_IMX6UL_TEMP_IRQ = 49, + FSL_IMX6UL_ASRC_IRQ = 50, + FSL_IMX6UL_SPDIF_IRQ = 52, + FSL_IMX6UL_PMU_REG_IRQ = 54, + FSL_IMX6UL_GPT1_IRQ = 55, + + FSL_IMX6UL_EPIT1_IRQ = 56, + FSL_IMX6UL_EPIT2_IRQ = 57, + + FSL_IMX6UL_GPIO1_INT7_IRQ = 58, + FSL_IMX6UL_GPIO1_INT6_IRQ = 59, + FSL_IMX6UL_GPIO1_INT5_IRQ = 60, + FSL_IMX6UL_GPIO1_INT4_IRQ = 61, + FSL_IMX6UL_GPIO1_INT3_IRQ = 62, + FSL_IMX6UL_GPIO1_INT2_IRQ = 63, + FSL_IMX6UL_GPIO1_INT1_IRQ = 64, + FSL_IMX6UL_GPIO1_INT0_IRQ = 65, + FSL_IMX6UL_GPIO1_LOW_IRQ = 66, + FSL_IMX6UL_GPIO1_HIGH_IRQ = 67, + FSL_IMX6UL_GPIO2_LOW_IRQ = 68, + FSL_IMX6UL_GPIO2_HIGH_IRQ = 69, + FSL_IMX6UL_GPIO3_LOW_IRQ = 70, + FSL_IMX6UL_GPIO3_HIGH_IRQ = 71, + FSL_IMX6UL_GPIO4_LOW_IRQ = 72, + FSL_IMX6UL_GPIO4_HIGH_IRQ = 73, + FSL_IMX6UL_GPIO5_LOW_IRQ = 74, + FSL_IMX6UL_GPIO5_HIGH_IRQ = 75, + + FSL_IMX6UL_WDOG1_IRQ = 80, + FSL_IMX6UL_WDOG2_IRQ = 81, + + FSL_IMX6UL_KPP_IRQ = 82, + + FSL_IMX6UL_PWM1_IRQ = 83, + FSL_IMX6UL_PWM2_IRQ = 84, + FSL_IMX6UL_PWM3_IRQ = 85, + FSL_IMX6UL_PWM4_IRQ = 86, + + FSL_IMX6UL_CCM1_IRQ = 87, + FSL_IMX6UL_CCM2_IRQ = 88, + + FSL_IMX6UL_GPC_IRQ = 89, + + FSL_IMX6UL_SRC_IRQ = 91, + + FSL_IMX6UL_CPU_PERF_IRQ = 94, + FSL_IMX6UL_CPU_CTI_IRQ = 95, + + FSL_IMX6UL_SRC_WDOG_IRQ = 96, + + FSL_IMX6UL_SAI1_IRQ = 97, + FSL_IMX6UL_SAI2_IRQ = 98, + + FSL_IMX6UL_ADC1_IRQ = 100, + FSL_IMX6UL_ADC2_IRQ = 101, + + FSL_IMX6UL_SJC_IRQ = 104, + + FSL_IMX6UL_CAAM_RING0_IRQ = 105, + FSL_IMX6UL_CAAM_RING1_IRQ = 106, + + FSL_IMX6UL_QSPI_IRQ = 107, + + FSL_IMX6UL_TZASC_IRQ = 108, + + FSL_IMX6UL_GPT2_IRQ = 109, + + FSL_IMX6UL_CAN1_IRQ = 110, + FSL_IMX6UL_CAN2_IRQ = 111, + + FSL_IMX6UL_SIM1_IRQ = 112, + FSL_IMX6UL_SIM2_IRQ = 113, + + FSL_IMX6UL_PWM5_IRQ = 114, + FSL_IMX6UL_PWM6_IRQ = 115, + FSL_IMX6UL_PWM7_IRQ = 116, + FSL_IMX6UL_PWM8_IRQ = 117, + + FSL_IMX6UL_ENET1_IRQ = 118, + FSL_IMX6UL_ENET1_TIMER_IRQ = 119, + FSL_IMX6UL_ENET2_IRQ = 120, + FSL_IMX6UL_ENET2_TIMER_IRQ = 121, + + FSL_IMX6UL_PMU_CORE_IRQ = 127, + FSL_IMX6UL_MAX_IRQ = 128, +}; + +#endif /* FSL_IMX6UL_H */ diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c new file mode 100644 index 00000000000..258f4706234 --- /dev/null +++ b/hw/arm/fsl-imx6ul.c @@ -0,0 +1,617 @@ +/* + * Copyright (c) 2018 Jean-Christophe Dubois <jcd@tribudubois.net> + * + * i.MX6UL SOC emulation. + * + * Based on hw/arm/fsl-imx7.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu-common.h" +#include "hw/arm/fsl-imx6ul.h" +#include "hw/misc/unimp.h" +#include "sysemu/sysemu.h" +#include "qemu/error-report.h" + +#define NAME_SIZE 20 + +static void fsl_imx6ul_init(Object *obj) +{ + FslIMX6ULState *s = FSL_IMX6UL(obj); + char name[NAME_SIZE]; + int i; + + for (i = 0; i < MIN(smp_cpus, FSL_IMX6UL_NUM_CPUS); i++) { + snprintf(name, NAME_SIZE, "cpu%d", i); + object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]), + "cortex-a7-" TYPE_ARM_CPU, &error_abort, NULL); + } + + /* + * A7MPCORE + */ + sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore, sizeof(s->a7mpcore), + TYPE_A15MPCORE_PRIV); + + /* + * CCM + */ + sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX6UL_CCM); + + /* + * SRC + */ + sysbus_init_child_obj(obj, "src", &s->src, sizeof(s->src), TYPE_IMX6_SRC); + + /* + * GPCv2 + */ + sysbus_init_child_obj(obj, "gpcv2", &s->gpcv2, sizeof(s->gpcv2), + TYPE_IMX_GPCV2); + + /* + * SNVS + */ + sysbus_init_child_obj(obj, "snvs", &s->snvs, sizeof(s->snvs), + TYPE_IMX7_SNVS); + + /* + * GPR + */ + sysbus_init_child_obj(obj, "gpr", &s->gpr, sizeof(s->gpr), + TYPE_IMX7_GPR); + + /* + * GPIOs 1 to 5 + */ + for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { + snprintf(name, NAME_SIZE, "gpio%d", i); + sysbus_init_child_obj(obj, name, &s->gpio[i], sizeof(s->gpio[i]), + TYPE_IMX_GPIO); + } + + /* + * GPT 1, 2 + */ + for (i = 0; i < FSL_IMX6UL_NUM_GPTS; i++) { + snprintf(name, NAME_SIZE, "gpt%d", i); + sysbus_init_child_obj(obj, name, &s->gpt[i], sizeof(s->gpt[i]), + TYPE_IMX7_GPT); + } + + /* + * EPIT 1, 2 + */ + for (i = 0; i < FSL_IMX6UL_NUM_EPITS; i++) { + snprintf(name, NAME_SIZE, "epit%d", i + 1); + sysbus_init_child_obj(obj, name, &s->epit[i], sizeof(s->epit[i]), + TYPE_IMX_EPIT); + } + + /* + * eCSPI + */ + for (i = 0; i < FSL_IMX6UL_NUM_ECSPIS; i++) { + snprintf(name, NAME_SIZE, "spi%d", i + 1); + sysbus_init_child_obj(obj, name, &s->spi[i], sizeof(s->spi[i]), + TYPE_IMX_SPI); + } + + /* + * I2C + */ + for (i = 0; i < FSL_IMX6UL_NUM_I2CS; i++) { + snprintf(name, NAME_SIZE, "i2c%d", i + 1); + sysbus_init_child_obj(obj, name, &s->i2c[i], sizeof(s->i2c[i]), + TYPE_IMX_I2C); + } + + /* + * UART + */ + for (i = 0; i < FSL_IMX6UL_NUM_UARTS; i++) { + snprintf(name, NAME_SIZE, "uart%d", i); + sysbus_init_child_obj(obj, name, &s->uart[i], sizeof(s->uart[i]), + TYPE_IMX_SERIAL); + } + + /* + * Ethernet + */ + for (i = 0; i < FSL_IMX6UL_NUM_ETHS; i++) { + snprintf(name, NAME_SIZE, "eth%d", i); + sysbus_init_child_obj(obj, name, &s->eth[i], sizeof(s->eth[i]), + TYPE_IMX_ENET); + } + + /* + * SDHCI + */ + for (i = 0; i < FSL_IMX6UL_NUM_USDHCS; i++) { + snprintf(name, NAME_SIZE, "usdhc%d", i); + sysbus_init_child_obj(obj, name, &s->usdhc[i], sizeof(s->usdhc[i]), + TYPE_IMX_USDHC); + } + + /* + * Watchdog + */ + for (i = 0; i < FSL_IMX6UL_NUM_WDTS; i++) { + snprintf(name, NAME_SIZE, "wdt%d", i); + sysbus_init_child_obj(obj, name, &s->wdt[i], sizeof(s->wdt[i]), + TYPE_IMX2_WDT); + } +} + +static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) +{ + FslIMX6ULState *s = FSL_IMX6UL(dev); + int i; + qemu_irq irq; + char name[NAME_SIZE]; + + if (smp_cpus > FSL_IMX6UL_NUM_CPUS) { + error_setg(errp, "%s: Only %d CPUs are supported (%d requested)", + TYPE_FSL_IMX6UL, FSL_IMX6UL_NUM_CPUS, smp_cpus); + return; + } + + for (i = 0; i < smp_cpus; i++) { + Object *o = OBJECT(&s->cpu[i]); + + object_property_set_int(o, QEMU_PSCI_CONDUIT_SMC, + "psci-conduit", &error_abort); + + /* On uniprocessor, the CBAR is set to 0 */ + if (smp_cpus > 1) { + object_property_set_int(o, FSL_IMX6UL_A7MPCORE_ADDR, + "reset-cbar", &error_abort); + } + + if (i) { + /* Secondary CPUs start in PSCI powered-down state */ + object_property_set_bool(o, true, + "start-powered-off", &error_abort); + } + + object_property_set_bool(o, true, "realized", &error_abort); + } + + /* + * A7MPCORE + */ + object_property_set_int(OBJECT(&s->a7mpcore), smp_cpus, "num-cpu", + &error_abort); + object_property_set_int(OBJECT(&s->a7mpcore), + FSL_IMX6UL_MAX_IRQ + GIC_INTERNAL, + "num-irq", &error_abort); + object_property_set_bool(OBJECT(&s->a7mpcore), true, "realized", + &error_abort); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, FSL_IMX6UL_A7MPCORE_ADDR); + + for (i = 0; i < smp_cpus; i++) { + SysBusDevice *sbd = SYS_BUS_DEVICE(&s->a7mpcore); + DeviceState *d = DEVICE(qemu_get_cpu(i)); + + irq = qdev_get_gpio_in(d, ARM_CPU_IRQ); + sysbus_connect_irq(sbd, i, irq); + sysbus_connect_irq(sbd, i + smp_cpus, qdev_get_gpio_in(d, ARM_CPU_FIQ)); + } + + /* + * A7MPCORE DAP + */ + create_unimplemented_device("a7mpcore-dap", FSL_IMX6UL_A7MPCORE_DAP_ADDR, + 0x100000); + + /* + * GPT 1, 2 + */ + for (i = 0; i < FSL_IMX6UL_NUM_GPTS; i++) { + static const hwaddr FSL_IMX6UL_GPTn_ADDR[FSL_IMX6UL_NUM_GPTS] = { + FSL_IMX6UL_GPT1_ADDR, + FSL_IMX6UL_GPT2_ADDR, + }; + + static const int FSL_IMX6UL_GPTn_IRQ[FSL_IMX6UL_NUM_GPTS] = { + FSL_IMX6UL_GPT1_IRQ, + FSL_IMX6UL_GPT2_IRQ, + }; + + s->gpt[i].ccm = IMX_CCM(&s->ccm); + object_property_set_bool(OBJECT(&s->gpt[i]), true, "realized", + &error_abort); + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0, + FSL_IMX6UL_GPTn_ADDR[i]); + + sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt[i]), 0, + qdev_get_gpio_in(DEVICE(&s->a7mpcore), + FSL_IMX6UL_GPTn_IRQ[i])); + } + + /* + * EPIT 1, 2 + */ + for (i = 0; i < FSL_IMX6UL_NUM_EPITS; i++) { + static const hwaddr FSL_IMX6UL_EPITn_ADDR[FSL_IMX6UL_NUM_EPITS] = { + FSL_IMX6UL_EPIT1_ADDR, + FSL_IMX6UL_EPIT2_ADDR, + }; + + static const int FSL_IMX6UL_EPITn_IRQ[FSL_IMX6UL_NUM_EPITS] = { + FSL_IMX6UL_EPIT1_IRQ, + FSL_IMX6UL_EPIT2_IRQ, + }; + + s->epit[i].ccm = IMX_CCM(&s->ccm); + object_property_set_bool(OBJECT(&s->epit[i]), true, "realized", + &error_abort); + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0, + FSL_IMX6UL_EPITn_ADDR[i]); + + sysbus_connect_irq(SYS_BUS_DEVICE(&s->epit[i]), 0, + qdev_get_gpio_in(DEVICE(&s->a7mpcore), + FSL_IMX6UL_EPITn_IRQ[i])); + } + + /* + * GPIO + */ + for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { + static const hwaddr FSL_IMX6UL_GPIOn_ADDR[FSL_IMX6UL_NUM_GPIOS] = { + FSL_IMX6UL_GPIO1_ADDR, + FSL_IMX6UL_GPIO2_ADDR, + FSL_IMX6UL_GPIO3_ADDR, + FSL_IMX6UL_GPIO4_ADDR, + FSL_IMX6UL_GPIO5_ADDR, + }; + + static const int FSL_IMX6UL_GPIOn_LOW_IRQ[FSL_IMX6UL_NUM_GPIOS] = { + FSL_IMX6UL_GPIO1_LOW_IRQ, + FSL_IMX6UL_GPIO2_LOW_IRQ, + FSL_IMX6UL_GPIO3_LOW_IRQ, + FSL_IMX6UL_GPIO4_LOW_IRQ, + FSL_IMX6UL_GPIO5_LOW_IRQ, + }; + + static const int FSL_IMX6UL_GPIOn_HIGH_IRQ[FSL_IMX6UL_NUM_GPIOS] = { + FSL_IMX6UL_GPIO1_HIGH_IRQ, + FSL_IMX6UL_GPIO2_HIGH_IRQ, + FSL_IMX6UL_GPIO3_HIGH_IRQ, + FSL_IMX6UL_GPIO4_HIGH_IRQ, + FSL_IMX6UL_GPIO5_HIGH_IRQ, + }; + + object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", + &error_abort); + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, + FSL_IMX6UL_GPIOn_ADDR[i]); + + sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0, + qdev_get_gpio_in(DEVICE(&s->a7mpcore), + FSL_IMX6UL_GPIOn_LOW_IRQ[i])); + + sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1, + qdev_get_gpio_in(DEVICE(&s->a7mpcore), + FSL_IMX6UL_GPIOn_HIGH_IRQ[i])); + } + + /* + * IOMUXC and IOMUXC_GPR + */ + for (i = 0; i < 1; i++) { + static const hwaddr FSL_IMX6UL_IOMUXCn_ADDR[FSL_IMX6UL_NUM_IOMUXCS] = { + FSL_IMX6UL_IOMUXC_ADDR, + FSL_IMX6UL_IOMUXC_GPR_ADDR, + }; + + snprintf(name, NAME_SIZE, "iomuxc%d", i); + create_unimplemented_device(name, FSL_IMX6UL_IOMUXCn_ADDR[i], 0x4000); + } + + /* + * CCM + */ + object_property_set_bool(OBJECT(&s->ccm), true, "realized", &error_abort); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccm), 0, FSL_IMX6UL_CCM_ADDR); + + /* + * SRC + */ + object_property_set_bool(OBJECT(&s->src), true, "realized", &error_abort); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->src), 0, FSL_IMX6UL_SRC_ADDR); + + /* + * GPCv2 + */ + object_property_set_bool(OBJECT(&s->gpcv2), true, + "realized", &error_abort); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpcv2), 0, FSL_IMX6UL_GPC_ADDR); + + /* Initialize all ECSPI */ + for (i = 0; i < FSL_IMX6UL_NUM_ECSPIS; i++) { + static const hwaddr FSL_IMX6UL_SPIn_ADDR[FSL_IMX6UL_NUM_ECSPIS] = { + FSL_IMX6UL_ECSPI1_ADDR, + FSL_IMX6UL_ECSPI2_ADDR, + FSL_IMX6UL_ECSPI3_ADDR, + FSL_IMX6UL_ECSPI4_ADDR, + }; + + static const int FSL_IMX6UL_SPIn_IRQ[FSL_IMX6UL_NUM_ECSPIS] = { + FSL_IMX6UL_ECSPI1_IRQ, + FSL_IMX6UL_ECSPI2_IRQ, + FSL_IMX6UL_ECSPI3_IRQ, + FSL_IMX6UL_ECSPI4_IRQ, + }; + + /* Initialize the SPI */ + object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", + &error_abort); + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, + FSL_IMX6UL_SPIn_ADDR[i]); + + sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0, + qdev_get_gpio_in(DEVICE(&s->a7mpcore), + FSL_IMX6UL_SPIn_IRQ[i])); + } + + /* + * I2C + */ + for (i = 0; i < FSL_IMX6UL_NUM_I2CS; i++) { + static const hwaddr FSL_IMX6UL_I2Cn_ADDR[FSL_IMX6UL_NUM_I2CS] = { + FSL_IMX6UL_I2C1_ADDR, + FSL_IMX6UL_I2C2_ADDR, + FSL_IMX6UL_I2C3_ADDR, + FSL_IMX6UL_I2C4_ADDR, + }; + + static const int FSL_IMX6UL_I2Cn_IRQ[FSL_IMX6UL_NUM_I2CS] = { + FSL_IMX6UL_I2C1_IRQ, + FSL_IMX6UL_I2C2_IRQ, + FSL_IMX6UL_I2C3_IRQ, + FSL_IMX6UL_I2C4_IRQ, + }; + + object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", + &error_abort); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, FSL_IMX6UL_I2Cn_ADDR[i]); + + sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0, + qdev_get_gpio_in(DEVICE(&s->a7mpcore), + FSL_IMX6UL_I2Cn_IRQ[i])); + } + + /* + * UART + */ + for (i = 0; i < FSL_IMX6UL_NUM_UARTS; i++) { + static const hwaddr FSL_IMX6UL_UARTn_ADDR[FSL_IMX6UL_NUM_UARTS] = { + FSL_IMX6UL_UART1_ADDR, + FSL_IMX6UL_UART2_ADDR, + FSL_IMX6UL_UART3_ADDR, + FSL_IMX6UL_UART4_ADDR, + FSL_IMX6UL_UART5_ADDR, + FSL_IMX6UL_UART6_ADDR, + FSL_IMX6UL_UART7_ADDR, + FSL_IMX6UL_UART8_ADDR, + }; + + static const int FSL_IMX6UL_UARTn_IRQ[FSL_IMX6UL_NUM_UARTS] = { + FSL_IMX6UL_UART1_IRQ, + FSL_IMX6UL_UART2_IRQ, + FSL_IMX6UL_UART3_IRQ, + FSL_IMX6UL_UART4_IRQ, + FSL_IMX6UL_UART5_IRQ, + FSL_IMX6UL_UART6_IRQ, + FSL_IMX6UL_UART7_IRQ, + FSL_IMX6UL_UART8_IRQ, + }; + + qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i)); + + object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", + &error_abort); + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, + FSL_IMX6UL_UARTn_ADDR[i]); + + sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0, + qdev_get_gpio_in(DEVICE(&s->a7mpcore), + FSL_IMX6UL_UARTn_IRQ[i])); + } + + /* + * Ethernet + */ + for (i = 0; i < FSL_IMX6UL_NUM_ETHS; i++) { + static const hwaddr FSL_IMX6UL_ENETn_ADDR[FSL_IMX6UL_NUM_ETHS] = { + FSL_IMX6UL_ENET1_ADDR, + FSL_IMX6UL_ENET2_ADDR, + }; + + static const int FSL_IMX6UL_ENETn_IRQ[FSL_IMX6UL_NUM_ETHS] = { + FSL_IMX6UL_ENET1_IRQ, + FSL_IMX6UL_ENET2_IRQ, + }; + + static const int FSL_IMX6UL_ENETn_TIMER_IRQ[FSL_IMX6UL_NUM_ETHS] = { + FSL_IMX6UL_ENET1_TIMER_IRQ, + FSL_IMX6UL_ENET2_TIMER_IRQ, + }; + + object_property_set_uint(OBJECT(&s->eth[i]), + FSL_IMX6UL_ETH_NUM_TX_RINGS, + "tx-ring-num", &error_abort); + qdev_set_nic_properties(DEVICE(&s->eth[i]), &nd_table[i]); + object_property_set_bool(OBJECT(&s->eth[i]), true, "realized", + &error_abort); + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->eth[i]), 0, + FSL_IMX6UL_ENETn_ADDR[i]); + + sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth[i]), 0, + qdev_get_gpio_in(DEVICE(&s->a7mpcore), + FSL_IMX6UL_ENETn_IRQ[i])); + + sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth[i]), 1, + qdev_get_gpio_in(DEVICE(&s->a7mpcore), + FSL_IMX6UL_ENETn_TIMER_IRQ[i])); + } + + /* + * USDHC + */ + for (i = 0; i < FSL_IMX6UL_NUM_USDHCS; i++) { + static const hwaddr FSL_IMX6UL_USDHCn_ADDR[FSL_IMX6UL_NUM_USDHCS] = { + FSL_IMX6UL_USDHC1_ADDR, + FSL_IMX6UL_USDHC2_ADDR, + }; + + static const int FSL_IMX6UL_USDHCn_IRQ[FSL_IMX6UL_NUM_USDHCS] = { + FSL_IMX6UL_USDHC1_IRQ, + FSL_IMX6UL_USDHC2_IRQ, + }; + + object_property_set_bool(OBJECT(&s->usdhc[i]), true, "realized", + &error_abort); + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->usdhc[i]), 0, + FSL_IMX6UL_USDHCn_ADDR[i]); + + sysbus_connect_irq(SYS_BUS_DEVICE(&s->usdhc[i]), 0, + qdev_get_gpio_in(DEVICE(&s->a7mpcore), + FSL_IMX6UL_USDHCn_IRQ[i])); + } + + /* + * SNVS + */ + object_property_set_bool(OBJECT(&s->snvs), true, "realized", &error_abort); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0, FSL_IMX6UL_SNVS_HP_ADDR); + + /* + * Watchdog + */ + for (i = 0; i < FSL_IMX6UL_NUM_WDTS; i++) { + static const hwaddr FSL_IMX6UL_WDOGn_ADDR[FSL_IMX6UL_NUM_WDTS] = { + FSL_IMX6UL_WDOG1_ADDR, + FSL_IMX6UL_WDOG2_ADDR, + FSL_IMX6UL_WDOG3_ADDR, + }; + + object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized", + &error_abort); + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, + FSL_IMX6UL_WDOGn_ADDR[i]); + } + + /* + * GPR + */ + object_property_set_bool(OBJECT(&s->gpr), true, "realized", + &error_abort); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpr), 0, FSL_IMX6UL_IOMUXC_GPR_ADDR); + + /* + * SDMA + */ + create_unimplemented_device("sdma", FSL_IMX6UL_SDMA_ADDR, 0x4000); + + /* + * APHB_DMA + */ + create_unimplemented_device("aphb_dma", FSL_IMX6UL_APBH_DMA_ADDR, + FSL_IMX6UL_APBH_DMA_SIZE); + + /* + * ADCs + */ + for (i = 0; i < FSL_IMX6UL_NUM_ADCS; i++) { + static const hwaddr FSL_IMX6UL_ADCn_ADDR[FSL_IMX6UL_NUM_ADCS] = { + FSL_IMX6UL_ADC1_ADDR, + FSL_IMX6UL_ADC2_ADDR, + }; + + snprintf(name, NAME_SIZE, "adc%d", i); + create_unimplemented_device(name, FSL_IMX6UL_ADCn_ADDR[i], 0x4000); + } + + /* + * LCD + */ + create_unimplemented_device("lcdif", FSL_IMX6UL_LCDIF_ADDR, 0x4000); + + /* + * ROM memory + */ + memory_region_init_rom(&s->rom, NULL, "imx6ul.rom", + FSL_IMX6UL_ROM_SIZE, &error_abort); + memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_ROM_ADDR, + &s->rom); + + /* + * CAAM memory + */ + memory_region_init_rom(&s->caam, NULL, "imx6ul.caam", + FSL_IMX6UL_CAAM_MEM_SIZE, &error_abort); + memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_CAAM_MEM_ADDR, + &s->caam); + + /* + * OCRAM memory + */ + memory_region_init_ram(&s->ocram, NULL, "imx6ul.ocram", + FSL_IMX6UL_OCRAM_MEM_SIZE, + &error_abort); + memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_OCRAM_MEM_ADDR, + &s->ocram); + + /* + * internal OCRAM (128 KB) is aliased over 512 KB + */ + memory_region_init_alias(&s->ocram_alias, NULL, "imx6ul.ocram_alias", + &s->ocram, 0, FSL_IMX6UL_OCRAM_ALIAS_SIZE); + memory_region_add_subregion(get_system_memory(), + FSL_IMX6UL_OCRAM_ALIAS_ADDR, &s->ocram_alias); +} + +static void fsl_imx6ul_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + + dc->realize = fsl_imx6ul_realize; + dc->desc = "i.MX6UL SOC"; + /* Reason: Uses serial_hds and nd_table in realize() directly */ + dc->user_creatable = false; +} + +static const TypeInfo fsl_imx6ul_type_info = { + .name = TYPE_FSL_IMX6UL, + .parent = TYPE_DEVICE, + .instance_size = sizeof(FslIMX6ULState), + .instance_init = fsl_imx6ul_init, + .class_init = fsl_imx6ul_class_init, +}; + +static void fsl_imx6ul_register_types(void) +{ + type_register_static(&fsl_imx6ul_type_info); +} +type_init(fsl_imx6ul_register_types) diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak index 834d45cfaf9..311584fd74e 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -133,6 +133,7 @@ CONFIG_FSL_IMX6=y CONFIG_FSL_IMX31=y CONFIG_FSL_IMX25=y CONFIG_FSL_IMX7=y +CONFIG_FSL_IMX6UL=y CONFIG_IMX_I2C=y -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PULL 09/30] i.MX6UL: Add i.MX6UL SOC 2018-08-16 13:34 ` [Qemu-devel] [PULL 09/30] i.MX6UL: Add i.MX6UL SOC Peter Maydell @ 2019-07-11 12:53 ` Peter Maydell 0 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2019-07-11 12:53 UTC (permalink / raw) To: QEMU Developers, Jean-Christophe DUBOIS On Thu, 16 Aug 2018 at 14:47, Peter Maydell <peter.maydell@linaro.org> wrote: > > From: Jean-Christophe Dubois <jcd@tribudubois.net> > +enum FslIMX6ULConfiguration { > + FSL_IMX6UL_NUM_CPUS = 1, Hi; Coverity has just noticed some "unreachable code" in places like the imx6ul realize function: > +static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) > +{ > + FslIMX6ULState *s = FSL_IMX6UL(dev); > + int i; > + qemu_irq irq; > + char name[NAME_SIZE]; > + > + if (smp_cpus > FSL_IMX6UL_NUM_CPUS) { > + error_setg(errp, "%s: Only %d CPUs are supported (%d requested)", > + TYPE_FSL_IMX6UL, FSL_IMX6UL_NUM_CPUS, smp_cpus); > + return; > + } > + > + for (i = 0; i < smp_cpus; i++) { > + Object *o = OBJECT(&s->cpu[i]); > + > + object_property_set_int(o, QEMU_PSCI_CONDUIT_SMC, > + "psci-conduit", &error_abort); > + > + /* On uniprocessor, the CBAR is set to 0 */ > + if (smp_cpus > 1) { > + object_property_set_int(o, FSL_IMX6UL_A7MPCORE_ADDR, > + "reset-cbar", &error_abort); > + } where here for instance, smp_cpus can never be > 1 because there is only ever 1 CPU in an iMX6UL and we enforce that with the smp_cpus > FSL_IMX6UL_NUM_CPUS check; so the call to object_property_set_int() is dead unreachable code. Is it the case that there really can only ever be 1 CPU in these SoCs (in which case we might as well delete the dead code), or are there future variants which have two CPUs that we might want to model in future (in which case the dead code has some purpose and we can just tell Coverity to be quiet) ? thanks -- PMM ^ permalink raw reply [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 10/30] i.MX6UL: Add Freescale i.MX6 UltraLite 14x14 EVK Board 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (8 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 09/30] i.MX6UL: Add i.MX6UL SOC Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 11/30] hw/arm: make bitbanded IO optional on ARMv7-M Peter Maydell ` (20 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Jean-Christophe Dubois <jcd@tribudubois.net> Tested by booting linux 4.18 (built using imx_v6_v7_defconfig) on the emulated board. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 3f8eb4300206634dc01e04b12f65b73c0ad2f955.1532984236.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/arm/Makefile.objs | 2 +- hw/arm/mcimx6ul-evk.c | 85 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 86 insertions(+), 1 deletion(-) create mode 100644 hw/arm/mcimx6ul-evk.c diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs index e419ad040b2..2902f47b4c4 100644 --- a/hw/arm/Makefile.objs +++ b/hw/arm/Makefile.objs @@ -36,4 +36,4 @@ obj-$(CONFIG_MSF2) += msf2-soc.o msf2-som.o obj-$(CONFIG_IOTKIT) += iotkit.o obj-$(CONFIG_FSL_IMX7) += fsl-imx7.o mcimx7d-sabre.o obj-$(CONFIG_ARM_SMMUV3) += smmu-common.o smmuv3.o -obj-$(CONFIG_FSL_IMX6UL) += fsl-imx6ul.o +obj-$(CONFIG_FSL_IMX6UL) += fsl-imx6ul.o mcimx6ul-evk.o diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c new file mode 100644 index 00000000000..fb2b015bf6c --- /dev/null +++ b/hw/arm/mcimx6ul-evk.c @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2018 Jean-Christophe Dubois <jcd@tribudubois.net> + * + * MCIMX6UL_EVK Board System emulation. + * + * This code is licensed under the GPL, version 2 or later. + * See the file `COPYING' in the top level directory. + * + * It (partially) emulates a mcimx6ul_evk board, with a Freescale + * i.MX6ul SoC + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu-common.h" +#include "hw/arm/fsl-imx6ul.h" +#include "hw/boards.h" +#include "sysemu/sysemu.h" +#include "qemu/error-report.h" +#include "sysemu/qtest.h" + +typedef struct { + FslIMX6ULState soc; + MemoryRegion ram; +} MCIMX6ULEVK; + +static void mcimx6ul_evk_init(MachineState *machine) +{ + static struct arm_boot_info boot_info; + MCIMX6ULEVK *s = g_new0(MCIMX6ULEVK, 1); + int i; + + if (machine->ram_size > FSL_IMX6UL_MMDC_SIZE) { + error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)", + machine->ram_size, FSL_IMX6UL_MMDC_SIZE); + exit(1); + } + + boot_info = (struct arm_boot_info) { + .loader_start = FSL_IMX6UL_MMDC_ADDR, + .board_id = -1, + .ram_size = machine->ram_size, + .kernel_filename = machine->kernel_filename, + .kernel_cmdline = machine->kernel_cmdline, + .initrd_filename = machine->initrd_filename, + .nb_cpus = smp_cpus, + }; + + object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), + TYPE_FSL_IMX6UL, &error_fatal, NULL); + + object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); + + memory_region_allocate_system_memory(&s->ram, NULL, "mcimx6ul-evk.ram", + machine->ram_size); + memory_region_add_subregion(get_system_memory(), + FSL_IMX6UL_MMDC_ADDR, &s->ram); + + for (i = 0; i < FSL_IMX6UL_NUM_USDHCS; i++) { + BusState *bus; + DeviceState *carddev; + DriveInfo *di; + BlockBackend *blk; + + di = drive_get_next(IF_SD); + blk = di ? blk_by_legacy_dinfo(di) : NULL; + bus = qdev_get_child_bus(DEVICE(&s->soc.usdhc[i]), "sd-bus"); + carddev = qdev_create(bus, TYPE_SD_CARD); + qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); + object_property_set_bool(OBJECT(carddev), true, + "realized", &error_fatal); + } + + if (!qtest_enabled()) { + arm_load_kernel(&s->soc.cpu[0], &boot_info); + } +} + +static void mcimx6ul_evk_machine_init(MachineClass *mc) +{ + mc->desc = "Freescale i.MX6UL Evaluation Kit (Cortex A7)"; + mc->init = mcimx6ul_evk_init; + mc->max_cpus = FSL_IMX6UL_NUM_CPUS; +} +DEFINE_MACHINE("mcimx6ul-evk", mcimx6ul_evk_machine_init) -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 11/30] hw/arm: make bitbanded IO optional on ARMv7-M 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (9 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 10/30] i.MX6UL: Add Freescale i.MX6 UltraLite 14x14 EVK Board Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 12/30] target/arm: add "cortex-m0" CPU model Peter Maydell ` (19 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Stefan Hajnoczi <stefanha@redhat.com> Some ARM CPUs have bitbanded IO, a memory region that allows convenient bit access via 32-bit memory loads/stores. This eliminates the need for read-modify-update instruction sequences. This patch makes this optional feature an ARMv7MState qdev property, allowing boards to choose whether they want bitbanding or not. Status of boards: * iotkit (Cortex M33), no bitband * mps2 (Cortex M3), bitband * msf2 (Cortex M3), bitband * stellaris (Cortex M3), bitband * stm32f205 (Cortex M3), bitband As a side-effect of this patch, Peter Maydell noted that the Ethernet controller on mps2 board is now accessible. Previously they were hidden by the bitband region (which does not exist on the real board). Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180814162739.11814-2-stefanha@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- include/hw/arm/armv7m.h | 2 ++ hw/arm/armv7m.c | 37 ++++++++++++++++++++----------------- hw/arm/mps2.c | 1 + hw/arm/msf2-soc.c | 1 + hw/arm/stellaris.c | 1 + hw/arm/stm32f205_soc.c | 1 + 6 files changed, 26 insertions(+), 17 deletions(-) diff --git a/include/hw/arm/armv7m.h b/include/hw/arm/armv7m.h index 78308d14846..2ba24953b63 100644 --- a/include/hw/arm/armv7m.h +++ b/include/hw/arm/armv7m.h @@ -43,6 +43,7 @@ typedef struct { * devices will be automatically layered on top of this view.) * + Property "idau": IDAU interface (forwarded to CPU object) * + Property "init-svtor": secure VTOR reset value (forwarded to CPU object) + * + Property "enable-bitband": expose bitbanded IO */ typedef struct ARMv7MState { /*< private >*/ @@ -63,6 +64,7 @@ typedef struct ARMv7MState { MemoryRegion *board_memory; Object *idau; uint32_t init_svtor; + bool enable_bitband; } ARMv7MState; #endif diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index 6b076660574..878613994d2 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -211,25 +211,27 @@ static void armv7m_realize(DeviceState *dev, Error **errp) memory_region_add_subregion(&s->container, 0xe000e000, sysbus_mmio_get_region(sbd, 0)); - for (i = 0; i < ARRAY_SIZE(s->bitband); i++) { - Object *obj = OBJECT(&s->bitband[i]); - SysBusDevice *sbd = SYS_BUS_DEVICE(&s->bitband[i]); + if (s->enable_bitband) { + for (i = 0; i < ARRAY_SIZE(s->bitband); i++) { + Object *obj = OBJECT(&s->bitband[i]); + SysBusDevice *sbd = SYS_BUS_DEVICE(&s->bitband[i]); - object_property_set_int(obj, bitband_input_addr[i], "base", &err); - if (err != NULL) { - error_propagate(errp, err); - return; - } - object_property_set_link(obj, OBJECT(s->board_memory), - "source-memory", &error_abort); - object_property_set_bool(obj, true, "realized", &err); - if (err != NULL) { - error_propagate(errp, err); - return; - } + object_property_set_int(obj, bitband_input_addr[i], "base", &err); + if (err != NULL) { + error_propagate(errp, err); + return; + } + object_property_set_link(obj, OBJECT(s->board_memory), + "source-memory", &error_abort); + object_property_set_bool(obj, true, "realized", &err); + if (err != NULL) { + error_propagate(errp, err); + return; + } - memory_region_add_subregion(&s->container, bitband_output_addr[i], - sysbus_mmio_get_region(sbd, 0)); + memory_region_add_subregion(&s->container, bitband_output_addr[i], + sysbus_mmio_get_region(sbd, 0)); + } } } @@ -239,6 +241,7 @@ static Property armv7m_properties[] = { MemoryRegion *), DEFINE_PROP_LINK("idau", ARMv7MState, idau, TYPE_IDAU_INTERFACE, Object *), DEFINE_PROP_UINT32("init-svtor", ARMv7MState, init_svtor, 0), + DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index c3946da3173..0a0ae867d9b 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -186,6 +186,7 @@ static void mps2_common_init(MachineState *machine) g_assert_not_reached(); } qdev_prop_set_string(armv7m, "cpu-type", machine->cpu_type); + qdev_prop_set_bit(armv7m, "enable-bitband", true); object_property_set_link(OBJECT(&mms->armv7m), OBJECT(system_memory), "memory", &error_abort); object_property_set_bool(OBJECT(&mms->armv7m), true, "realized", diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c index dbefade644d..2702e90b453 100644 --- a/hw/arm/msf2-soc.c +++ b/hw/arm/msf2-soc.c @@ -117,6 +117,7 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) armv7m = DEVICE(&s->armv7m); qdev_prop_set_uint32(armv7m, "num-irq", 81); qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type); + qdev_prop_set_bit(armv7m, "enable-bitband", true); object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()), "memory", &error_abort); object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err); diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index dc521b4a5a8..6c69ce79b20 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -1304,6 +1304,7 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board) nvic = qdev_create(NULL, TYPE_ARMV7M); qdev_prop_set_uint32(nvic, "num-irq", NUM_IRQ_LINES); qdev_prop_set_string(nvic, "cpu-type", ms->cpu_type); + qdev_prop_set_bit(nvic, "enable-bitband", true); object_property_set_link(OBJECT(nvic), OBJECT(get_system_memory()), "memory", &error_abort); /* This will exit with an error if the user passed us a bad cpu_type */ diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index c486d06a8b0..980e5af13c5 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -109,6 +109,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) armv7m = DEVICE(&s->armv7m); qdev_prop_set_uint32(armv7m, "num-irq", 96); qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type); + qdev_prop_set_bit(armv7m, "enable-bitband", true); object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()), "memory", &error_abort); object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err); -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 12/30] target/arm: add "cortex-m0" CPU model 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (10 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 11/30] hw/arm: make bitbanded IO optional on ARMv7-M Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 13/30] loader: extract rom_free() function Peter Maydell ` (18 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Stefan Hajnoczi <stefanha@redhat.com> Define a "cortex-m0" ARMv6-M CPU model. Most of the register reset values set by other CPU models are not relevant for the cut-down ARMv6-M architecture. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180814162739.11814-3-stefanha@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/cpu.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index a4d46db13ae..258ba6dcaad 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1255,6 +1255,15 @@ static void arm11mpcore_initfn(Object *obj) cpu->reset_auxcr = 1; } +static void cortex_m0_initfn(Object *obj) +{ + ARMCPU *cpu = ARM_CPU(obj); + set_feature(&cpu->env, ARM_FEATURE_V6); + set_feature(&cpu->env, ARM_FEATURE_M); + + cpu->midr = 0x410cc200; +} + static void cortex_m3_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -1845,6 +1854,8 @@ static const ARMCPUInfo arm_cpus[] = { { .name = "arm1136", .initfn = arm1136_initfn }, { .name = "arm1176", .initfn = arm1176_initfn }, { .name = "arm11mpcore", .initfn = arm11mpcore_initfn }, + { .name = "cortex-m0", .initfn = cortex_m0_initfn, + .class_init = arm_v7m_class_init }, { .name = "cortex-m3", .initfn = cortex_m3_initfn, .class_init = arm_v7m_class_init }, { .name = "cortex-m4", .initfn = cortex_m4_initfn, -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 13/30] loader: extract rom_free() function 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (11 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 12/30] target/arm: add "cortex-m0" CPU model Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 14/30] loader: add rom transaction API Peter Maydell ` (17 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Stefan Hajnoczi <stefanha@redhat.com> The next patch will need to free a rom. There is already code to do this in rom_add_file(). Note that rom_add_file() uses: rom = g_malloc0(sizeof(*rom)); ... if (rom->fw_dir) { g_free(rom->fw_dir); g_free(rom->fw_file); } The conditional is unnecessary since g_free(NULL) is a no-op. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180814162739.11814-4-stefanha@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/core/loader.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/hw/core/loader.c b/hw/core/loader.c index bbb6e65bb51..0c72e7c05af 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -847,6 +847,17 @@ struct Rom { static FWCfgState *fw_cfg; static QTAILQ_HEAD(, Rom) roms = QTAILQ_HEAD_INITIALIZER(roms); +/* rom->data must be heap-allocated (do not use with rom_add_elf_program()) */ +static void rom_free(Rom *rom) +{ + g_free(rom->data); + g_free(rom->path); + g_free(rom->name); + g_free(rom->fw_dir); + g_free(rom->fw_file); + g_free(rom); +} + static inline bool rom_order_compare(Rom *rom, Rom *item) { return ((uintptr_t)(void *)rom->as > (uintptr_t)(void *)item->as) || @@ -995,15 +1006,7 @@ err: if (fd != -1) close(fd); - g_free(rom->data); - g_free(rom->path); - g_free(rom->name); - if (fw_dir) { - g_free(rom->fw_dir); - g_free(rom->fw_file); - } - g_free(rom); - + rom_free(rom); return -1; } -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 14/30] loader: add rom transaction API 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (12 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 13/30] loader: extract rom_free() function Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 15/30] loader: Implement .hex file loader Peter Maydell ` (16 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Stefan Hajnoczi <stefanha@redhat.com> Image file loaders may add a series of roms. If an error occurs partway through loading there is no easy way to drop previously added roms. This patch adds a transaction mechanism that works like this: rom_transaction_begin(); ...call rom_add_*()... rom_transaction_end(ok); If ok is false then roms added in this transaction are dropped. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20180814162739.11814-5-stefanha@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- include/hw/loader.h | 19 +++++++++++++++++++ hw/core/loader.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+) diff --git a/include/hw/loader.h b/include/hw/loader.h index e98b84b8f96..5235f119a3a 100644 --- a/include/hw/loader.h +++ b/include/hw/loader.h @@ -225,6 +225,25 @@ int rom_check_and_register_reset(void); void rom_set_fw(FWCfgState *f); void rom_set_order_override(int order); void rom_reset_order_override(void); + +/** + * rom_transaction_begin: + * + * Call this before of a series of rom_add_*() calls. Call + * rom_transaction_end() afterwards to commit or abort. These functions are + * useful for undoing a series of rom_add_*() calls if image file loading fails + * partway through. + */ +void rom_transaction_begin(void); + +/** + * rom_transaction_end: + * @commit: true to commit added roms, false to drop added roms + * + * Call this after a series of rom_add_*() calls. See rom_transaction_begin(). + */ +void rom_transaction_end(bool commit); + int rom_copy(uint8_t *dest, hwaddr addr, size_t size); void *rom_ptr(hwaddr addr, size_t size); void hmp_info_roms(Monitor *mon, const QDict *qdict); diff --git a/hw/core/loader.c b/hw/core/loader.c index 0c72e7c05af..612420b870c 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -840,6 +840,8 @@ struct Rom { char *fw_dir; char *fw_file; + bool committed; + hwaddr addr; QTAILQ_ENTRY(Rom) next; }; @@ -877,6 +879,8 @@ static void rom_insert(Rom *rom) rom->as = &address_space_memory; } + rom->committed = false; + /* List is ordered by load address in the same address space */ QTAILQ_FOREACH(item, &roms, next) { if (rom_order_compare(rom, item)) { @@ -1168,6 +1172,34 @@ void rom_reset_order_override(void) fw_cfg_reset_order_override(fw_cfg); } +void rom_transaction_begin(void) +{ + Rom *rom; + + /* Ignore ROMs added without the transaction API */ + QTAILQ_FOREACH(rom, &roms, next) { + rom->committed = true; + } +} + +void rom_transaction_end(bool commit) +{ + Rom *rom; + Rom *tmp; + + QTAILQ_FOREACH_SAFE(rom, &roms, next, tmp) { + if (rom->committed) { + continue; + } + if (commit) { + rom->committed = true; + } else { + QTAILQ_REMOVE(&roms, rom, next); + rom_free(rom); + } + } +} + static Rom *find_rom(hwaddr addr, size_t size) { Rom *rom; -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 15/30] loader: Implement .hex file loader 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (13 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 14/30] loader: add rom transaction API Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 16/30] Add QTest testcase for the Intel Hexadecimal Peter Maydell ` (15 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Su Hang <suhang16@mails.ucas.ac.cn> This patch adds Intel Hexadecimal Object File format support to the generic loader device. The file format specification is available here: http://www.piclist.com/techref/fileext/hex/intel.htm This file format is often used with microcontrollers such as the micro:bit, Arduino, STM32, etc. Users expect to be able to run .hex files directly with without first converting them to ELF. Most micro:bit code is developed in web-based IDEs without direct user access to binutils so it is important for QEMU to handle this file format natively. Signed-off-by: Su Hang <suhang16@mails.ucas.ac.cn> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20180814162739.11814-6-stefanha@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- include/hw/loader.h | 12 ++ hw/core/generic-loader.c | 4 + hw/core/loader.c | 249 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 265 insertions(+) diff --git a/include/hw/loader.h b/include/hw/loader.h index 5235f119a3a..3c112975f48 100644 --- a/include/hw/loader.h +++ b/include/hw/loader.h @@ -28,6 +28,18 @@ ssize_t load_image_size(const char *filename, void *addr, size_t size); int load_image_targphys_as(const char *filename, hwaddr addr, uint64_t max_sz, AddressSpace *as); +/**load_targphys_hex_as: + * @filename: Path to the .hex file + * @entry: Store the entry point given by the .hex file + * @as: The AddressSpace to load the .hex file to. The value of + * address_space_memory is used if nothing is supplied here. + * + * Load a fixed .hex file into memory. + * + * Returns the size of the loaded .hex file on success, -1 otherwise. + */ +int load_targphys_hex_as(const char *filename, hwaddr *entry, AddressSpace *as); + /** load_image_targphys: * Same as load_image_targphys_as(), but doesn't allow the caller to specify * an AddressSpace. diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c index cb0e68486df..fde32cbda12 100644 --- a/hw/core/generic-loader.c +++ b/hw/core/generic-loader.c @@ -147,6 +147,10 @@ static void generic_loader_realize(DeviceState *dev, Error **errp) size = load_uimage_as(s->file, &entry, NULL, NULL, NULL, NULL, as); } + + if (size < 0) { + size = load_targphys_hex_as(s->file, &entry, as); + } } if (size < 0 || s->force_raw) { diff --git a/hw/core/loader.c b/hw/core/loader.c index 612420b870c..390987a05cf 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -1321,3 +1321,252 @@ void hmp_info_roms(Monitor *mon, const QDict *qdict) } } } + +typedef enum HexRecord HexRecord; +enum HexRecord { + DATA_RECORD = 0, + EOF_RECORD, + EXT_SEG_ADDR_RECORD, + START_SEG_ADDR_RECORD, + EXT_LINEAR_ADDR_RECORD, + START_LINEAR_ADDR_RECORD, +}; + +/* Each record contains a 16-bit address which is combined with the upper 16 + * bits of the implicit "next address" to form a 32-bit address. + */ +#define NEXT_ADDR_MASK 0xffff0000 + +#define DATA_FIELD_MAX_LEN 0xff +#define LEN_EXCEPT_DATA 0x5 +/* 0x5 = sizeof(byte_count) + sizeof(address) + sizeof(record_type) + + * sizeof(checksum) */ +typedef struct { + uint8_t byte_count; + uint16_t address; + uint8_t record_type; + uint8_t data[DATA_FIELD_MAX_LEN]; + uint8_t checksum; +} HexLine; + +/* return 0 or -1 if error */ +static bool parse_record(HexLine *line, uint8_t *our_checksum, const uint8_t c, + uint32_t *index, const bool in_process) +{ + /* +-------+---------------+-------+---------------------+--------+ + * | byte | |record | | | + * | count | address | type | data |checksum| + * +-------+---------------+-------+---------------------+--------+ + * ^ ^ ^ ^ ^ ^ + * |1 byte | 2 bytes |1 byte | 0-255 bytes | 1 byte | + */ + uint8_t value = 0; + uint32_t idx = *index; + /* ignore space */ + if (g_ascii_isspace(c)) { + return true; + } + if (!g_ascii_isxdigit(c) || !in_process) { + return false; + } + value = g_ascii_xdigit_value(c); + value = (idx & 0x1) ? (value & 0xf) : (value << 4); + if (idx < 2) { + line->byte_count |= value; + } else if (2 <= idx && idx < 6) { + line->address <<= 4; + line->address += g_ascii_xdigit_value(c); + } else if (6 <= idx && idx < 8) { + line->record_type |= value; + } else if (8 <= idx && idx < 8 + 2 * line->byte_count) { + line->data[(idx - 8) >> 1] |= value; + } else if (8 + 2 * line->byte_count <= idx && + idx < 10 + 2 * line->byte_count) { + line->checksum |= value; + } else { + return false; + } + *our_checksum += value; + ++(*index); + return true; +} + +typedef struct { + const char *filename; + HexLine line; + uint8_t *bin_buf; + hwaddr *start_addr; + int total_size; + uint32_t next_address_to_write; + uint32_t current_address; + uint32_t current_rom_index; + uint32_t rom_start_address; + AddressSpace *as; +} HexParser; + +/* return size or -1 if error */ +static int handle_record_type(HexParser *parser) +{ + HexLine *line = &(parser->line); + switch (line->record_type) { + case DATA_RECORD: + parser->current_address = + (parser->next_address_to_write & NEXT_ADDR_MASK) | line->address; + /* verify this is a contiguous block of memory */ + if (parser->current_address != parser->next_address_to_write) { + if (parser->current_rom_index != 0) { + rom_add_blob_fixed_as(parser->filename, parser->bin_buf, + parser->current_rom_index, + parser->rom_start_address, parser->as); + } + parser->rom_start_address = parser->current_address; + parser->current_rom_index = 0; + } + + /* copy from line buffer to output bin_buf */ + memcpy(parser->bin_buf + parser->current_rom_index, line->data, + line->byte_count); + parser->current_rom_index += line->byte_count; + parser->total_size += line->byte_count; + /* save next address to write */ + parser->next_address_to_write = + parser->current_address + line->byte_count; + break; + + case EOF_RECORD: + if (parser->current_rom_index != 0) { + rom_add_blob_fixed_as(parser->filename, parser->bin_buf, + parser->current_rom_index, + parser->rom_start_address, parser->as); + } + return parser->total_size; + case EXT_SEG_ADDR_RECORD: + case EXT_LINEAR_ADDR_RECORD: + if (line->byte_count != 2 && line->address != 0) { + return -1; + } + + if (parser->current_rom_index != 0) { + rom_add_blob_fixed_as(parser->filename, parser->bin_buf, + parser->current_rom_index, + parser->rom_start_address, parser->as); + } + + /* save next address to write, + * in case of non-contiguous block of memory */ + parser->next_address_to_write = (line->data[0] << 12) | + (line->data[1] << 4); + if (line->record_type == EXT_LINEAR_ADDR_RECORD) { + parser->next_address_to_write <<= 12; + } + + parser->rom_start_address = parser->next_address_to_write; + parser->current_rom_index = 0; + break; + + case START_SEG_ADDR_RECORD: + if (line->byte_count != 4 && line->address != 0) { + return -1; + } + + /* x86 16-bit CS:IP segmented addressing */ + *(parser->start_addr) = (((line->data[0] << 8) | line->data[1]) << 4) + + ((line->data[2] << 8) | line->data[3]); + break; + + case START_LINEAR_ADDR_RECORD: + if (line->byte_count != 4 && line->address != 0) { + return -1; + } + + *(parser->start_addr) = ldl_be_p(line->data); + break; + + default: + return -1; + } + + return parser->total_size; +} + +/* return size or -1 if error */ +static int parse_hex_blob(const char *filename, hwaddr *addr, uint8_t *hex_blob, + size_t hex_blob_size, AddressSpace *as) +{ + bool in_process = false; /* avoid re-enter and + * check whether record begin with ':' */ + uint8_t *end = hex_blob + hex_blob_size; + uint8_t our_checksum = 0; + uint32_t record_index = 0; + HexParser parser = { + .filename = filename, + .bin_buf = g_malloc(hex_blob_size), + .start_addr = addr, + .as = as, + }; + + rom_transaction_begin(); + + for (; hex_blob < end; ++hex_blob) { + switch (*hex_blob) { + case '\r': + case '\n': + if (!in_process) { + break; + } + + in_process = false; + if ((LEN_EXCEPT_DATA + parser.line.byte_count) * 2 != + record_index || + our_checksum != 0) { + parser.total_size = -1; + goto out; + } + + if (handle_record_type(&parser) == -1) { + parser.total_size = -1; + goto out; + } + break; + + /* start of a new record. */ + case ':': + memset(&parser.line, 0, sizeof(HexLine)); + in_process = true; + record_index = 0; + break; + + /* decoding lines */ + default: + if (!parse_record(&parser.line, &our_checksum, *hex_blob, + &record_index, in_process)) { + parser.total_size = -1; + goto out; + } + break; + } + } + +out: + g_free(parser.bin_buf); + rom_transaction_end(parser.total_size != -1); + return parser.total_size; +} + +/* return size or -1 if error */ +int load_targphys_hex_as(const char *filename, hwaddr *entry, AddressSpace *as) +{ + gsize hex_blob_size; + gchar *hex_blob; + int total_size = 0; + + if (!g_file_get_contents(filename, &hex_blob, &hex_blob_size, NULL)) { + return -1; + } + + total_size = parse_hex_blob(filename, entry, (uint8_t *)hex_blob, + hex_blob_size, as); + + g_free(hex_blob); + return total_size; +} -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 16/30] Add QTest testcase for the Intel Hexadecimal 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (14 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 15/30] loader: Implement .hex file loader Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 17/30] imx_spi: Unset XCH when TX FIFO becomes empty Peter Maydell ` (14 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Su Hang <suhang16@mails.ucas.ac.cn> 'test.hex' file is a memory test pattern stored in Hexadecimal Object Format. It loads at 0x10000 in RAM and contains values from 0 through 255. The test case verifies that the expected memory test pattern was loaded. Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Suggested-by: Steffen Gortz <qemu.ml@steffen-goertz.de> Suggested-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Su Hang <suhang16@mails.ucas.ac.cn> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [PMM: changed qtest_startf() to qtest_initf() to work with current master after the refactoring in commit 88b988c895e3c2] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- configure | 4 +++ tests/Makefile.include | 2 ++ tests/hexloader-test.c | 45 ++++++++++++++++++++++++++++ MAINTAINERS | 6 ++++ tests/hex-loader-check-data/test.hex | 18 +++++++++++ 5 files changed, 75 insertions(+) create mode 100644 tests/hexloader-test.c create mode 100644 tests/hex-loader-check-data/test.hex diff --git a/configure b/configure index 2a7796ea80b..db97930314b 100755 --- a/configure +++ b/configure @@ -7382,6 +7382,10 @@ for test_file in $(find $source_path/tests/acpi-test-data -type f) do FILES="$FILES tests/acpi-test-data$(echo $test_file | sed -e 's/.*acpi-test-data//')" done +for test_file in $(find $source_path/tests/hex-loader-check-data -type f) +do + FILES="$FILES tests/hex-loader-check-data$(echo $test_file | sed -e 's/.*hex-loader-check-data//')" +done mkdir -p $DIRS for f in $FILES ; do if [ -e "$source_path/$f" ] && [ "$pwd_is_source_path" != "y" ]; then diff --git a/tests/Makefile.include b/tests/Makefile.include index a49282704e5..760a0f18b63 100644 --- a/tests/Makefile.include +++ b/tests/Makefile.include @@ -386,6 +386,7 @@ check-qtest-arm-y += tests/test-arm-mptimer$(EXESUF) gcov-files-arm-y += hw/timer/arm_mptimer.c check-qtest-arm-y += tests/boot-serial-test$(EXESUF) check-qtest-arm-y += tests/sdhci-test$(EXESUF) +check-qtest-arm-y += tests/hexloader-test$(EXESUF) check-qtest-aarch64-y = tests/numa-test$(EXESUF) check-qtest-aarch64-y += tests/sdhci-test$(EXESUF) @@ -773,6 +774,7 @@ tests/qmp-test$(EXESUF): tests/qmp-test.o tests/device-introspect-test$(EXESUF): tests/device-introspect-test.o tests/rtc-test$(EXESUF): tests/rtc-test.o tests/m48t59-test$(EXESUF): tests/m48t59-test.o +tests/hexloader-test$(EXESUF): tests/hexloader-test.o tests/endianness-test$(EXESUF): tests/endianness-test.o tests/spapr-phb-test$(EXESUF): tests/spapr-phb-test.o $(libqos-obj-y) tests/prom-env-test$(EXESUF): tests/prom-env-test.o $(libqos-obj-y) diff --git a/tests/hexloader-test.c b/tests/hexloader-test.c new file mode 100644 index 00000000000..b653d44ba10 --- /dev/null +++ b/tests/hexloader-test.c @@ -0,0 +1,45 @@ +/* + * QTest testcase for the Intel Hexadecimal Object File Loader + * + * Authors: + * Su Hang <suhang16@mails.ucas.ac.cn> 2018 + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * + */ + +#include "qemu/osdep.h" +#include "libqtest.h" + +/* Load 'test.hex' and verify that the in-memory contents are as expected. + * 'test.hex' is a memory test pattern stored in Hexadecimal Object + * format. It loads at 0x10000 in RAM and contains values from 0 through + * 255. + */ +static void hex_loader_test(void) +{ + unsigned int i; + const unsigned int base_addr = 0x00010000; + + QTestState *s = qtest_initf( + "-M vexpress-a9 -nographic -device loader,file=tests/hex-loader-check-data/test.hex"); + + for (i = 0; i < 256; ++i) { + uint8_t val = qtest_readb(s, base_addr + i); + g_assert_cmpuint(i, ==, val); + } + qtest_quit(s); +} + +int main(int argc, char **argv) +{ + int ret; + + g_test_init(&argc, &argv, NULL); + + qtest_add_func("/tmp/hex_loader", hex_loader_test); + ret = g_test_run(); + + return ret; +} diff --git a/MAINTAINERS b/MAINTAINERS index 666e9368126..c48d9271cf1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1323,6 +1323,12 @@ F: hw/core/generic-loader.c F: include/hw/core/generic-loader.h F: docs/generic-loader.txt +Intel Hexadecimal Object File Loader +M: Su Hang <suhang16@mails.ucas.ac.cn> +S: Maintained +F: tests/hexloader-test.c +F: tests/hex-loader-check-data/test.hex + CHRP NVRAM M: Thomas Huth <thuth@redhat.com> S: Maintained diff --git a/tests/hex-loader-check-data/test.hex b/tests/hex-loader-check-data/test.hex new file mode 100644 index 00000000000..008a90bd4d6 --- /dev/null +++ b/tests/hex-loader-check-data/test.hex @@ -0,0 +1,18 @@ +:020000040001F9 +:10000000000102030405060708090a0b0c0d0e0f78 +:10001000101112131415161718191a1b1c1d1e1f68 +:10002000202122232425262728292a2b2c2d2e2f58 +:10003000303132333435363738393a3b3c3d3e3f48 +:10004000404142434445464748494a4b4c4d4e4f38 +:10005000505152535455565758595a5b5c5d5e5f28 +:10006000606162636465666768696a6b6c6d6e6f18 +:10007000707172737475767778797a7b7c7d7e7f08 +:10008000808182838485868788898a8b8c8d8e8ff8 +:10009000909192939495969798999a9b9c9d9e9fe8 +:1000a000a0a1a2a3a4a5a6a7a8a9aaabacadaeafd8 +:1000b000b0b1b2b3b4b5b6b7b8b9babbbcbdbebfc8 +:1000c000c0c1c2c3c4c5c6c7c8c9cacbcccdcecfb8 +:1000d000d0d1d2d3d4d5d6d7d8d9dadbdcdddedfa8 +:1000e000e0e1e2e3e4e5e6e7e8e9eaebecedeeef98 +:1000f000f0f1f2f3f4f5f6f7f8f9fafbfcfdfeff88 +:00000001FF -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 17/30] imx_spi: Unset XCH when TX FIFO becomes empty 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (15 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 16/30] Add QTest testcase for the Intel Hexadecimal Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 18/30] aspeed_sdmc: Extend number of valid registers Peter Maydell ` (13 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Trent Piepho <tpiepho@impinj.com> The current emulation will clear the XCH bit when a burst finishes. This is not quite correct. According to the i.MX7d referemce manual, Rev 0.1, §10.1.7.3: This bit [XCH] is cleared automatically when all data in the TXFIFO and the shift register has been shifted out. So XCH should be cleared when the FIFO empties, not on completion of a burst. The FIFO is 64 x 32 bits = 2048 bits, while the max burst size is larger at 4096 bits. So it's possible that the burst is not finished after the TXFIFO empties. Sending a large block (> 2048 bits) with the Linux driver will use a burst that is larger than the TXFIFO. After the TXFIFO has emptied XCH does not become unset, as the burst is not yet finished. What should happen after the TXFIFO empties is the driver will refill it and set XCH. The rising edge of XCH will trigger another transfer to begin. However, since the emulation does not set XCH to 0, there is no rising edge and the next trasfer never begins. Signed-off-by: Trent Piepho <tpiepho@impinj.com> Message-id: 20180731201056.29257-1-tpiepho@impinj.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/ssi/imx_spi.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c index b66505ca495..02c38c9e479 100644 --- a/hw/ssi/imx_spi.c +++ b/hw/ssi/imx_spi.c @@ -208,8 +208,6 @@ static void imx_spi_flush_txfifo(IMXSPIState *s) } if (s->burst_length <= 0) { - s->regs[ECSPI_CONREG] &= ~ECSPI_CONREG_XCH; - if (!imx_spi_is_multiple_master_burst(s)) { s->regs[ECSPI_STATREG] |= ECSPI_STATREG_TC; break; @@ -219,6 +217,7 @@ static void imx_spi_flush_txfifo(IMXSPIState *s) if (fifo32_is_empty(&s->tx_fifo)) { s->regs[ECSPI_STATREG] |= ECSPI_STATREG_TC; + s->regs[ECSPI_CONREG] &= ~ECSPI_CONREG_XCH; } /* TODO: We should also use TDR and RDR bits */ -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 18/30] aspeed_sdmc: Extend number of valid registers 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (16 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 17/30] imx_spi: Unset XCH when TX FIFO becomes empty Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 19/30] aspeed_sdmc: Fix saved values Peter Maydell ` (12 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Joel Stanley <joel@jms.id.au> The SDMC on the ast2500 has 170 registers. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 20180807075757.7242-2-joel@jms.id.au Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- include/hw/misc/aspeed_sdmc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/misc/aspeed_sdmc.h b/include/hw/misc/aspeed_sdmc.h index 551c8afdf4b..682f0f5d56d 100644 --- a/include/hw/misc/aspeed_sdmc.h +++ b/include/hw/misc/aspeed_sdmc.h @@ -14,7 +14,7 @@ #define TYPE_ASPEED_SDMC "aspeed.sdmc" #define ASPEED_SDMC(obj) OBJECT_CHECK(AspeedSDMCState, (obj), TYPE_ASPEED_SDMC) -#define ASPEED_SDMC_NR_REGS (0x8 >> 2) +#define ASPEED_SDMC_NR_REGS (0x174 >> 2) typedef struct AspeedSDMCState { /*< private >*/ -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 19/30] aspeed_sdmc: Fix saved values 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (17 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 18/30] aspeed_sdmc: Extend number of valid registers Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 20/30] aspeed_sdmc: Set 'cache initial sequence' always true Peter Maydell ` (11 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Joel Stanley <joel@jms.id.au> This fixes the intended protection of read-only values in the configuration register. They were being always set to zero by mistake. The read-only fields depend on the configured memory size of the system, so they cannot be fixed at compile time. The most straight forward option was to store them in the state structure. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 20180807075757.7242-3-joel@jms.id.au Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- include/hw/misc/aspeed_sdmc.h | 1 + hw/misc/aspeed_sdmc.c | 27 ++++++++------------------- 2 files changed, 9 insertions(+), 19 deletions(-) diff --git a/include/hw/misc/aspeed_sdmc.h b/include/hw/misc/aspeed_sdmc.h index 682f0f5d56d..e079c66a7d7 100644 --- a/include/hw/misc/aspeed_sdmc.h +++ b/include/hw/misc/aspeed_sdmc.h @@ -27,6 +27,7 @@ typedef struct AspeedSDMCState { uint32_t silicon_rev; uint32_t ram_bits; uint64_t ram_size; + uint32_t fixed_conf; } AspeedSDMCState; diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index 0df008e52a1..24fd4aee2d8 100644 --- a/hw/misc/aspeed_sdmc.c +++ b/hw/misc/aspeed_sdmc.c @@ -126,10 +126,12 @@ static void aspeed_sdmc_write(void *opaque, hwaddr addr, uint64_t data, case AST2400_A0_SILICON_REV: case AST2400_A1_SILICON_REV: data &= ~ASPEED_SDMC_READONLY_MASK; + data |= s->fixed_conf; break; case AST2500_A0_SILICON_REV: case AST2500_A1_SILICON_REV: data &= ~ASPEED_SDMC_AST2500_READONLY_MASK; + data |= s->fixed_conf; break; default: g_assert_not_reached(); @@ -198,25 +200,7 @@ static void aspeed_sdmc_reset(DeviceState *dev) memset(s->regs, 0, sizeof(s->regs)); /* Set ram size bit and defaults values */ - switch (s->silicon_rev) { - case AST2400_A0_SILICON_REV: - case AST2400_A1_SILICON_REV: - s->regs[R_CONF] |= - ASPEED_SDMC_VGA_COMPAT | - ASPEED_SDMC_DRAM_SIZE(s->ram_bits); - break; - - case AST2500_A0_SILICON_REV: - case AST2500_A1_SILICON_REV: - s->regs[R_CONF] |= - ASPEED_SDMC_HW_VERSION(1) | - ASPEED_SDMC_VGA_APERTURE(ASPEED_SDMC_VGA_64MB) | - ASPEED_SDMC_DRAM_SIZE(s->ram_bits); - break; - - default: - g_assert_not_reached(); - } + s->regs[R_CONF] = s->fixed_conf; } static void aspeed_sdmc_realize(DeviceState *dev, Error **errp) @@ -234,10 +218,15 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error **errp) case AST2400_A0_SILICON_REV: case AST2400_A1_SILICON_REV: s->ram_bits = ast2400_rambits(s); + s->fixed_conf = ASPEED_SDMC_VGA_COMPAT | + ASPEED_SDMC_DRAM_SIZE(s->ram_bits); break; case AST2500_A0_SILICON_REV: case AST2500_A1_SILICON_REV: s->ram_bits = ast2500_rambits(s); + s->fixed_conf = ASPEED_SDMC_HW_VERSION(1) | + ASPEED_SDMC_VGA_APERTURE(ASPEED_SDMC_VGA_64MB) | + ASPEED_SDMC_DRAM_SIZE(s->ram_bits); break; default: g_assert_not_reached(); -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 20/30] aspeed_sdmc: Set 'cache initial sequence' always true 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (18 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 19/30] aspeed_sdmc: Fix saved values Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 21/30] aspeed_sdmc: Init status always idle Peter Maydell ` (10 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Joel Stanley <joel@jms.id.au> The SDRAM training routine sets the 'Enable cache initial' bit, and then waits for the 'cache initial sequence' to be done. Have it always return done, as there is no other side effects that the model needs to implement. This allows the upstream u-boot training to proceed on the ast2500-evb board. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 20180807075757.7242-4-joel@jms.id.au Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/misc/aspeed_sdmc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index 24fd4aee2d8..9ece545c4ff 100644 --- a/hw/misc/aspeed_sdmc.c +++ b/hw/misc/aspeed_sdmc.c @@ -226,6 +226,7 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error **errp) s->ram_bits = ast2500_rambits(s); s->fixed_conf = ASPEED_SDMC_HW_VERSION(1) | ASPEED_SDMC_VGA_APERTURE(ASPEED_SDMC_VGA_64MB) | + ASPEED_SDMC_CACHE_INITIAL_DONE | ASPEED_SDMC_DRAM_SIZE(s->ram_bits); break; default: -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 21/30] aspeed_sdmc: Init status always idle 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (19 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 20/30] aspeed_sdmc: Set 'cache initial sequence' always true Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 22/30] aspeed_sdmc: Handle ECC training Peter Maydell ` (9 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Joel Stanley <joel@jms.id.au> The ast2500 SDRAM training routine busy waits on the 'init cycle busy state' bit in DDR PHY Control/Status register #1 (MCR60). This ensures the bit always reads zero, and allows training to complete with upstream u-boot on the ast2500-evb. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 20180807075757.7242-5-joel@jms.id.au Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/misc/aspeed_sdmc.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index 9ece545c4ff..522e01ef8c0 100644 --- a/hw/misc/aspeed_sdmc.c +++ b/hw/misc/aspeed_sdmc.c @@ -23,6 +23,10 @@ /* Configuration Register */ #define R_CONF (0x04 / 4) +/* Control/Status Register #1 (ast2500) */ +#define R_STATUS1 (0x60 / 4) +#define PHY_BUSY_STATE BIT(0) + /* * Configuration register Ox4 (for Aspeed AST2400 SOC) * @@ -137,6 +141,17 @@ static void aspeed_sdmc_write(void *opaque, hwaddr addr, uint64_t data, g_assert_not_reached(); } } + if (s->silicon_rev == AST2500_A0_SILICON_REV || + s->silicon_rev == AST2500_A1_SILICON_REV) { + switch (addr) { + case R_STATUS1: + /* Will never return 'busy' */ + data &= ~PHY_BUSY_STATE; + break; + default: + break; + } + } s->regs[addr] = data; } -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 22/30] aspeed_sdmc: Handle ECC training 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (20 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 21/30] aspeed_sdmc: Init status always idle Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 23/30] aspeed: add a max_ram_size property to the memory controller Peter Maydell ` (8 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Joel Stanley <joel@jms.id.au> This is required to ensure u-boot SDRAM training completes. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 20180807075757.7242-6-joel@jms.id.au Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/misc/aspeed_sdmc.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index 522e01ef8c0..89de3138aff 100644 --- a/hw/misc/aspeed_sdmc.c +++ b/hw/misc/aspeed_sdmc.c @@ -27,6 +27,10 @@ #define R_STATUS1 (0x60 / 4) #define PHY_BUSY_STATE BIT(0) +#define R_ECC_TEST_CTRL (0x70 / 4) +#define ECC_TEST_FINISHED BIT(12) +#define ECC_TEST_FAIL BIT(13) + /* * Configuration register Ox4 (for Aspeed AST2400 SOC) * @@ -148,6 +152,11 @@ static void aspeed_sdmc_write(void *opaque, hwaddr addr, uint64_t data, /* Will never return 'busy' */ data &= ~PHY_BUSY_STATE; break; + case R_ECC_TEST_CTRL: + /* Always done, always happy */ + data |= ECC_TEST_FINISHED; + data &= ~ECC_TEST_FAIL; + break; default: break; } -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 23/30] aspeed: add a max_ram_size property to the memory controller 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (21 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 22/30] aspeed_sdmc: Handle ECC training Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 24/30] target/arm: Adjust FPCR_MASK for FZ16 Peter Maydell ` (7 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Cédric Le Goater <clg@kaod.org> This will be used to construct a memory region beyond the RAM region to let firmwares scan the address space with load/store to guess how much RAM the SoC has. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 20180807075757.7242-7-joel@jms.id.au Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- include/hw/misc/aspeed_sdmc.h | 1 + hw/arm/aspeed.c | 31 +++++++++++++++++++++++++++++++ hw/arm/aspeed_soc.c | 2 ++ hw/misc/aspeed_sdmc.c | 3 +++ 4 files changed, 37 insertions(+) diff --git a/include/hw/misc/aspeed_sdmc.h b/include/hw/misc/aspeed_sdmc.h index e079c66a7d7..b3c926acae9 100644 --- a/include/hw/misc/aspeed_sdmc.h +++ b/include/hw/misc/aspeed_sdmc.h @@ -27,6 +27,7 @@ typedef struct AspeedSDMCState { uint32_t silicon_rev; uint32_t ram_bits; uint64_t ram_size; + uint64_t max_ram_size; uint32_t fixed_conf; } AspeedSDMCState; diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index bb9d33848d3..bb9590f1aed 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -31,6 +31,7 @@ static struct arm_boot_info aspeed_board_binfo = { typedef struct AspeedBoardState { AspeedSoCState soc; MemoryRegion ram; + MemoryRegion max_ram; } AspeedBoardState; typedef struct AspeedBoardConfig { @@ -127,6 +128,27 @@ static const AspeedBoardConfig aspeed_boards[] = { }, }; +/* + * The max ram region is for firmwares that scan the address space + * with load/store to guess how much RAM the SoC has. + */ +static uint64_t max_ram_read(void *opaque, hwaddr offset, unsigned size) +{ + return 0; +} + +static void max_ram_write(void *opaque, hwaddr offset, uint64_t value, + unsigned size) +{ + /* Discard writes */ +} + +static const MemoryRegionOps max_ram_ops = { + .read = max_ram_read, + .write = max_ram_write, + .endianness = DEVICE_NATIVE_ENDIAN, +}; + #define FIRMWARE_ADDR 0x0 static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size, @@ -187,6 +209,7 @@ static void aspeed_board_init(MachineState *machine, AspeedBoardState *bmc; AspeedSoCClass *sc; DriveInfo *drive0 = drive_get(IF_MTD, 0, 0); + ram_addr_t max_ram_size; bmc = g_new0(AspeedBoardState, 1); object_initialize(&bmc->soc, (sizeof(bmc->soc)), cfg->soc_name); @@ -226,6 +249,14 @@ static void aspeed_board_init(MachineState *machine, object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram), &error_abort); + max_ram_size = object_property_get_uint(OBJECT(&bmc->soc), "max-ram-size", + &error_abort); + memory_region_init_io(&bmc->max_ram, NULL, &max_ram_ops, NULL, + "max_ram", max_ram_size - ram_size); + memory_region_add_subregion(get_system_memory(), + sc->info->sdram_base + ram_size, + &bmc->max_ram); + aspeed_board_init_flashes(&bmc->soc.fmc, cfg->fmc_model, &error_abort); aspeed_board_init_flashes(&bmc->soc.spi[0], cfg->spi_model, &error_abort); diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index e68911af0f9..a27233d4876 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -155,6 +155,8 @@ static void aspeed_soc_init(Object *obj) sc->info->silicon_rev); object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc), "ram-size", &error_abort); + object_property_add_alias(obj, "max-ram-size", OBJECT(&s->sdmc), + "max-ram-size", &error_abort); for (i = 0; i < sc->info->wdts_num; i++) { object_initialize(&s->wdt[i], sizeof(s->wdt[i]), TYPE_ASPEED_WDT); diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index 89de3138aff..eec77f24350 100644 --- a/hw/misc/aspeed_sdmc.c +++ b/hw/misc/aspeed_sdmc.c @@ -242,12 +242,14 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error **errp) case AST2400_A0_SILICON_REV: case AST2400_A1_SILICON_REV: s->ram_bits = ast2400_rambits(s); + s->max_ram_size = 512 << 20; s->fixed_conf = ASPEED_SDMC_VGA_COMPAT | ASPEED_SDMC_DRAM_SIZE(s->ram_bits); break; case AST2500_A0_SILICON_REV: case AST2500_A1_SILICON_REV: s->ram_bits = ast2500_rambits(s); + s->max_ram_size = 1024 << 20; s->fixed_conf = ASPEED_SDMC_HW_VERSION(1) | ASPEED_SDMC_VGA_APERTURE(ASPEED_SDMC_VGA_64MB) | ASPEED_SDMC_CACHE_INITIAL_DONE | @@ -275,6 +277,7 @@ static const VMStateDescription vmstate_aspeed_sdmc = { static Property aspeed_sdmc_properties[] = { DEFINE_PROP_UINT32("silicon-rev", AspeedSDMCState, silicon_rev, 0), DEFINE_PROP_UINT64("ram-size", AspeedSDMCState, ram_size, 0), + DEFINE_PROP_UINT64("max-ram-size", AspeedSDMCState, max_ram_size, 0), DEFINE_PROP_END_OF_LIST(), }; -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 24/30] target/arm: Adjust FPCR_MASK for FZ16 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (22 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 23/30] aspeed: add a max_ram_size property to the memory controller Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 25/30] target/arm: Ignore float_flag_input_denormal from fp_status_f16 Peter Maydell ` (6 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Richard Henderson <richard.henderson@linaro.org> When support for FZ16 was added, we failed to include the bit within FPCR_MASK, which means that it could never be set. Continue to zero FZ16 when ARMv8.2-FP16 is not enabled. Fixes: d81ce0ef2c4 Cc: qemu-stable@nongnu.org (3.0.1) Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Message-id: 20180810193129.1556-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/cpu.h | 2 +- target/arm/helper.c | 5 +++++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a81f3d83cd2..62c36b41507 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1269,7 +1269,7 @@ void vfp_set_fpscr(CPUARMState *env, uint32_t val); * we store the underlying state in fpscr and just mask on read/write. */ #define FPSR_MASK 0xf800009f -#define FPCR_MASK 0x07f79f00 +#define FPCR_MASK 0x07ff9f00 #define FPCR_FZ16 (1 << 19) /* ARMv8.2+, FP16 flush-to-zero */ #define FPCR_FZ (1 << 24) /* Flush-to-zero enable bit */ diff --git a/target/arm/helper.c b/target/arm/helper.c index 873a0c215db..0fc6d2e2139 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11349,6 +11349,11 @@ void HELPER(vfp_set_fpscr)(CPUARMState *env, uint32_t val) int i; uint32_t changed; + /* When ARMv8.2-FP16 is not supported, FZ16 is RES0. */ + if (!arm_feature(env, ARM_FEATURE_V8_FP16)) { + val &= ~FPCR_FZ16; + } + changed = env->vfp.xregs[ARM_VFP_FPSCR]; env->vfp.xregs[ARM_VFP_FPSCR] = (val & 0xffc8ffff); env->vfp.vec_len = (val >> 16) & 7; -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 25/30] target/arm: Ignore float_flag_input_denormal from fp_status_f16 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (23 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 24/30] target/arm: Adjust FPCR_MASK for FZ16 Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 26/30] target/arm: Use fp_status_fp16 for do_fmpa_zpzzz_h Peter Maydell ` (5 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Richard Henderson <richard.henderson@linaro.org> When FZ is set, input_denormal exceptions are recognized, but this does not happen with FZ16. The softfloat code has no way to distinguish these bits and will raise such exceptions into fp_status_f16.flags, so ignore them when computing the accumulated flags. Cc: qemu-stable@nongnu.org (3.0.1) Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Message-id: 20180810193129.1556-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/helper.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 0fc6d2e2139..a3124082a63 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11312,9 +11312,13 @@ uint32_t HELPER(vfp_get_fpscr)(CPUARMState *env) fpscr = (env->vfp.xregs[ARM_VFP_FPSCR] & 0xffc8ffff) | (env->vfp.vec_len << 16) | (env->vfp.vec_stride << 20); + i = get_float_exception_flags(&env->vfp.fp_status); i |= get_float_exception_flags(&env->vfp.standard_fp_status); - i |= get_float_exception_flags(&env->vfp.fp_status_f16); + /* FZ16 does not generate an input denormal exception. */ + i |= (get_float_exception_flags(&env->vfp.fp_status_f16) + & ~float_flag_input_denormal); + fpscr |= vfp_exceptbits_from_host(i); return fpscr; } -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 26/30] target/arm: Use fp_status_fp16 for do_fmpa_zpzzz_h 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (24 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 25/30] target/arm: Ignore float_flag_input_denormal from fp_status_f16 Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 27/30] target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-half Peter Maydell ` (4 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Richard Henderson <richard.henderson@linaro.org> This makes float16_muladd correctly use FZ16 not FZ. Fixes: 6ceabaad110 Cc: qemu-stable@nongnu.org (3.0.1) Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Message-id: 20180810193129.1556-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/sve_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index e03f954a264..0f980972535 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -3358,7 +3358,7 @@ static void do_fmla_zpzzz_h(CPUARMState *env, void *vg, uint32_t desc, e1 = *(uint16_t *)(vn + H1_2(i)) ^ neg1; e2 = *(uint16_t *)(vm + H1_2(i)); e3 = *(uint16_t *)(va + H1_2(i)) ^ neg3; - r = float16_muladd(e1, e2, e3, 0, &env->vfp.fp_status); + r = float16_muladd(e1, e2, e3, 0, &env->vfp.fp_status_f16); *(uint16_t *)(vd + H1_2(i)) = r; } } while (i & 63); -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 27/30] target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-half 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (25 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 26/30] target/arm: Use fp_status_fp16 for do_fmpa_zpzzz_h Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 28/30] target/arm: Fix aa64 FCADD and FCMLA decode Peter Maydell ` (3 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Richard Henderson <richard.henderson@linaro.org> We were using the wrong flush-to-zero bit for the non-half input. Fixes: 46d33d1e3c9 Cc: qemu-stable@nongnu.org (3.0.1) Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Message-id: 20180810193129.1556-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/translate-sve.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index d27bc8c946b..667879564f8 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -4093,7 +4093,7 @@ static bool do_zpz_ptr(DisasContext *s, int rd, int rn, int pg, static bool trans_FCVT_sh(DisasContext *s, arg_rpr_esz *a, uint32_t insn) { - return do_zpz_ptr(s, a->rd, a->rn, a->pg, true, gen_helper_sve_fcvt_sh); + return do_zpz_ptr(s, a->rd, a->rn, a->pg, false, gen_helper_sve_fcvt_sh); } static bool trans_FCVT_hs(DisasContext *s, arg_rpr_esz *a, uint32_t insn) @@ -4103,7 +4103,7 @@ static bool trans_FCVT_hs(DisasContext *s, arg_rpr_esz *a, uint32_t insn) static bool trans_FCVT_dh(DisasContext *s, arg_rpr_esz *a, uint32_t insn) { - return do_zpz_ptr(s, a->rd, a->rn, a->pg, true, gen_helper_sve_fcvt_dh); + return do_zpz_ptr(s, a->rd, a->rn, a->pg, false, gen_helper_sve_fcvt_dh); } static bool trans_FCVT_hd(DisasContext *s, arg_rpr_esz *a, uint32_t insn) -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 28/30] target/arm: Fix aa64 FCADD and FCMLA decode 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (26 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 27/30] target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-half Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 29/30] softfloat: Fix missing inexact for floating-point add Peter Maydell ` (2 subsequent siblings) 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Richard Henderson <richard.henderson@linaro.org> These insns require u=1; failed to include that in the switch cases. This probably happened during one of the rebases just before final commit. Fixes: d17b7cdcf4e Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Message-id: 20180810193129.1556-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/translate-a64.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index b29dc49c4f8..8ca3876707c 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -11423,12 +11423,12 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn) } feature = ARM_FEATURE_V8_DOTPROD; break; - case 0x8: /* FCMLA, #0 */ - case 0x9: /* FCMLA, #90 */ - case 0xa: /* FCMLA, #180 */ - case 0xb: /* FCMLA, #270 */ - case 0xc: /* FCADD, #90 */ - case 0xe: /* FCADD, #270 */ + case 0x18: /* FCMLA, #0 */ + case 0x19: /* FCMLA, #90 */ + case 0x1a: /* FCMLA, #180 */ + case 0x1b: /* FCMLA, #270 */ + case 0x1c: /* FCADD, #90 */ + case 0x1e: /* FCADD, #270 */ if (size == 0 || (size == 1 && !arm_dc_feature(s, ARM_FEATURE_V8_FP16)) || (size == 3 && !is_q)) { -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 29/30] softfloat: Fix missing inexact for floating-point add 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (27 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 28/30] target/arm: Fix aa64 FCADD and FCMLA decode Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 30/30] hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj() Peter Maydell 2018-08-16 16:18 ` [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Richard Henderson <richard.henderson@linaro.org> For 0x1.0000000000003p+0 + 0x1.ffffffep+14 = 0x1.0001fffp+15 we dropped the sticky bit and so failed to raise inexact. Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Message-id: 20180810193129.1556-7-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- fpu/softfloat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 8cd24000814..7d63cffdeb8 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -701,7 +701,7 @@ static FloatParts addsub_floats(FloatParts a, FloatParts b, bool subtract, } a.frac += b.frac; if (a.frac & DECOMPOSED_OVERFLOW_BIT) { - a.frac >>= 1; + shift64RightJamming(a.frac, 1, &a.frac); a.exp += 1; } return a; -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 30/30] hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj() 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (28 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 29/30] softfloat: Fix missing inexact for floating-point add Peter Maydell @ 2018-08-16 13:34 ` Peter Maydell 2018-08-16 16:18 ` [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw) To: qemu-devel From: Thomas Huth <thuth@redhat.com> Now that we've got the common sysbus_init_child_obj() function, we do not need the local init_sysbus_child() anymore. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-id: 1534420566-15799-1-git-send-email-thuth@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/arm/mps2-tz.c | 32 +++++++++++--------------------- 1 file changed, 11 insertions(+), 21 deletions(-) diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 22180c56fb7..dc0f34abe53 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -107,16 +107,6 @@ static void make_ram_alias(MemoryRegion *mr, const char *name, memory_region_add_subregion(get_system_memory(), base, mr); } -static void init_sysbus_child(Object *parent, const char *childname, - void *child, size_t childsize, - const char *childtype) -{ - object_initialize(child, childsize, childtype); - object_property_add_child(parent, childname, OBJECT(child), &error_abort); - qdev_set_parent_bus(DEVICE(child), sysbus_get_default()); - -} - /* Most of the devices in the AN505 FPGA image sit behind * Peripheral Protection Controllers. These data structures * define the layout of which devices sit behind which PPCs. @@ -149,9 +139,9 @@ static MemoryRegion *make_unimp_dev(MPS2TZMachineState *mms, */ UnimplementedDeviceState *uds = opaque; - init_sysbus_child(OBJECT(mms), name, uds, - sizeof(UnimplementedDeviceState), - TYPE_UNIMPLEMENTED_DEVICE); + sysbus_init_child_obj(OBJECT(mms), name, uds, + sizeof(UnimplementedDeviceState), + TYPE_UNIMPLEMENTED_DEVICE); qdev_prop_set_string(DEVICE(uds), "name", name); qdev_prop_set_uint64(DEVICE(uds), "size", size); object_property_set_bool(OBJECT(uds), true, "realized", &error_fatal); @@ -170,8 +160,8 @@ static MemoryRegion *make_uart(MPS2TZMachineState *mms, void *opaque, DeviceState *iotkitdev = DEVICE(&mms->iotkit); DeviceState *orgate_dev = DEVICE(&mms->uart_irq_orgate); - init_sysbus_child(OBJECT(mms), name, uart, - sizeof(mms->uart[0]), TYPE_CMSDK_APB_UART); + sysbus_init_child_obj(OBJECT(mms), name, uart, sizeof(mms->uart[0]), + TYPE_CMSDK_APB_UART); qdev_prop_set_chr(DEVICE(uart), "chardev", serial_hd(i)); qdev_prop_set_uint32(DEVICE(uart), "pclk-frq", SYSCLK_FRQ); object_property_set_bool(OBJECT(uart), true, "realized", &error_fatal); @@ -248,8 +238,8 @@ static MemoryRegion *make_mpc(MPS2TZMachineState *mms, void *opaque, memory_region_init_ram(ssram, NULL, name, ramsize[i], &error_fatal); - init_sysbus_child(OBJECT(mms), mpcname, mpc, - sizeof(mms->ssram_mpc[0]), TYPE_TZ_MPC); + sysbus_init_child_obj(OBJECT(mms), mpcname, mpc, sizeof(mms->ssram_mpc[0]), + TYPE_TZ_MPC); object_property_set_link(OBJECT(mpc), OBJECT(ssram), "downstream", &error_fatal); object_property_set_bool(OBJECT(mpc), true, "realized", &error_fatal); @@ -288,8 +278,8 @@ static void mps2tz_common_init(MachineState *machine) exit(1); } - init_sysbus_child(OBJECT(machine), "iotkit", &mms->iotkit, - sizeof(mms->iotkit), TYPE_IOTKIT); + sysbus_init_child_obj(OBJECT(machine), "iotkit", &mms->iotkit, + sizeof(mms->iotkit), TYPE_IOTKIT); iotkitdev = DEVICE(&mms->iotkit); object_property_set_link(OBJECT(&mms->iotkit), OBJECT(system_memory), "memory", &error_abort); @@ -421,8 +411,8 @@ static void mps2tz_common_init(MachineState *machine) int port; char *gpioname; - init_sysbus_child(OBJECT(machine), ppcinfo->name, ppc, - sizeof(TZPPC), TYPE_TZ_PPC); + sysbus_init_child_obj(OBJECT(machine), ppcinfo->name, ppc, + sizeof(TZPPC), TYPE_TZ_PPC); ppcdev = DEVICE(ppc); for (port = 0; port < TZ_NUM_PORTS; port++) { -- 2.18.0 ^ permalink raw reply related [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell ` (29 preceding siblings ...) 2018-08-16 13:34 ` [Qemu-devel] [PULL 30/30] hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj() Peter Maydell @ 2018-08-16 16:18 ` Peter Maydell 30 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-08-16 16:18 UTC (permalink / raw) To: QEMU Developers On 16 August 2018 at 14:34, Peter Maydell <peter.maydell@linaro.org> wrote: > Less than a day of post-3.0 code review and already enough > patches for another pullreq :-) > > thanks > -- PMM > > The following changes since commit c542a9f9794ec8e0bc3fcf5956d3cc8bce667789: > > Merge remote-tracking branch 'remotes/armbru/tags/pull-tests-2018-08-16' into staging (2018-08-16 09:50:54 +0100) > > are available in the Git repository at: > > https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180816 > > for you to fetch changes up to fcf13ca556f462b52956059bf8fa622bc8575edb: > > hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj() (2018-08-16 14:29:58 +0100) > > ---------------------------------------------------------------- > target-arm queue: > * Fixes for various bugs in SVE instructions > * Add model of Freescale i.MX6 UltraLite 14x14 EVK Board > * hw/arm: make bitbanded IO optional on ARMv7-M > * Add model of Cortex-M0 CPU > * Add support for loading Intel HEX files to the generic loader > * imx_spi: Unset XCH when TX FIFO becomes empty > * aspeed_sdmc: fix various bugs > * Fix bugs in Arm FP16 instruction support > * Fix aa64 FCADD and FCMLA decode > * softfloat: Fix missing inexact for floating-point add > * hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj() > Applied, thanks. -- PMM ^ permalink raw reply [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2018-02-09 11:02 Peter Maydell
2018-02-09 14:38 ` Peter Maydell
0 siblings, 1 reply; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
Another lump of target-arm patches. I still have some patches in
my to-review queue, but this is a big enough set that I wanted
to send it out.
thanks
-- PMM
The following changes since commit 04bb7fe2bf55bdf66d5b7a5a719b40bbb4048178:
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180208' into staging (2018-02-08 17:41:15 +0000)
are available in the Git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180209
for you to fetch changes up to bbba7757bacc9f890a3f028d328b4b429dbe78ec:
hw/core/generic-loader: Allow PC to be set on command line (2018-02-09 10:55:40 +0000)
----------------------------------------------------------------
target-arm queue:
* Support M profile derived exceptions on exception entry and exit
* Implement AArch64 v8.2 crypto insns (SHA-512, SHA-3, SM3, SM4)
* Implement working i.MX6 SD controller
* Various devices preparatory to i.MX7 support
* Preparatory patches for SVE emulation
* v8M: Fix bug in implementation of 'TT' insn
* Give useful error if user tries to use userspace GICv3 with KVM
----------------------------------------------------------------
Andrey Smirnov (10):
sdhci: Add i.MX specific subtype of SDHCI
hw: i.MX: Convert i.MX6 to use TYPE_IMX_USDHC
i.MX: Add code to emulate i.MX7 CCM, PMU and ANALOG IP blocks
i.MX: Add code to emulate i.MX2 watchdog IP block
i.MX: Add code to emulate i.MX7 SNVS IP-block
i.MX: Add code to emulate GPCv2 IP block
i.MX: Add i.MX7 GPT variant
i.MX: Add implementation of i.MX7 GPR IP block
usb: Add basic code to emulate Chipidea USB IP
hw/arm: Move virt's PSCI DT fixup code to arm/boot.c
Ard Biesheuvel (5):
target/arm: implement SHA-512 instructions
target/arm: implement SHA-3 instructions
target/arm: implement SM3 instructions
target/arm: implement SM4 instructions
target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support
Christoffer Dall (1):
target/arm/kvm: gic: Prevent creating userspace GICv3 with KVM
Peter Maydell (9):
target/arm: Add armv7m_nvic_set_pending_derived()
target/arm: Split "get pending exception info" from "acknowledge it"
target/arm: Add ignore_stackfaults argument to v7m_exception_taken()
target/arm: Make v7M exception entry stack push check MPU
target/arm: Make v7m_push_callee_stack() honour MPU
target/arm: Make exception vector loads honour the SAU
target/arm: Handle exceptions during exception stack pop
target/arm/translate.c: Fix missing 'break' for TT insns
hw/core/generic-loader: Allow PC to be set on command line
Richard Henderson (5):
target/arm: Expand vector registers for SVE
target/arm: Add predicate registers for SVE
target/arm: Add SVE to migration state
target/arm: Add ZCR_ELx
target/arm: Add SVE state to TB->FLAGS
hw/intc/Makefile.objs | 2 +-
hw/misc/Makefile.objs | 4 +
hw/usb/Makefile.objs | 1 +
hw/sd/sdhci-internal.h | 23 ++
include/hw/intc/imx_gpcv2.h | 22 ++
include/hw/misc/imx2_wdt.h | 33 +++
include/hw/misc/imx7_ccm.h | 139 +++++++++++
include/hw/misc/imx7_gpr.h | 28 +++
include/hw/misc/imx7_snvs.h | 35 +++
include/hw/sd/sdhci.h | 13 ++
include/hw/timer/imx_gpt.h | 1 +
include/hw/usb/chipidea.h | 16 ++
target/arm/cpu.h | 120 ++++++++--
target/arm/helper.h | 12 +
target/arm/kvm_arm.h | 4 +
target/arm/translate.h | 2 +
hw/arm/boot.c | 65 ++++++
hw/arm/fsl-imx6.c | 2 +-
hw/arm/virt.c | 61 -----
hw/core/generic-loader.c | 2 +-
hw/intc/armv7m_nvic.c | 98 +++++++-
hw/intc/imx_gpcv2.c | 125 ++++++++++
hw/misc/imx2_wdt.c | 89 +++++++
hw/misc/imx7_ccm.c | 277 ++++++++++++++++++++++
hw/misc/imx7_gpr.c | 124 ++++++++++
hw/misc/imx7_snvs.c | 83 +++++++
hw/sd/sdhci.c | 230 ++++++++++++++++++-
hw/timer/imx_gpt.c | 25 ++
hw/usb/chipidea.c | 176 ++++++++++++++
linux-user/elfload.c | 19 ++
target/arm/cpu64.c | 4 +
target/arm/crypto_helper.c | 277 +++++++++++++++++++++-
target/arm/helper.c | 548 +++++++++++++++++++++++++++++++++++++-------
target/arm/machine.c | 88 ++++++-
target/arm/translate-a64.c | 350 +++++++++++++++++++++++++++-
target/arm/translate.c | 8 +-
hw/intc/trace-events | 5 +-
hw/misc/trace-events | 4 +
38 files changed, 2928 insertions(+), 187 deletions(-)
create mode 100644 include/hw/intc/imx_gpcv2.h
create mode 100644 include/hw/misc/imx2_wdt.h
create mode 100644 include/hw/misc/imx7_ccm.h
create mode 100644 include/hw/misc/imx7_gpr.h
create mode 100644 include/hw/misc/imx7_snvs.h
create mode 100644 include/hw/usb/chipidea.h
create mode 100644 hw/intc/imx_gpcv2.c
create mode 100644 hw/misc/imx2_wdt.c
create mode 100644 hw/misc/imx7_ccm.c
create mode 100644 hw/misc/imx7_gpr.c
create mode 100644 hw/misc/imx7_snvs.c
create mode 100644 hw/usb/chipidea.c
^ permalink raw reply [flat|nested] 43+ messages in thread* Re: [Qemu-devel] [PULL 00/30] target-arm queue 2018-02-09 11:02 Peter Maydell @ 2018-02-09 14:38 ` Peter Maydell 0 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2018-02-09 14:38 UTC (permalink / raw) To: QEMU Developers On 9 February 2018 at 11:02, Peter Maydell <peter.maydell@linaro.org> wrote: > Another lump of target-arm patches. I still have some patches in > my to-review queue, but this is a big enough set that I wanted > to send it out. > > thanks > -- PMM > > The following changes since commit 04bb7fe2bf55bdf66d5b7a5a719b40bbb4048178: > > Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180208' into staging (2018-02-08 17:41:15 +0000) > > are available in the Git repository at: > > git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180209 > > for you to fetch changes up to bbba7757bacc9f890a3f028d328b4b429dbe78ec: > > hw/core/generic-loader: Allow PC to be set on command line (2018-02-09 10:55:40 +0000) > Applied, thanks. -- PMM ^ permalink raw reply [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2017-02-27 18:04 Peter Maydell
2017-02-27 19:14 ` no-reply
2017-02-28 12:07 ` Peter Maydell
0 siblings, 2 replies; 43+ messages in thread
From: Peter Maydell @ 2017-02-27 18:04 UTC (permalink / raw)
To: qemu-devel
ARM queu; includes all the NVIC rewrite patches.
The QOMify-armv7m patchset hasn't got enough review just
yet but I may be able to sneak it in before freeze
tomorrow if it gets review. Didn't want to hold this lot
up waiting, anyway.
thanks
-- PMM
The following changes since commit 8f2d7c341184a95d05476ea3c45dbae2b9ddbe51:
Merge remote-tracking branch 'remotes/berrange/tags/pull-qcrypto-2017-02-27-1' into staging (2017-02-27 15:33:21 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170227
for you to fetch changes up to 94d5bcf5a7f3799660b62098a5183f161aad0601:
hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID (2017-02-27 17:23:16 +0000)
----------------------------------------------------------------
target-arm queue:
* raspi2: implement RNG module, GPIO and new SD card controller
(sufficient to boot new raspbian kernels)
* sdhci: bugfixes for block transfers
* virt: fix cpu object reference leak
* Add missing fp_access_check() to aarch64 crypto instructions
* cputlb: Don't assume do_unassigned_access() never returns
* virt: Add a user option to disallow ITS instantiation
* i.MX timers: fix reset handling
* ARMv7M NVIC: rewrite to fix broken priority handling and masking
* exynos: Fix proper mapping of CPUs by providing real cluster ID
* exynos: Fix Linux kernel division by zero for PLLs
----------------------------------------------------------------
Clement Deschamps (4):
bcm2835_sdhost: add bcm2835 sdhost controller
hw/sd: add card-reparenting function
bcm2835_gpio: add bcm2835 gpio controller
bcm2835: add sdhost and gpio controllers
Eric Auger (1):
hw/arm/virt: Add a user option to disallow ITS instantiation
Igor Mammedov (1):
hw/arm/virt: fix cpu object reference leak
Krzysztof Kozlowski (2):
hw/arm/exynos: Fix Linux kernel division by zero for PLLs
hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID
Kurban Mallachiev (1):
ARM i.MX timers: fix reset handling
Marcin Chojnacki (1):
target-arm: Implement BCM2835 hardware RNG
Michael Davidsaver (5):
armv7m: Rewrite NVIC to not use any GIC code
arm: gic: Remove references to NVIC
armv7m: Escalate exceptions to HardFault if necessary
armv7m: Simpler and faster exception start
armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE
Nick Reilly (1):
Add missing fp_access_check() to aarch64 crypto instructions
Peter Maydell (10):
bcm2835_rng: Use qcrypto_random_bytes() rather than rand()
cputlb: Don't assume do_unassigned_access() never returns
armv7m: Rename nvic_state to NVICState
armv7m: Implement reading and writing of PRIGROUP
armv7m: Fix condition check for taking exceptions
armv7m: Remove unused armv7m_nvic_acknowledge_irq() return value
armv7m: Extract "exception taken" code into functions
armv7m: Check exception return consistency
armv7m: Raise correct kind of UsageFault for attempts to execute ARM code
armv7m: Allow SHCSR writes to change pending and active bits
Prasad J Pandit (4):
sd: sdhci: mask transfer mode register value
sd: sdhci: check transfer mode register in multi block transfer
sd: sdhci: conditionally invoke multi block transfer
sd: sdhci: Remove block count enable check in single block transfers
hw/gpio/Makefile.objs | 1 +
hw/misc/Makefile.objs | 3 +-
hw/sd/Makefile.objs | 1 +
hw/intc/gic_internal.h | 7 +-
include/hw/arm/bcm2835_peripherals.h | 6 +
include/hw/arm/virt.h | 1 +
include/hw/gpio/bcm2835_gpio.h | 39 ++
include/hw/misc/bcm2835_rng.h | 27 ++
include/hw/sd/bcm2835_sdhost.h | 48 ++
include/hw/sd/sd.h | 11 +
target/arm/cpu.h | 23 +-
cputlb.c | 15 +-
hw/arm/bcm2835_peripherals.c | 58 ++-
hw/arm/exynos4210.c | 18 +
hw/arm/virt.c | 32 +-
hw/gpio/bcm2835_gpio.c | 353 ++++++++++++++
hw/intc/arm_gic.c | 31 +-
hw/intc/arm_gic_common.c | 23 +-
hw/intc/armv7m_nvic.c | 885 ++++++++++++++++++++++++++++-------
hw/misc/bcm2835_rng.c | 149 ++++++
hw/misc/exynos4210_clk.c | 164 +++++++
hw/sd/bcm2835_sdhost.c | 429 +++++++++++++++++
hw/sd/core.c | 30 ++
hw/sd/sdhci.c | 25 +-
hw/timer/imx_gpt.c | 33 +-
linux-user/main.c | 1 +
target/arm/cpu.c | 16 +-
target/arm/helper.c | 245 +++++++---
target/arm/translate-a64.c | 12 +
target/arm/translate.c | 8 +-
hw/intc/trace-events | 15 +
31 files changed, 2376 insertions(+), 333 deletions(-)
create mode 100644 include/hw/gpio/bcm2835_gpio.h
create mode 100644 include/hw/misc/bcm2835_rng.h
create mode 100644 include/hw/sd/bcm2835_sdhost.h
create mode 100644 hw/gpio/bcm2835_gpio.c
create mode 100644 hw/misc/bcm2835_rng.c
create mode 100644 hw/misc/exynos4210_clk.c
create mode 100644 hw/sd/bcm2835_sdhost.c
^ permalink raw reply [flat|nested] 43+ messages in thread* Re: [Qemu-devel] [PULL 00/30] target-arm queue 2017-02-27 18:04 Peter Maydell @ 2017-02-27 19:14 ` no-reply 2017-02-28 12:07 ` Peter Maydell 1 sibling, 0 replies; 43+ messages in thread From: no-reply @ 2017-02-27 19:14 UTC (permalink / raw) To: peter.maydell; +Cc: famz, qemu-devel Hi, This series failed build test on s390x host. Please find the details below. Message-id: 1488218699-31035-1-git-send-email-peter.maydell@linaro.org Type: series Subject: [Qemu-devel] [PULL 00/30] target-arm queue === TEST SCRIPT BEGIN === #!/bin/bash # Testing script will be invoked under the git checkout with # HEAD pointing to a commit that has the patches applied on top of "base" # branch set -e echo "=== ENV ===" env echo "=== PACKAGES ===" rpm -qa echo "=== TEST BEGIN ===" CC=$HOME/bin/cc INSTALL=$PWD/install BUILD=/var/tmp/patchew-qemu-build echo -n "Using CC: " realpath $CC test -e $BUILD && rm -rf $BUILD mkdir -p $BUILD $INSTALL SRC=$PWD cd $BUILD $SRC/configure --cc=$CC --prefix=$INSTALL make -j4 make check -j4 make install === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu * [new tag] patchew/1488218699-31035-1-git-send-email-peter.maydell@linaro.org -> patchew/1488218699-31035-1-git-send-email-peter.maydell@linaro.org Switched to a new branch 'test' fac2e4e hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID a19dfed hw/arm/exynos: Fix Linux kernel division by zero for PLLs c49b077 bcm2835: add sdhost and gpio controllers 119282b bcm2835_gpio: add bcm2835 gpio controller d874e6e hw/sd: add card-reparenting function dcbc5d0 bcm2835_sdhost: add bcm2835 sdhost controller 1c9fe401 armv7m: Allow SHCSR writes to change pending and active bits ec123a6 armv7m: Raise correct kind of UsageFault for attempts to execute ARM code de24aef armv7m: Check exception return consistency aba0f63 armv7m: Extract "exception taken" code into functions 041a279 armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE 87177eb armv7m: Simpler and faster exception start 8b1fa57 armv7m: Remove unused armv7m_nvic_acknowledge_irq() return value 76d49a0 armv7m: Escalate exceptions to HardFault if necessary b554bb3 arm: gic: Remove references to NVIC d9368b7 armv7m: Fix condition check for taking exceptions c44de81 armv7m: Rewrite NVIC to not use any GIC code aa72c10 armv7m: Implement reading and writing of PRIGROUP 086d1be armv7m: Rename nvic_state to NVICState a5cf037 ARM i.MX timers: fix reset handling 4aaa21e hw/arm/virt: Add a user option to disallow ITS instantiation 45db604 cputlb: Don't assume do_unassigned_access() never returns 65c7e7f Add missing fp_access_check() to aarch64 crypto instructions f1d750d hw/arm/virt: fix cpu object reference leak 816a1bb sd: sdhci: Remove block count enable check in single block transfers 3ea47a5 sd: sdhci: conditionally invoke multi block transfer 6d6aac0 sd: sdhci: check transfer mode register in multi block transfer 4365104 sd: sdhci: mask transfer mode register value 3c3f31d bcm2835_rng: Use qcrypto_random_bytes() rather than rand() f58b171 target-arm: Implement BCM2835 hardware RNG === OUTPUT BEGIN === === ENV === XDG_SESSION_ID=38554 SHELL=/bin/sh USER=fam PATCHEW=/home/fam/patchew/patchew-cli -s http://patchew.org --nodebug PATH=/usr/bin:/bin PWD=/var/tmp/patchew-tester-tmp-_t3ms3un/src LANG=en_US.UTF-8 HOME=/home/fam SHLVL=2 LOGNAME=fam DBUS_SESSION_BUS_ADDRESS=unix:path=/run/user/1012/bus XDG_RUNTIME_DIR=/run/user/1012 _=/usr/bin/env === PACKAGES === gpg-pubkey-873529b8-54e386ff xz-libs-5.2.2-2.fc24.s390x libacl-2.2.52-11.fc24.s390x libxshmfence-1.2-3.fc24.s390x cdparanoia-libs-10.2-21.fc24.s390x ustr-1.0.4-21.fc24.s390x giflib-4.1.6-15.fc24.s390x libusb-0.1.5-7.fc24.s390x trousers-lib-0.3.13-6.fc24.s390x readline-devel-6.3-8.fc24.s390x python-srpm-macros-3-10.fc25.noarch ncurses-base-6.0-6.20160709.fc25.noarch gmp-6.1.1-1.fc25.s390x chkconfig-1.8-1.fc25.s390x libidn-1.33-1.fc25.s390x file-5.28-4.fc25.s390x slang-2.3.0-7.fc25.s390x avahi-libs-0.6.32-4.fc25.s390x libsemanage-2.5-8.fc25.s390x perl-Unicode-Normalize-1.25-365.fc25.s390x perl-libnet-3.10-1.fc25.noarch perl-Thread-Queue-3.11-1.fc25.noarch perl-podlators-4.09-1.fc25.noarch jasper-libs-1.900.13-1.fc25.s390x graphite2-1.3.6-1.fc25.s390x libblkid-2.28.2-1.fc25.s390x pkgconfig-0.29.1-1.fc25.s390x dbus-python-1.2.4-2.fc25.s390x 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vim-common-8.0.206-1.fc25.s390x libX11-1.6.4-4.fc25.s390x pulseaudio-libs-devel-10.0-2.fc25.s390x dnf-yum-1.1.10-5.fc25.noarch tzdata-java-2016j-2.fc25.noarch ccache-3.3.3-1.fc25.s390x gpg-pubkey-8e1431d5-53bcbac7 zlib-1.2.8-10.fc24.s390x sed-4.2.2-15.fc24.s390x p11-kit-0.23.2-2.fc24.s390x psmisc-22.21-8.fc24.s390x gpm-libs-1.20.7-9.fc24.s390x zip-3.0-16.fc24.s390x hostname-3.15-7.fc24.s390x libyubikey-1.13-2.fc24.s390x sg3_utils-libs-1.41-3.fc24.s390x polkit-pkla-compat-0.1-7.fc24.s390x passwd-0.79-8.fc24.s390x trousers-0.3.13-6.fc24.s390x grubby-8.40-3.fc24.s390x rootfiles-8.1-19.fc24.noarch python-rpm-macros-3-10.fc25.noarch info-6.1-3.fc25.s390x libuuid-2.28.2-1.fc25.s390x iptables-libs-1.6.0-2.fc25.s390x nettle-3.3-1.fc25.s390x jansson-2.9-1.fc25.s390x libksba-1.3.5-1.fc25.s390x perl-Text-ParseWords-3.30-365.fc25.noarch perl-PathTools-3.63-366.fc25.s390x perl-File-Temp-0.23.04-365.fc25.noarch fuse-libs-2.9.7-1.fc25.s390x perl-Pod-Escapes-1.07-365.fc25.noarch perl-Term-ANSIColor-4.05-2.fc25.noarch perl-URI-1.71-5.fc25.noarch libXfont-1.5.2-1.fc25.s390x crypto-policies-20160921-2.git75b9b04.fc25.noarch python-six-1.10.0-3.fc25.noarch dbus-glib-0.108-1.fc25.s390x gobject-introspection-1.50.0-1.fc25.s390x libpwquality-1.3.0-6.fc25.s390x python-gobject-base-3.22.0-1.fc25.s390x python-html5lib-0.999-9.fc25.noarch python3-dbus-1.2.4-2.fc25.s390x python3-chardet-2.3.0-1.fc25.noarch python3-urllib3-1.15.1-3.fc25.noarch python-offtrac-0.1.0-7.fc25.noarch python2-cryptography-1.5.3-3.fc25.s390x python2-requests-kerberos-0.10.0-2.fc25.noarch libserf-1.3.9-1.fc25.s390x libdatrie-0.2.9-3.fc25.s390x s390utils-base-1.36.0-1.fc25.s390x kpartx-0.4.9-83.fc25.s390x s390utils-cpuplugd-1.36.0-1.fc25.s390x rpmconf-1.0.18-2.fc25.noarch s390utils-osasnmpd-1.36.0-1.fc25.s390x python-dnf-plugins-extras-common-0.0.12-4.fc25.noarch pango-1.40.3-1.fc25.s390x fpc-srpm-macros-1.0-1.fc25.noarch kernel-core-4.8.8-300.fc25.s390x fedora-upgrade-25.2-1.fc25.noarch net-tools-2.0-0.38.20160329git.fc25.s390x libuser-0.62-4.fc25.s390x screen-4.4.0-4.fc25.s390x man-db-2.7.5-3.fc25.s390x sqlite-3.14.2-1.fc25.s390x python-systemd-doc-232-1.fc25.s390x pcre-8.40-1.fc25.s390x libdb-5.3.28-16.fc25.s390x lz4-1.7.5-1.fc25.s390x tar-1.29-3.fc25.s390x emacs-common-25.1-3.fc25.s390x perl-threads-shared-1.54-1.fc25.s390x unzip-6.0-31.fc25.s390x mesa-libglapi-13.0.3-1.fc25.s390x rpm-libs-4.13.0-6.fc25.s390x selinux-policy-3.13.1-225.6.fc25.noarch pcre-utf16-8.40-1.fc25.s390x bodhi-client-0.9.12.2-6.fc25.noarch rpmlint-1.9-5.fc25.noarch glibc-headers-2.24-4.fc25.s390x dbus-1.11.8-1.fc25.s390x kernel-core-4.9.3-200.fc25.s390x cairo-1.14.8-1.fc25.s390x ca-certificates-2017.2.11-1.0.fc25.noarch openssh-clients-7.4p1-1.fc25.s390x python2-GitPython-2.1.1-2.fc25.noarch mariadb-libs-10.1.20-1.fc25.s390x NetworkManager-glib-1.4.4-3.fc25.s390x gcc-go-6.3.1-1.fc25.s390x cracklib-dicts-2.9.6-4.fc25.s390x iproute-tc-4.6.0-6.fc25.s390x libselinux-python3-2.5-13.fc25.s390x strace-4.15-1.fc25.s390x python2-enchant-1.6.8-1.fc25.noarch boost-iostreams-1.60.0-10.fc25.s390x bluez-libs-5.43-1.fc25.s390x ghostscript-9.20-5.fc25.s390x userspace-rcu-0.9.2-2.fc25.s390x mesa-libwayland-egl-devel-13.0.3-1.fc25.s390x libXext-devel-1.3.3-4.fc24.s390x libXrandr-devel-1.5.1-1.fc25.s390x perl-XML-XPath-1.39-1.fc25.noarch python3-lxml-3.7.2-1.fc25.s390x texlive-texlive.infra-bin-svn40312-30.20160520.fc25.s390x texlive-ifxetex-svn19685.0.5-30.fc25.noarch texlive-thumbpdf-bin-svn6898.0-30.20160520.fc25.noarch texlive-babelbib-svn25245.1.31-30.fc25.noarch texlive-index-svn24099.4.1beta-30.fc25.noarch texlive-caption-svn41409-30.fc25.noarch texlive-bibtex-bin-svn40473-30.20160520.fc25.s390x texlive-mfware-bin-svn40473-30.20160520.fc25.s390x texlive-texconfig-svn40768-30.fc25.noarch texlive-footmisc-svn23330.5.5b-30.fc25.noarch texlive-psfrag-svn15878.3.04-30.fc25.noarch texlive-eurosym-svn17265.1.4_subrfix-30.fc25.noarch texlive-symbol-svn31835.0-30.fc25.noarch texlive-euenc-svn19795.0.1h-30.fc25.noarch texlive-textcase-svn15878.0-30.fc25.noarch texlive-charter-svn15878.0-30.fc25.noarch texlive-wasysym-svn15878.2.0-30.fc25.noarch texlive-mflogo-svn38628-30.fc25.noarch texlive-soul-svn15878.2.4-30.fc25.noarch texlive-marginnote-svn41382-30.fc25.noarch texlive-filecontents-svn24250.1.3-30.fc25.noarch texlive-tipa-svn29349.1.3-30.fc25.noarch texlive-xcolor-svn41044-30.fc25.noarch texlive-breakurl-svn29901.1.40-30.fc25.noarch texlive-attachfile-svn38830-30.fc25.noarch texlive-pst-coil-svn37377.1.07-30.fc25.noarch texlive-auto-pst-pdf-svn23723.0.6-30.fc25.noarch texlive-ctable-svn38672-30.fc25.noarch texlive-extsizes-svn17263.1.4a-30.fc25.noarch texlive-beamer-svn36461.3.36-30.fc25.noarch texlive-dvipdfmx-bin-svn40273-30.20160520.fc25.s390x netpbm-progs-10.76.00-2.fc25.s390x vte-profile-0.46.1-1.fc25.s390x krb5-devel-1.14.4-4.fc25.s390x dbus-devel-1.11.8-1.fc25.s390x sqlite-devel-3.14.2-1.fc25.s390x libiscsi-1.15.0-2.fc24.s390x fontconfig-devel-2.12.1-1.fc25.s390x libfdt-devel-1.4.2-1.fc25.s390x ceph-devel-compat-10.2.4-2.fc25.s390x zlib-static-1.2.8-10.fc24.s390x chrpath-0.16-3.fc24.s390x python-2.7.13-1.fc25.s390x nss-3.28.1-1.3.fc25.s390x python2-hawkey-0.6.3-6.1.fc25.s390x gdk-pixbuf2-modules-2.36.4-1.fc25.s390x perl-Git-2.9.3-2.fc25.noarch kernel-core-4.9.5-200.fc25.s390x publicsuffix-list-dafsa-20170116-1.fc25.noarch perl-SelfLoader-1.23-382.fc25.noarch perl-open-1.10-382.fc25.noarch gpgme-1.8.0-8.fc25.s390x === TEST BEGIN === Using CC: /home/fam/bin/cc Install prefix /var/tmp/patchew-tester-tmp-_t3ms3un/src/install BIOS directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/share/qemu binary directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/bin library directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/lib module directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/lib/qemu libexec directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/libexec include directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/include config directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/etc local state directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/var Manual directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/share/man ELF interp prefix /usr/gnemul/qemu-%M Source path /var/tmp/patchew-tester-tmp-_t3ms3un/src C compiler /home/fam/bin/cc Host C compiler cc C++ compiler c++ Objective-C compiler /home/fam/bin/cc ARFLAGS rv CFLAGS -O2 -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 -g QEMU_CFLAGS -I/usr/include/pixman-1 -Werror -DHAS_LIBSSH2_SFTP_FSYNC -pthread -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -D_GNU_SOURCE -m64 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-decls -Wall -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv -Wendif-labels -Wno-shift-negative-value -Wno-missing-include-dirs -Wempty-body -Wnested-externs -Wformat-security -Wformat-y2k -Winit-self -Wignored-qualifiers -Wold-style-declaration -Wold-style-definition -Wtype-limits -fstack-protector-strong -I/usr/include/p11-kit-1 -I/usr/include/libpng16 -I/usr/include/cacard -I/usr/include/nss3 -I/usr/include/nspr4 -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -I/usr/include/libusb-1.0 LDFLAGS -Wl,--warn-common -m64 -g make make install install python python -B smbd /usr/sbin/smbd module support no host CPU s390x host big endian yes target list aarch64-softmmu alpha-softmmu arm-softmmu cris-softmmu i386-softmmu lm32-softmmu m68k-softmmu microblazeel-softmmu microblaze-softmmu mips64el-softmmu mips64-softmmu mipsel-softmmu mips-softmmu moxie-softmmu nios2-softmmu or1k-softmmu ppc64-softmmu ppcemb-softmmu ppc-softmmu s390x-softmmu sh4eb-softmmu sh4-softmmu sparc64-softmmu sparc-softmmu tricore-softmmu unicore32-softmmu x86_64-softmmu xtensaeb-softmmu xtensa-softmmu aarch64-linux-user alpha-linux-user armeb-linux-user arm-linux-user cris-linux-user hppa-linux-user i386-linux-user m68k-linux-user microblazeel-linux-user microblaze-linux-user mips64el-linux-user mips64-linux-user mipsel-linux-user mips-linux-user mipsn32el-linux-user mipsn32-linux-user nios2-linux-user or1k-linux-user ppc64abi32-linux-user ppc64le-linux-user ppc64-linux-user ppc-linux-user s390x-linux-user sh4eb-linux-user sh4-linux-user sparc32plus-linux-user sparc64-linux-user sparc-linux-user tilegx-linux-user x86_64-linux-user tcg debug enabled no gprof enabled no sparse enabled no strip binaries yes profiler no static build no pixman system SDL support yes (2.0.5) GTK support yes (3.22.7) GTK GL support yes VTE support yes (0.46.1) TLS priority NORMAL GNUTLS support yes GNUTLS rnd yes libgcrypt no libgcrypt kdf no nettle yes (3.3) nettle kdf yes libtasn1 yes curses support yes virgl support yes curl support yes mingw32 support no Audio drivers oss Block whitelist (rw) Block whitelist (ro) VirtFS support yes VNC support yes VNC SASL support yes VNC JPEG support yes VNC PNG support yes xen support no brlapi support yes bluez support yes Documentation yes PIE no vde support no netmap support no Linux AIO support yes ATTR/XATTR support yes Install blobs yes KVM support yes HAX support no RDMA support no TCG interpreter no fdt support yes preadv support yes fdatasync yes madvise yes posix_madvise yes libcap-ng support yes vhost-net support yes vhost-scsi support yes vhost-vsock support yes Trace backends log spice support no rbd support yes xfsctl support no smartcard support yes libusb yes usb net redir yes OpenGL support yes OpenGL dmabufs yes libiscsi support yes libnfs support yes build guest agent yes QGA VSS support no QGA w32 disk info no QGA MSI support no seccomp support no coroutine backend ucontext coroutine pool yes debug stack usage no GlusterFS support yes Archipelago support no gcov gcov gcov enabled no TPM support yes libssh2 support yes TPM passthrough no QOM debugging yes lzo support yes snappy support yes bzip2 support yes NUMA host support no tcmalloc support no jemalloc support no avx2 optimization no replication support yes GEN aarch64-softmmu/config-devices.mak.tmp GEN arm-softmmu/config-devices.mak.tmp GEN alpha-softmmu/config-devices.mak.tmp GEN cris-softmmu/config-devices.mak.tmp GEN cris-softmmu/config-devices.mak GEN i386-softmmu/config-devices.mak.tmp GEN alpha-softmmu/config-devices.mak GEN lm32-softmmu/config-devices.mak.tmp GEN aarch64-softmmu/config-devices.mak GEN m68k-softmmu/config-devices.mak.tmp GEN arm-softmmu/config-devices.mak GEN microblazeel-softmmu/config-devices.mak.tmp GEN lm32-softmmu/config-devices.mak GEN microblaze-softmmu/config-devices.mak.tmp GEN i386-softmmu/config-devices.mak GEN m68k-softmmu/config-devices.mak GEN mips64el-softmmu/config-devices.mak.tmp GEN microblazeel-softmmu/config-devices.mak GEN microblaze-softmmu/config-devices.mak GEN mips64-softmmu/config-devices.mak.tmp GEN mips-softmmu/config-devices.mak.tmp GEN mipsel-softmmu/config-devices.mak.tmp GEN mips64el-softmmu/config-devices.mak GEN moxie-softmmu/config-devices.mak.tmp GEN mips-softmmu/config-devices.mak GEN mipsel-softmmu/config-devices.mak GEN mips64-softmmu/config-devices.mak GEN nios2-softmmu/config-devices.mak.tmp GEN or1k-softmmu/config-devices.mak.tmp GEN ppc64-softmmu/config-devices.mak.tmp GEN moxie-softmmu/config-devices.mak GEN ppcemb-softmmu/config-devices.mak.tmp GEN nios2-softmmu/config-devices.mak GEN ppc-softmmu/config-devices.mak.tmp GEN or1k-softmmu/config-devices.mak GEN s390x-softmmu/config-devices.mak.tmp GEN ppc64-softmmu/config-devices.mak GEN ppcemb-softmmu/config-devices.mak GEN sh4eb-softmmu/config-devices.mak.tmp GEN s390x-softmmu/config-devices.mak GEN sparc64-softmmu/config-devices.mak.tmp GEN sh4-softmmu/config-devices.mak.tmp GEN ppc-softmmu/config-devices.mak GEN sh4eb-softmmu/config-devices.mak GEN sparc-softmmu/config-devices.mak.tmp GEN tricore-softmmu/config-devices.mak.tmp GEN tricore-softmmu/config-devices.mak GEN unicore32-softmmu/config-devices.mak.tmp GEN sh4-softmmu/config-devices.mak GEN sparc-softmmu/config-devices.mak GEN sparc64-softmmu/config-devices.mak GEN x86_64-softmmu/config-devices.mak.tmp GEN unicore32-softmmu/config-devices.mak GEN xtensa-softmmu/config-devices.mak.tmp GEN aarch64-linux-user/config-devices.mak.tmp GEN xtensaeb-softmmu/config-devices.mak.tmp GEN aarch64-linux-user/config-devices.mak GEN xtensa-softmmu/config-devices.mak GEN alpha-linux-user/config-devices.mak.tmp GEN armeb-linux-user/config-devices.mak.tmp GEN xtensaeb-softmmu/config-devices.mak GEN arm-linux-user/config-devices.mak.tmp GEN alpha-linux-user/config-devices.mak GEN cris-linux-user/config-devices.mak.tmp GEN x86_64-softmmu/config-devices.mak GEN armeb-linux-user/config-devices.mak GEN hppa-linux-user/config-devices.mak.tmp GEN i386-linux-user/config-devices.mak.tmp GEN cris-linux-user/config-devices.mak GEN hppa-linux-user/config-devices.mak GEN arm-linux-user/config-devices.mak GEN m68k-linux-user/config-devices.mak.tmp GEN microblazeel-linux-user/config-devices.mak.tmp GEN microblaze-linux-user/config-devices.mak.tmp GEN i386-linux-user/config-devices.mak GEN mips64el-linux-user/config-devices.mak.tmp GEN m68k-linux-user/config-devices.mak GEN mips64-linux-user/config-devices.mak.tmp GEN microblaze-linux-user/config-devices.mak GEN microblazeel-linux-user/config-devices.mak GEN mips64el-linux-user/config-devices.mak GEN mipsel-linux-user/config-devices.mak.tmp GEN mips64-linux-user/config-devices.mak GEN mips-linux-user/config-devices.mak.tmp GEN mipsn32el-linux-user/config-devices.mak.tmp GEN mipsn32-linux-user/config-devices.mak.tmp GEN mipsel-linux-user/config-devices.mak GEN nios2-linux-user/config-devices.mak.tmp GEN mips-linux-user/config-devices.mak GEN mipsn32el-linux-user/config-devices.mak GEN or1k-linux-user/config-devices.mak.tmp GEN mipsn32-linux-user/config-devices.mak GEN ppc64abi32-linux-user/config-devices.mak.tmp GEN nios2-linux-user/config-devices.mak GEN ppc64le-linux-user/config-devices.mak.tmp GEN ppc64-linux-user/config-devices.mak.tmp GEN ppc64le-linux-user/config-devices.mak GEN ppc64abi32-linux-user/config-devices.mak GEN or1k-linux-user/config-devices.mak GEN ppc-linux-user/config-devices.mak.tmp GEN s390x-linux-user/config-devices.mak.tmp GEN sh4eb-linux-user/config-devices.mak.tmp GEN ppc64-linux-user/config-devices.mak GEN sh4-linux-user/config-devices.mak.tmp GEN s390x-linux-user/config-devices.mak GEN sparc32plus-linux-user/config-devices.mak.tmp GEN sh4eb-linux-user/config-devices.mak GEN ppc-linux-user/config-devices.mak GEN sparc64-linux-user/config-devices.mak.tmp GEN sparc-linux-user/config-devices.mak.tmp GEN sh4-linux-user/config-devices.mak GEN sparc32plus-linux-user/config-devices.mak GEN x86_64-linux-user/config-devices.mak.tmp GEN sparc-linux-user/config-devices.mak GEN tilegx-linux-user/config-devices.mak.tmp GEN sparc64-linux-user/config-devices.mak GEN config-host.h GEN x86_64-linux-user/config-devices.mak GEN qemu-options.def GEN tilegx-linux-user/config-devices.mak GEN qmp-commands.h GEN qapi-types.h GEN qapi-visit.h GEN qapi-event.h GEN qmp-introspect.h GEN trace/generated-tcg-tracers.h GEN trace/generated-helpers-wrappers.h GEN trace/generated-helpers.h GEN module_block.h GEN tests/test-qapi-types.h GEN tests/test-qapi-visit.h GEN tests/test-qmp-commands.h GEN tests/test-qapi-event.h GEN tests/test-qmp-introspect.h GEN trace-root.h GEN util/trace.h GEN crypto/trace.h GEN io/trace.h GEN migration/trace.h GEN block/trace.h GEN backends/trace.h GEN hw/block/trace.h GEN hw/block/dataplane/trace.h GEN hw/char/trace.h GEN hw/intc/trace.h GEN hw/net/trace.h GEN hw/virtio/trace.h GEN hw/audio/trace.h GEN hw/misc/trace.h GEN hw/usb/trace.h GEN hw/scsi/trace.h GEN hw/nvram/trace.h GEN hw/display/trace.h GEN hw/input/trace.h GEN hw/timer/trace.h GEN hw/dma/trace.h GEN hw/sparc/trace.h GEN hw/sd/trace.h GEN hw/isa/trace.h GEN hw/i386/trace.h GEN hw/mem/trace.h GEN hw/9pfs/trace.h GEN hw/i386/xen/trace.h GEN hw/ppc/trace.h GEN hw/pci/trace.h GEN hw/s390x/trace.h GEN hw/vfio/trace.h GEN hw/acpi/trace.h GEN hw/arm/trace.h GEN hw/alpha/trace.h GEN hw/xen/trace.h GEN ui/trace.h GEN audio/trace.h GEN target/arm/trace.h GEN net/trace.h GEN target/sparc/trace.h GEN target/i386/trace.h GEN target/s390x/trace.h GEN target/ppc/trace.h GEN qom/trace.h GEN linux-user/trace.h GEN qapi/trace.h GEN config-all-devices.mak CC tests/qemu-iotests/socket_scm_helper.o GEN version.texi GEN qemu-img-cmds.texi GEN qemu-options.texi GEN qemu-monitor.texi GEN qemu-monitor-info.texi GEN qemu-img.1 GEN qemu-nbd.8 GEN qemu-ga.8 GEN qemu-qapi.texi GEN qemu-ga-qapi.texi GEN fsdev/virtfs-proxy-helper.1 GEN qga/qapi-generated/qga-qapi-types.h GEN qga/qapi-generated/qga-qapi-visit.h GEN qga/qapi-generated/qga-qapi-types.c GEN qga/qapi-generated/qga-qmp-commands.h GEN qga/qapi-generated/qga-qapi-visit.c GEN qga/qapi-generated/qga-qmp-marshal.c GEN trace-root.c GEN util/trace.c GEN crypto/trace.c GEN io/trace.c GEN migration/trace.c GEN block/trace.c GEN backends/trace.c GEN hw/block/trace.c GEN hw/block/dataplane/trace.c GEN hw/char/trace.c GEN hw/intc/trace.c GEN hw/net/trace.c GEN hw/virtio/trace.c GEN hw/audio/trace.c GEN hw/misc/trace.c GEN hw/scsi/trace.c GEN hw/usb/trace.c GEN hw/nvram/trace.c GEN hw/display/trace.c GEN hw/input/trace.c GEN hw/timer/trace.c GEN hw/dma/trace.c GEN hw/sparc/trace.c GEN hw/sd/trace.c GEN hw/isa/trace.c GEN hw/mem/trace.c GEN hw/i386/trace.c GEN hw/i386/xen/trace.c GEN hw/9pfs/trace.c GEN hw/ppc/trace.c GEN hw/pci/trace.c GEN hw/s390x/trace.c GEN hw/acpi/trace.c GEN hw/vfio/trace.c GEN hw/arm/trace.c GEN hw/alpha/trace.c GEN hw/xen/trace.c GEN ui/trace.c GEN audio/trace.c GEN net/trace.c GEN target/arm/trace.c GEN target/sparc/trace.c GEN target/i386/trace.c GEN target/s390x/trace.c GEN target/ppc/trace.c GEN qom/trace.c GEN linux-user/trace.c GEN qapi/trace.c GEN qmp-introspect.c GEN qapi-types.c GEN qapi-visit.c GEN qapi-event.c CC qapi/qapi-visit-core.o CC qapi/qapi-dealloc-visitor.o CC qapi/qobject-input-visitor.o CC qapi/qobject-output-visitor.o CC qapi/qmp-registry.o CC qapi/string-input-visitor.o CC qapi/qmp-dispatch.o CC qapi/string-output-visitor.o CC qapi/opts-visitor.o CC qapi/qapi-clone-visitor.o CC qapi/qmp-event.o CC qapi/qapi-util.o CC qobject/qnull.o CC qobject/qint.o CC qobject/qstring.o CC qobject/qdict.o CC qobject/qlist.o CC qobject/qfloat.o CC qobject/qbool.o CC qobject/qjson.o CC qobject/qobject.o CC qobject/json-lexer.o CC qobject/json-streamer.o CC qobject/json-parser.o CC trace/control.o CC trace/qmp.o CC util/osdep.o CC util/cutils.o CC util/unicode.o CC util/qemu-timer-common.o CC util/bufferiszero.o CC util/lockcnt.o CC util/aiocb.o CC util/async.o CC util/thread-pool.o CC util/qemu-timer.o CC util/main-loop.o CC util/iohandler.o CC util/aio-posix.o CC util/compatfd.o CC util/event_notifier-posix.o CC util/mmap-alloc.o CC util/oslib-posix.o CC util/qemu-openpty.o CC util/qemu-thread-posix.o CC util/memfd.o CC util/envlist.o CC util/path.o CC util/host-utils.o CC util/module.o CC util/bitmap.o CC util/bitops.o CC util/hbitmap.o CC util/fifo8.o CC util/acl.o CC util/error.o CC util/qemu-error.o CC util/id.o CC util/iov.o CC util/qemu-config.o CC util/qemu-sockets.o CC util/uri.o CC util/qemu-option.o CC util/notify.o CC util/qemu-progress.o CC util/hexdump.o CC util/crc32c.o CC util/uuid.o CC util/throttle.o CC util/getauxval.o CC util/readline.o CC util/rcu.o CC util/qemu-coroutine.o CC util/qemu-coroutine-lock.o CC util/qemu-coroutine-io.o CC util/qemu-coroutine-sleep.o CC util/coroutine-ucontext.o CC util/timed-average.o CC util/buffer.o CC util/base64.o CC util/log.o CC util/qdist.o CC util/qht.o CC util/range.o CC crypto/pbkdf-stub.o CC stubs/arch-query-cpu-def.o CC stubs/arch-query-cpu-model-expansion.o CC stubs/arch-query-cpu-model-comparison.o CC stubs/arch-query-cpu-model-baseline.o CC stubs/bdrv-next-monitor-owned.o CC stubs/blk-commit-all.o CC stubs/blockdev-close-all-bdrv-states.o CC stubs/cpu-get-clock.o CC stubs/clock-warp.o CC stubs/cpu-get-icount.o CC stubs/dump.o CC stubs/error-printf.o CC stubs/fdset.o CC stubs/gdbstub.o CC stubs/get-vm-name.o CC stubs/iothread.o CC stubs/iothread-lock.o CC stubs/is-daemonized.o CC stubs/linux-aio.o CC stubs/machine-init-done.o CC stubs/migr-blocker.o CC stubs/monitor.o CC stubs/notify-event.o CC stubs/qtest.o CC stubs/replay.o CC stubs/runstate-check.o CC stubs/set-fd-handler.o CC stubs/slirp.o CC stubs/sysbus.o CC stubs/trace-control.o CC stubs/uuid.o CC stubs/vm-stop.o CC stubs/vmstate.o CC stubs/qmp_pc_dimm_device_list.o CC stubs/target-monitor-defs.o CC stubs/target-get-monitor-def.o CC stubs/pc_madt_cpu_entry.o CC contrib/ivshmem-client/ivshmem-client.o CC contrib/ivshmem-client/main.o CC contrib/ivshmem-server/ivshmem-server.o CC contrib/ivshmem-server/main.o CC qemu-nbd.o CC block.o CC qemu-io-cmds.o CC blockjob.o CC replication.o CC block/raw-format.o CC block/qcow.o CC block/vdi.o CC block/vmdk.o CC block/cloop.o CC block/bochs.o CC block/vpc.o CC block/vvfat.o CC block/dmg.o CC block/qcow2.o CC block/qcow2-refcount.o CC block/qcow2-cluster.o CC block/qcow2-snapshot.o CC block/qcow2-cache.o CC block/qed.o CC block/qed-gencb.o CC block/qed-l2-cache.o CC block/qed-table.o CC block/qed-cluster.o CC block/qed-check.o CC block/vhdx.o CC block/vhdx-endian.o CC block/vhdx-log.o CC block/quorum.o CC block/parallels.o CC block/blkdebug.o CC block/blkverify.o CC block/blkreplay.o CC block/block-backend.o CC block/qapi.o CC block/snapshot.o CC block/file-posix.o CC block/linux-aio.o CC block/null.o CC block/mirror.o CC block/commit.o CC block/io.o CC block/throttle-groups.o CC block/nbd.o CC block/nbd-client.o CC block/sheepdog.o CC block/iscsi-opts.o CC block/accounting.o CC block/dirty-bitmap.o CC block/write-threshold.o CC block/backup.o CC block/replication.o CC block/crypto.o CC nbd/server.o CC nbd/client.o CC nbd/common.o CC block/iscsi.o CC block/nfs.o CC block/curl.o CC block/rbd.o CC block/gluster.o CC block/ssh.o CC block/dmg-bz2.o CC crypto/init.o CC crypto/hash.o CC crypto/hash-nettle.o CC crypto/hmac.o CC crypto/hmac-nettle.o CC crypto/aes.o CC crypto/cipher.o CC crypto/desrfb.o CC crypto/tlscreds.o CC crypto/tlscredsanon.o CC crypto/tlscredsx509.o CC crypto/tlssession.o CC crypto/random-gnutls.o CC crypto/secret.o CC crypto/pbkdf.o CC crypto/ivgen.o CC crypto/pbkdf-nettle.o CC crypto/ivgen-essiv.o CC crypto/ivgen-plain.o CC crypto/ivgen-plain64.o CC crypto/afsplit.o CC crypto/xts.o CC crypto/block.o CC crypto/block-qcow.o CC crypto/block-luks.o CC io/channel.o CC io/channel-buffer.o CC io/channel-command.o CC io/channel-file.o CC io/channel-socket.o CC io/channel-watch.o CC io/channel-websock.o CC io/channel-tls.o CC io/channel-util.o CC io/dns-resolver.o CC io/task.o CC qom/object.o CC qom/container.o CC qom/qom-qobject.o CC qom/object_interfaces.o GEN qemu-img-cmds.h CC qemu-io.o CC fsdev/virtfs-proxy-helper.o CC fsdev/9p-marshal.o CC fsdev/9p-iov-marshal.o CC qemu-bridge-helper.o CC blockdev.o CC blockdev-nbd.o CC iothread.o CC qdev-monitor.o CC device-hotplug.o CC os-posix.o CC page_cache.o CC accel.o CC bt-host.o CC bt-vhci.o CC dma-helpers.o CC vl.o CC tpm.o CC device_tree.o GEN qmp-marshal.c CC qmp.o CC hmp.o CC cpus-common.o CC audio/audio.o CC audio/noaudio.o CC audio/mixeng.o CC audio/wavaudio.o CC audio/sdlaudio.o CC audio/ossaudio.o CC audio/wavcapture.o CC backends/rng.o CC backends/rng-egd.o CC backends/msmouse.o CC backends/rng-random.o CC backends/wctablet.o CC backends/testdev.o CC backends/baum.o CC backends/tpm.o CC backends/hostmem.o CC backends/hostmem-ram.o CC backends/hostmem-file.o CC backends/cryptodev.o CC backends/cryptodev-builtin.o CC block/stream.o CC disas/alpha.o CC disas/arm.o CXX disas/arm-a64.o CC disas/cris.o CC disas/hppa.o CC disas/i386.o CC disas/m68k.o CC disas/microblaze.o CC disas/mips.o CC disas/nios2.o CC disas/moxie.o CC disas/ppc.o CC disas/s390.o CC disas/sh4.o CC disas/sparc.o CC disas/lm32.o CXX disas/libvixl/vixl/utils.o CXX disas/libvixl/vixl/compiler-intrinsics.o CXX disas/libvixl/vixl/a64/instructions-a64.o CXX disas/libvixl/vixl/a64/decoder-a64.o CXX disas/libvixl/vixl/a64/disasm-a64.o CC fsdev/qemu-fsdev.o CC fsdev/qemu-fsdev-opts.o CC fsdev/qemu-fsdev-dummy.o CC hw/9pfs/9p-local.o CC hw/9pfs/9p.o CC hw/9pfs/9p-xattr.o CC hw/9pfs/9p-xattr-user.o CC hw/9pfs/9p-posix-acl.o CC hw/9pfs/coth.o CC hw/9pfs/cofs.o CC hw/9pfs/codir.o CC hw/9pfs/cofile.o CC hw/9pfs/coxattr.o CC hw/9pfs/9p-synth.o CC hw/9pfs/9p-handle.o CC hw/9pfs/9p-proxy.o CC hw/acpi/core.o CC hw/acpi/piix4.o CC hw/acpi/pcihp.o CC hw/acpi/ich9.o CC hw/acpi/tco.o CC hw/acpi/cpu_hotplug.o CC hw/acpi/memory_hotplug.o CC hw/acpi/cpu.o CC hw/acpi/nvdimm.o CC hw/acpi/acpi_interface.o CC hw/acpi/bios-linker-loader.o CC hw/acpi/aml-build.o CC hw/acpi/ipmi.o CC hw/acpi/acpi-stub.o CC hw/acpi/ipmi-stub.o CC hw/audio/sb16.o CC hw/audio/es1370.o CC hw/audio/ac97.o CC hw/audio/fmopl.o CC hw/audio/adlib.o CC hw/audio/gus.o CC hw/audio/gusemu_hal.o CC hw/audio/gusemu_mixer.o CC hw/audio/cs4231a.o CC hw/audio/intel-hda.o CC hw/audio/hda-codec.o CC hw/audio/pcspk.o CC hw/audio/wm8750.o CC hw/audio/pl041.o CC hw/audio/lm4549.o CC hw/audio/cs4231.o CC hw/audio/marvell_88w8618.o CC hw/audio/milkymist-ac97.o CC hw/block/block.o CC hw/block/cdrom.o CC hw/block/fdc.o CC hw/block/hd-geometry.o CC hw/block/nand.o CC hw/block/m25p80.o CC hw/block/pflash_cfi01.o CC hw/block/pflash_cfi02.o CC hw/block/ecc.o CC hw/block/onenand.o CC hw/block/nvme.o CC hw/bt/core.o CC hw/bt/l2cap.o CC hw/bt/sdp.o CC hw/bt/hci.o CC hw/bt/hid.o CC hw/bt/hci-csr.o CC hw/char/ipoctal232.o CC hw/char/escc.o CC hw/char/parallel.o CC hw/char/pl011.o CC hw/char/serial.o CC hw/char/serial-isa.o CC hw/char/serial-pci.o CC hw/char/xilinx_uartlite.o CC hw/char/virtio-console.o CC hw/char/cadence_uart.o CC hw/char/etraxfs_ser.o CC hw/char/debugcon.o CC hw/char/grlib_apbuart.o CC hw/char/imx_serial.o CC hw/char/lm32_juart.o CC hw/char/lm32_uart.o CC hw/char/milkymist-uart.o CC hw/char/sclpconsole.o CC hw/char/sclpconsole-lm.o CC hw/core/qdev.o CC hw/core/qdev-properties.o CC hw/core/bus.o CC hw/core/reset.o CC hw/core/fw-path-provider.o CC hw/core/irq.o CC hw/core/hotplug.o CC hw/core/empty_slot.o CC hw/core/stream.o CC hw/core/ptimer.o CC hw/core/sysbus.o CC hw/core/machine.o CC hw/core/loader.o CC hw/core/loader-fit.o CC hw/core/qdev-properties-system.o CC hw/core/register.o CC hw/core/or-irq.o CC hw/core/platform-bus.o CC hw/display/ads7846.o CC hw/display/cirrus_vga.o CC hw/display/g364fb.o CC hw/display/jazz_led.o CC hw/display/pl110.o CC hw/display/ssd0303.o CC hw/display/ssd0323.o CC hw/display/vga-pci.o CC hw/display/vga-isa.o CC hw/display/vga-isa-mm.o CC hw/display/vmware_vga.o CC hw/display/blizzard.o CC hw/display/exynos4210_fimd.o CC hw/display/framebuffer.o CC hw/display/milkymist-vgafb.o CC hw/display/tc6393xb.o CC hw/dma/puv3_dma.o CC hw/display/milkymist-tmu2.o CC hw/dma/rc4030.o CC hw/dma/pl080.o CC hw/dma/pl330.o CC hw/dma/i82374.o CC hw/dma/i8257.o CC hw/dma/xilinx_axidma.o CC hw/dma/xlnx-zynq-devcfg.o CC hw/dma/etraxfs_dma.o CC hw/dma/sparc32_dma.o CC hw/dma/sun4m_iommu.o CC hw/gpio/pl061.o CC hw/gpio/max7310.o CC hw/gpio/puv3_gpio.o CC hw/gpio/zaurus.o CC hw/gpio/mpc8xxx.o CC hw/gpio/gpio_key.o CC hw/i2c/core.o CC hw/i2c/smbus.o CC hw/i2c/smbus_eeprom.o CC hw/i2c/i2c-ddc.o CC hw/i2c/versatile_i2c.o CC hw/i2c/smbus_ich9.o CC hw/i2c/pm_smbus.o CC hw/i2c/bitbang_i2c.o CC hw/i2c/exynos4210_i2c.o CC hw/i2c/imx_i2c.o CC hw/i2c/aspeed_i2c.o CC hw/ide/core.o CC hw/ide/atapi.o CC hw/ide/qdev.o CC hw/ide/pci.o CC hw/ide/isa.o CC hw/ide/piix.o CC hw/ide/cmd646.o CC hw/ide/macio.o CC hw/ide/mmio.o CC hw/ide/via.o CC hw/ide/microdrive.o CC hw/ide/ahci.o CC hw/ide/ich.o CC hw/input/adb.o CC hw/input/hid.o CC hw/input/lm832x.o CC hw/input/pckbd.o CC hw/input/pl050.o CC hw/input/stellaris_input.o CC hw/input/ps2.o CC hw/input/tsc2005.o CC hw/input/vmmouse.o CC hw/input/virtio-input.o CC hw/input/virtio-input-hid.o CC hw/input/virtio-input-host.o CC hw/intc/heathrow_pic.o CC hw/intc/i8259_common.o CC hw/intc/i8259.o CC hw/intc/pl190.o CC hw/intc/puv3_intc.o CC hw/intc/xilinx_intc.o CC hw/intc/imx_avic.o CC hw/intc/etraxfs_pic.o CC hw/intc/lm32_pic.o CC hw/intc/realview_gic.o CC hw/intc/slavio_intctl.o CC hw/intc/ioapic_common.o CC hw/intc/arm_gic_common.o CC hw/intc/arm_gic.o CC hw/intc/arm_gicv2m.o CC hw/intc/arm_gicv3_common.o CC hw/intc/arm_gicv3.o CC hw/intc/arm_gicv3_redist.o CC hw/intc/arm_gicv3_dist.o CC hw/intc/arm_gicv3_its_common.o CC hw/intc/openpic.o CC hw/intc/intc.o CC hw/ipack/ipack.o CC hw/ipack/tpci200.o CC hw/ipmi/ipmi.o CC hw/ipmi/ipmi_bmc_sim.o CC hw/ipmi/ipmi_bmc_extern.o CC hw/ipmi/isa_ipmi_kcs.o CC hw/ipmi/isa_ipmi_bt.o CC hw/isa/isa-bus.o CC hw/isa/apm.o CC hw/isa/i82378.o CC hw/isa/pc87312.o CC hw/isa/piix4.o CC hw/mem/pc-dimm.o CC hw/isa/vt82c686.o CC hw/mem/nvdimm.o CC hw/misc/applesmc.o CC hw/misc/max111x.o CC hw/misc/tmp105.o CC hw/misc/debugexit.o CC hw/misc/sga.o CC hw/misc/pci-testdev.o CC hw/misc/pc-testdev.o CC hw/misc/unimp.o CC hw/misc/arm_l2x0.o CC hw/misc/arm_integrator_debug.o CC hw/misc/a9scu.o CC hw/misc/arm11scu.o CC hw/misc/puv3_pm.o CC hw/misc/macio/macio.o CC hw/misc/macio/cuda.o CC hw/misc/macio/mac_dbdma.o CC hw/net/dp8393x.o CC hw/net/ne2000.o CC hw/net/eepro100.o CC hw/net/pcnet-pci.o CC hw/net/pcnet.o CC hw/net/e1000.o CC hw/net/e1000x_common.o CC hw/net/net_tx_pkt.o CC hw/net/net_rx_pkt.o CC hw/net/e1000e.o CC hw/net/e1000e_core.o CC hw/net/rtl8139.o CC hw/net/vmxnet3.o CC hw/net/smc91c111.o CC hw/net/lan9118.o CC hw/net/ne2000-isa.o CC hw/net/opencores_eth.o CC hw/net/xgmac.o CC hw/net/mipsnet.o CC hw/net/xilinx_axienet.o CC hw/net/allwinner_emac.o CC hw/net/imx_fec.o CC hw/net/cadence_gem.o CC hw/net/stellaris_enet.o CC hw/net/lance.o CC hw/net/rocker/rocker.o CC hw/net/rocker/rocker_fp.o CC hw/net/rocker/rocker_desc.o CC hw/net/rocker/rocker_world.o CC hw/net/rocker/rocker_of_dpa.o CC hw/nvram/ds1225y.o CC hw/nvram/eeprom93xx.o CC hw/nvram/fw_cfg.o CC hw/nvram/chrp_nvram.o CC hw/nvram/mac_nvram.o CC hw/pci-bridge/pci_bridge_dev.o CC hw/pci-bridge/pcie_root_port.o CC hw/pci-bridge/gen_pcie_root_port.o CC hw/pci-bridge/pci_expander_bridge.o CC hw/pci-bridge/xio3130_upstream.o CC hw/pci-bridge/xio3130_downstream.o CC hw/pci-bridge/ioh3420.o CC hw/pci-bridge/dec.o CC hw/pci-bridge/i82801b11.o CC hw/pci-host/pam.o CC hw/pci-host/prep.o CC hw/pci-host/grackle.o CC hw/pci-host/uninorth.o CC hw/pci-host/ppce500.o CC hw/pci-host/apb.o CC hw/pci-host/versatile.o CC hw/pci-host/bonito.o CC hw/pci-host/piix.o CC hw/pci-host/q35.o CC hw/pci-host/gpex.o CC hw/pci-host/xilinx-pcie.o CC hw/pci/pci.o CC hw/pci/pci_bridge.o CC hw/pci/msix.o CC hw/pci/msi.o CC hw/pci/shpc.o CC hw/pci/slotid_cap.o CC hw/pci/pci_host.o CC hw/pci/pcie_host.o CC hw/pci/pcie.o CC hw/pci/pcie_aer.o CC hw/pci/pcie_port.o CC hw/pci/pci-stub.o CC hw/pcmcia/pcmcia.o CC hw/scsi/scsi-disk.o CC hw/scsi/scsi-generic.o CC hw/scsi/scsi-bus.o CC hw/scsi/lsi53c895a.o CC hw/scsi/mptsas.o CC hw/scsi/mptconfig.o CC hw/scsi/mptendian.o CC hw/scsi/megasas.o CC hw/scsi/vmw_pvscsi.o CC hw/scsi/esp.o CC hw/scsi/esp-pci.o CC hw/sd/pl181.o CC hw/sd/ssi-sd.o CC hw/sd/sd.o CC hw/sd/core.o CC hw/smbios/smbios.o CC hw/sd/sdhci.o CC hw/smbios/smbios_type_38.o CC hw/smbios/smbios-stub.o CC hw/smbios/smbios_type_38-stub.o CC hw/ssi/pl022.o CC hw/ssi/xilinx_spi.o CC hw/ssi/ssi.o CC hw/ssi/xilinx_spips.o CC hw/ssi/aspeed_smc.o CC hw/ssi/stm32f2xx_spi.o CC hw/timer/arm_timer.o CC hw/timer/arm_mptimer.o CC hw/timer/a9gtimer.o CC hw/timer/cadence_ttc.o CC hw/timer/ds1338.o CC hw/timer/hpet.o CC hw/timer/i8254_common.o CC hw/timer/i8254.o CC hw/timer/m48t59.o CC hw/timer/m48t59-isa.o CC hw/timer/pl031.o CC hw/timer/puv3_ost.o CC hw/timer/twl92230.o CC hw/timer/xilinx_timer.o CC hw/timer/slavio_timer.o CC hw/timer/etraxfs_timer.o CC hw/timer/grlib_gptimer.o CC hw/timer/imx_epit.o CC hw/timer/imx_gpt.o CC hw/timer/lm32_timer.o CC hw/timer/milkymist-sysctl.o CC hw/timer/stm32f2xx_timer.o CC hw/timer/aspeed_timer.o CC hw/timer/sun4v-rtc.o CC hw/tpm/tpm_tis.o CC hw/usb/core.o CC hw/usb/combined-packet.o CC hw/usb/bus.o CC hw/usb/libhw.o CC hw/usb/desc.o CC hw/usb/desc-msos.o CC hw/usb/hcd-uhci.o CC hw/usb/hcd-ohci.o CC hw/usb/hcd-ehci.o CC hw/usb/hcd-ehci-pci.o CC hw/usb/hcd-ehci-sysbus.o CC hw/usb/hcd-xhci.o CC hw/usb/hcd-musb.o CC hw/usb/dev-hub.o CC hw/usb/dev-hid.o CC hw/usb/dev-wacom.o CC hw/usb/dev-storage.o CC hw/usb/dev-uas.o CC hw/usb/dev-audio.o CC hw/usb/dev-serial.o CC hw/usb/dev-bluetooth.o CC hw/usb/dev-network.o CC hw/usb/dev-smartcard-reader.o CC hw/usb/ccid-card-passthru.o CC hw/usb/ccid-card-emulated.o CC hw/usb/dev-mtp.o CC hw/usb/redirect.o CC hw/usb/quirks.o CC hw/usb/host-libusb.o CC hw/usb/host-legacy.o CC hw/virtio/virtio-rng.o CC hw/virtio/virtio-pci.o CC hw/virtio/virtio-bus.o CC hw/virtio/virtio-mmio.o CC hw/virtio/vhost-stub.o CC hw/watchdog/watchdog.o CC hw/watchdog/wdt_i6300esb.o CC hw/watchdog/wdt_ib700.o CC hw/watchdog/wdt_diag288.o CC hw/watchdog/wdt_aspeed.o CC migration/migration.o CC migration/fd.o CC migration/socket.o CC migration/exec.o CC migration/tls.o CC migration/colo-comm.o CC migration/colo.o CC migration/colo-failover.o CC migration/vmstate.o CC migration/qemu-file.o CC migration/qemu-file-channel.o CC migration/xbzrle.o CC migration/postcopy-ram.o CC migration/qjson.o CC migration/block.o CC net/net.o CC net/queue.o CC net/checksum.o CC net/util.o CC net/hub.o CC net/socket.o CC net/dump.o CC net/eth.o CC net/l2tpv3.o CC net/tap.o CC net/vhost-user.o CC net/tap-linux.o CC net/slirp.o CC net/filter.o CC net/filter-buffer.o CC net/filter-mirror.o CC net/colo-compare.o CC net/colo.o CC net/filter-rewriter.o CC net/filter-replay.o CC qom/cpu.o CC replay/replay.o CC replay/replay-events.o CC replay/replay-internal.o CC replay/replay-time.o CC replay/replay-input.o CC replay/replay-char.o CC replay/replay-snapshot.o CC replay/replay-net.o CC slirp/cksum.o CC slirp/if.o CC slirp/ip_icmp.o CC slirp/ip6_icmp.o CC slirp/ip6_input.o CC slirp/ip6_output.o CC slirp/ip_input.o CC slirp/ip_output.o CC slirp/dnssearch.o CC slirp/dhcpv6.o CC slirp/slirp.o CC slirp/mbuf.o CC slirp/misc.o CC slirp/sbuf.o CC slirp/socket.o CC slirp/tcp_input.o CC slirp/tcp_output.o CC slirp/tcp_subr.o CC slirp/tcp_timer.o CC slirp/udp.o CC slirp/udp6.o CC slirp/bootp.o CC slirp/tftp.o CC slirp/arp_table.o CC slirp/ndp_table.o CC ui/keymaps.o CC ui/console.o CC ui/cursor.o CC ui/qemu-pixman.o CC ui/input.o CC ui/input-keymap.o CC ui/input-legacy.o CC ui/input-linux.o CC ui/sdl2-input.o CC ui/sdl2.o CC ui/sdl2-2d.o CC ui/sdl2-gl.o CC ui/x_keymap.o CC ui/curses.o CC ui/vnc.o CC ui/vnc-enc-zlib.o CC ui/vnc-enc-hextile.o CC ui/vnc-enc-tight.o CC ui/vnc-palette.o CC ui/vnc-enc-zrle.o CC ui/vnc-auth-vencrypt.o CC ui/vnc-auth-sasl.o CC ui/vnc-ws.o CC ui/vnc-jobs.o CC ui/gtk.o CC ui/shader.o VERT ui/shader/texture-blit-vert.h FRAG ui/shader/texture-blit-frag.h CC ui/egl-helpers.o CC ui/egl-context.o CC ui/gtk-gl-area.o CC chardev/char.o CC chardev/char-fd.o CC chardev/char-file.o CC chardev/char-io.o CC chardev/char-mux.o CC chardev/char-null.o CC chardev/char-parallel.o CC chardev/char-pipe.o CC chardev/char-pty.o CC chardev/char-ringbuf.o CC chardev/char-serial.o CC chardev/char-socket.o CC chardev/char-stdio.o CC chardev/char-udp.o CCAS s390-ccw/start.o LINK tests/qemu-iotests/socket_scm_helper GEN qemu-doc.html CC s390-ccw/main.o GEN qemu-doc.txt GEN qemu.1 CC s390-ccw/bootmap.o CC s390-ccw/sclp-ascii.o CC s390-ccw/virtio.o GEN docs/qemu-qmp-ref.html CC s390-ccw/virtio-scsi.o BUILD s390-ccw/s390-ccw.elf STRIP s390-ccw/s390-ccw.img GEN docs/qemu-qmp-ref.txt GEN docs/qemu-qmp-ref.7 GEN docs/qemu-ga-ref.html GEN docs/qemu-ga-ref.txt GEN docs/qemu-ga-ref.7 CC qga/commands.o CC qga/guest-agent-command-state.o CC qga/main.o CC qga/commands-posix.o CC qga/channel-posix.o CC qga/qapi-generated/qga-qapi-types.o CC qga/qapi-generated/qga-qapi-visit.o CC qga/qapi-generated/qga-qmp-marshal.o CC qmp-introspect.o CC qapi-types.o CC qapi-visit.o CC qapi-event.o AR libqemustub.a CC qemu-img.o CC qmp-marshal.o CC ui/console-gl.o CC trace-root.o CC util/trace.o CC crypto/trace.o CC io/trace.o CC migration/trace.o CC block/trace.o CC backends/trace.o CC hw/block/trace.o CC hw/block/dataplane/trace.o CC hw/intc/trace.o CC hw/char/trace.o CC hw/net/trace.o CC hw/virtio/trace.o CC hw/audio/trace.o CC hw/misc/trace.o CC hw/usb/trace.o CC hw/scsi/trace.o CC hw/nvram/trace.o CC hw/display/trace.o CC hw/input/trace.o CC hw/timer/trace.o CC hw/dma/trace.o CC hw/sparc/trace.o CC hw/sd/trace.o CC hw/isa/trace.o CC hw/mem/trace.o CC hw/i386/trace.o CC hw/i386/xen/trace.o CC hw/9pfs/trace.o CC hw/ppc/trace.o CC hw/pci/trace.o CC hw/s390x/trace.o CC hw/vfio/trace.o CC hw/acpi/trace.o CC hw/arm/trace.o CC hw/alpha/trace.o CC hw/xen/trace.o CC ui/trace.o CC audio/trace.o CC net/trace.o CC target/arm/trace.o CC target/i386/trace.o CC target/sparc/trace.o CC target/s390x/trace.o CC target/ppc/trace.o CC qom/trace.o CC linux-user/trace.o CC qapi/trace.o AR libqemuutil.a LINK qemu-ga LINK ivshmem-client LINK ivshmem-server LINK qemu-nbd LINK qemu-img LINK qemu-io LINK fsdev/virtfs-proxy-helper LINK qemu-bridge-helper GEN alpha-softmmu/hmp-commands.h GEN cris-softmmu/hmp-commands.h GEN cris-softmmu/hmp-commands-info.h GEN cris-softmmu/config-target.h CC cris-softmmu/exec.o GEN alpha-softmmu/hmp-commands-info.h GEN alpha-softmmu/config-target.h GEN arm-softmmu/hmp-commands.h GEN aarch64-softmmu/hmp-commands.h GEN arm-softmmu/hmp-commands-info.h CC alpha-softmmu/exec.o GEN aarch64-softmmu/hmp-commands-info.h GEN arm-softmmu/config-target.h GEN aarch64-softmmu/config-target.h CC arm-softmmu/exec.o CC aarch64-softmmu/exec.o CC cris-softmmu/translate-all.o CC alpha-softmmu/translate-all.o CC aarch64-softmmu/translate-all.o CC cris-softmmu/cpu-exec.o CC arm-softmmu/translate-all.o CC alpha-softmmu/cpu-exec.o CC cris-softmmu/translate-common.o CC aarch64-softmmu/cpu-exec.o CC alpha-softmmu/translate-common.o CC cris-softmmu/cpu-exec-common.o CC arm-softmmu/cpu-exec.o CC alpha-softmmu/cpu-exec-common.o CC cris-softmmu/tcg/tcg.o CC alpha-softmmu/tcg/tcg.o CC aarch64-softmmu/translate-common.o CC arm-softmmu/translate-common.o CC aarch64-softmmu/cpu-exec-common.o CC arm-softmmu/cpu-exec-common.o CC aarch64-softmmu/tcg/tcg.o CC arm-softmmu/tcg/tcg.o CC cris-softmmu/tcg/tcg-op.o CC alpha-softmmu/tcg/tcg-op.o CC arm-softmmu/tcg/tcg-op.o CC aarch64-softmmu/tcg/tcg-op.o CC cris-softmmu/tcg/optimize.o CC alpha-softmmu/tcg/optimize.o CC cris-softmmu/tcg/tcg-common.o CC cris-softmmu/fpu/softfloat.o CC alpha-softmmu/tcg/tcg-common.o CC alpha-softmmu/fpu/softfloat.o CC arm-softmmu/tcg/optimize.o CC aarch64-softmmu/tcg/optimize.o CC arm-softmmu/tcg/tcg-common.o CC aarch64-softmmu/tcg/tcg-common.o CC arm-softmmu/fpu/softfloat.o CC aarch64-softmmu/fpu/softfloat.o CC cris-softmmu/disas.o CC alpha-softmmu/disas.o CC cris-softmmu/tcg-runtime.o CC alpha-softmmu/tcg-runtime.o CC alpha-softmmu/hax-stub.o CC cris-softmmu/hax-stub.o CC alpha-softmmu/kvm-stub.o CC cris-softmmu/kvm-stub.o CC alpha-softmmu/arch_init.o CC cris-softmmu/arch_init.o CC arm-softmmu/disas.o CC cris-softmmu/cpus.o CC alpha-softmmu/cpus.o CC arm-softmmu/tcg-runtime.o CC cris-softmmu/monitor.o GEN arm-softmmu/gdbstub-xml.c CC alpha-softmmu/monitor.o CC aarch64-softmmu/disas.o CC aarch64-softmmu/tcg-runtime.o CC arm-softmmu/hax-stub.o GEN aarch64-softmmu/gdbstub-xml.c CC arm-softmmu/kvm-stub.o CC cris-softmmu/gdbstub.o CC alpha-softmmu/gdbstub.o CC arm-softmmu/arch_init.o CC cris-softmmu/balloon.o CC alpha-softmmu/balloon.o CC arm-softmmu/cpus.o CC cris-softmmu/ioport.o CC aarch64-softmmu/hax-stub.o CC alpha-softmmu/ioport.o CC cris-softmmu/numa.o CC aarch64-softmmu/kvm-stub.o CC arm-softmmu/monitor.o CC alpha-softmmu/numa.o CC aarch64-softmmu/arch_init.o CC cris-softmmu/qtest.o CC aarch64-softmmu/cpus.o CC alpha-softmmu/qtest.o CC cris-softmmu/bootdevice.o CC cris-softmmu/memory.o CC alpha-softmmu/bootdevice.o CC aarch64-softmmu/monitor.o CC alpha-softmmu/memory.o CC arm-softmmu/gdbstub.o CC cris-softmmu/cputlb.o CC arm-softmmu/balloon.o CC alpha-softmmu/cputlb.o CC arm-softmmu/ioport.o CC aarch64-softmmu/gdbstub.o CC arm-softmmu/numa.o CC cris-softmmu/memory_mapping.o CC cris-softmmu/dump.o CC aarch64-softmmu/balloon.o CC arm-softmmu/qtest.o CC aarch64-softmmu/ioport.o CC arm-softmmu/bootdevice.o CC alpha-softmmu/memory_mapping.o CC cris-softmmu/migration/ram.o CC arm-softmmu/memory.o CC alpha-softmmu/dump.o CC aarch64-softmmu/numa.o CC cris-softmmu/migration/savevm.o CC aarch64-softmmu/qtest.o CC alpha-softmmu/migration/ram.o CC arm-softmmu/cputlb.o CC aarch64-softmmu/bootdevice.o CC cris-softmmu/xen-common-stub.o CC aarch64-softmmu/memory.o CC cris-softmmu/xen-hvm-stub.o CC alpha-softmmu/migration/savevm.o CC cris-softmmu/hw/core/nmi.o CC cris-softmmu/hw/core/generic-loader.o CC cris-softmmu/hw/core/null-machine.o CC aarch64-softmmu/cputlb.o CC arm-softmmu/memory_mapping.o CC cris-softmmu/hw/cpu/core.o CC arm-softmmu/dump.o CC cris-softmmu/hw/net/etraxfs_eth.o CC alpha-softmmu/xen-common-stub.o CC cris-softmmu/hw/net/vhost_net.o CC alpha-softmmu/xen-hvm-stub.o CC cris-softmmu/hw/net/rocker/qmp-norocker.o CC cris-softmmu/hw/vfio/common.o CC alpha-softmmu/hw/9pfs/virtio-9p-device.o CC arm-softmmu/migration/ram.o CC alpha-softmmu/hw/block/virtio-blk.o CC aarch64-softmmu/memory_mapping.o CC cris-softmmu/hw/vfio/platform.o CC aarch64-softmmu/dump.o CC cris-softmmu/hw/vfio/spapr.o CC arm-softmmu/migration/savevm.o CC alpha-softmmu/hw/block/dataplane/virtio-blk.o CC cris-softmmu/hw/cris/boot.o CC aarch64-softmmu/migration/ram.o CC alpha-softmmu/hw/char/virtio-serial-bus.o CC cris-softmmu/hw/cris/axis_dev88.o CC alpha-softmmu/hw/core/nmi.o CC arm-softmmu/xen-common-stub.o CC cris-softmmu/target/cris/translate.o CC alpha-softmmu/hw/core/generic-loader.o CC arm-softmmu/xen-hvm-stub.o CC alpha-softmmu/hw/core/null-machine.o CC arm-softmmu/hw/9pfs/virtio-9p-device.o CC aarch64-softmmu/migration/savevm.o CC arm-softmmu/hw/adc/stm32f2xx_adc.o CC alpha-softmmu/hw/cpu/core.o CC arm-softmmu/hw/block/virtio-blk.o CC alpha-softmmu/hw/display/vga.o CC aarch64-softmmu/xen-common-stub.o CC arm-softmmu/hw/block/dataplane/virtio-blk.o CC aarch64-softmmu/xen-hvm-stub.o CC cris-softmmu/target/cris/op_helper.o CC arm-softmmu/hw/char/exynos4210_uart.o CC alpha-softmmu/hw/display/virtio-gpu.o CC aarch64-softmmu/hw/9pfs/virtio-9p-device.o CC arm-softmmu/hw/char/omap_uart.o CC arm-softmmu/hw/char/digic-uart.o CC cris-softmmu/target/cris/helper.o CC aarch64-softmmu/hw/adc/stm32f2xx_adc.o CC arm-softmmu/hw/char/stm32f2xx_usart.o CC alpha-softmmu/hw/display/virtio-gpu-3d.o CC cris-softmmu/target/cris/cpu.o CC aarch64-softmmu/hw/block/virtio-blk.o CC arm-softmmu/hw/char/bcm2835_aux.o CC cris-softmmu/target/cris/gdbstub.o CC aarch64-softmmu/hw/block/dataplane/virtio-blk.o CC alpha-softmmu/hw/display/virtio-gpu-pci.o CC arm-softmmu/hw/char/virtio-serial-bus.o CC cris-softmmu/target/cris/mmu.o CC aarch64-softmmu/hw/char/exynos4210_uart.o CC cris-softmmu/target/cris/machine.o CC alpha-softmmu/hw/misc/ivshmem.o CC arm-softmmu/hw/core/nmi.o CC aarch64-softmmu/hw/char/omap_uart.o GEN trace/generated-helpers.c CC cris-softmmu/trace/control-target.o CC arm-softmmu/hw/core/generic-loader.o CC aarch64-softmmu/hw/char/digic-uart.o CC alpha-softmmu/hw/misc/edu.o CC arm-softmmu/hw/core/null-machine.o CC cris-softmmu/trace/generated-helpers.o CC aarch64-softmmu/hw/char/stm32f2xx_usart.o CC alpha-softmmu/hw/net/virtio-net.o LINK cris-softmmu/qemu-system-cris CC arm-softmmu/hw/cpu/arm11mpcore.o CC aarch64-softmmu/hw/char/bcm2835_aux.o CC arm-softmmu/hw/cpu/realview_mpcore.o CC arm-softmmu/hw/cpu/a9mpcore.o CC aarch64-softmmu/hw/char/virtio-serial-bus.o CC alpha-softmmu/hw/net/vhost_net.o CC arm-softmmu/hw/cpu/a15mpcore.o CC alpha-softmmu/hw/scsi/virtio-scsi.o CC arm-softmmu/hw/cpu/core.o CC aarch64-softmmu/hw/core/nmi.o CC arm-softmmu/hw/display/omap_dss.o CC aarch64-softmmu/hw/core/generic-loader.o CC alpha-softmmu/hw/scsi/virtio-scsi-dataplane.o CC aarch64-softmmu/hw/core/null-machine.o CC aarch64-softmmu/hw/cpu/arm11mpcore.o CC arm-softmmu/hw/display/omap_lcdc.o CC alpha-softmmu/hw/scsi/vhost-scsi.o CC arm-softmmu/hw/display/pxa2xx_lcd.o CC aarch64-softmmu/hw/cpu/realview_mpcore.o CC aarch64-softmmu/hw/cpu/a9mpcore.o CC alpha-softmmu/hw/timer/mc146818rtc.o CC aarch64-softmmu/hw/cpu/a15mpcore.o CC aarch64-softmmu/hw/cpu/core.o CC alpha-softmmu/hw/vfio/common.o CC aarch64-softmmu/hw/display/omap_dss.o CC arm-softmmu/hw/display/bcm2835_fb.o GEN i386-softmmu/hmp-commands.h GEN i386-softmmu/hmp-commands-info.h CC aarch64-softmmu/hw/display/omap_lcdc.o GEN i386-softmmu/config-target.h CC i386-softmmu/exec.o CC alpha-softmmu/hw/vfio/pci.o CC arm-softmmu/hw/display/vga.o CC aarch64-softmmu/hw/display/pxa2xx_lcd.o CC arm-softmmu/hw/display/virtio-gpu.o CC alpha-softmmu/hw/vfio/pci-quirks.o CC aarch64-softmmu/hw/display/bcm2835_fb.o CC i386-softmmu/translate-all.o CC arm-softmmu/hw/display/virtio-gpu-3d.o CC alpha-softmmu/hw/vfio/platform.o CC aarch64-softmmu/hw/display/vga.o CC i386-softmmu/cpu-exec.o CC alpha-softmmu/hw/vfio/spapr.o CC arm-softmmu/hw/display/virtio-gpu-pci.o CC alpha-softmmu/hw/virtio/virtio.o CC i386-softmmu/translate-common.o CC arm-softmmu/hw/dma/omap_dma.o CC i386-softmmu/cpu-exec-common.o CC aarch64-softmmu/hw/display/virtio-gpu.o CC alpha-softmmu/hw/virtio/virtio-balloon.o CC i386-softmmu/tcg/tcg.o CC arm-softmmu/hw/dma/soc_dma.o CC alpha-softmmu/hw/virtio/vhost.o CC aarch64-softmmu/hw/display/virtio-gpu-3d.o CC arm-softmmu/hw/dma/pxa2xx_dma.o CC arm-softmmu/hw/dma/bcm2835_dma.o CC aarch64-softmmu/hw/display/virtio-gpu-pci.o CC alpha-softmmu/hw/virtio/vhost-backend.o CC arm-softmmu/hw/gpio/omap_gpio.o CC aarch64-softmmu/hw/display/dpcd.o CC alpha-softmmu/hw/virtio/vhost-user.o CC arm-softmmu/hw/gpio/imx_gpio.o CC aarch64-softmmu/hw/display/xlnx_dp.o CC alpha-softmmu/hw/virtio/vhost-vsock.o CC i386-softmmu/tcg/tcg-op.o CC arm-softmmu/hw/gpio/bcm2835_gpio.o CC alpha-softmmu/hw/virtio/virtio-crypto.o CC aarch64-softmmu/hw/dma/xlnx_dpdma.o CC arm-softmmu/hw/i2c/omap_i2c.o CC alpha-softmmu/hw/virtio/virtio-crypto-pci.o CC alpha-softmmu/hw/alpha/dp264.o CC arm-softmmu/hw/input/pxa2xx_keypad.o CC aarch64-softmmu/hw/dma/omap_dma.o CC alpha-softmmu/hw/alpha/pci.o CC arm-softmmu/hw/input/tsc210x.o CC alpha-softmmu/hw/alpha/typhoon.o CC aarch64-softmmu/hw/dma/soc_dma.o CC alpha-softmmu/target/alpha/machine.o CC arm-softmmu/hw/intc/armv7m_nvic.o CC alpha-softmmu/target/alpha/translate.o CC aarch64-softmmu/hw/dma/pxa2xx_dma.o CC i386-softmmu/tcg/optimize.o CC aarch64-softmmu/hw/dma/bcm2835_dma.o CC arm-softmmu/hw/intc/exynos4210_gic.o CC aarch64-softmmu/hw/gpio/omap_gpio.o CC arm-softmmu/hw/intc/exynos4210_combiner.o CC alpha-softmmu/target/alpha/helper.o CC arm-softmmu/hw/intc/omap_intc.o CC aarch64-softmmu/hw/gpio/imx_gpio.o CC alpha-softmmu/target/alpha/cpu.o CC i386-softmmu/tcg/tcg-common.o CC aarch64-softmmu/hw/gpio/bcm2835_gpio.o CC alpha-softmmu/target/alpha/int_helper.o CC i386-softmmu/fpu/softfloat.o CC arm-softmmu/hw/intc/bcm2835_ic.o CC aarch64-softmmu/hw/i2c/omap_i2c.o CC alpha-softmmu/target/alpha/fpu_helper.o CC arm-softmmu/hw/intc/bcm2836_control.o CC aarch64-softmmu/hw/input/pxa2xx_keypad.o CC arm-softmmu/hw/intc/allwinner-a10-pic.o CC aarch64-softmmu/hw/input/tsc210x.o CC alpha-softmmu/target/alpha/vax_helper.o CC arm-softmmu/hw/intc/aspeed_vic.o CC alpha-softmmu/target/alpha/sys_helper.o CC arm-softmmu/hw/intc/arm_gicv3_cpuif.o CC aarch64-softmmu/hw/intc/armv7m_nvic.o CC alpha-softmmu/target/alpha/mem_helper.o CC alpha-softmmu/target/alpha/gdbstub.o CC aarch64-softmmu/hw/intc/exynos4210_gic.o CC arm-softmmu/hw/misc/ivshmem.o CC i386-softmmu/disas.o GEN trace/generated-helpers.c CC aarch64-softmmu/hw/intc/exynos4210_combiner.o CC alpha-softmmu/trace/control-target.o CC aarch64-softmmu/hw/intc/omap_intc.o CC alpha-softmmu/trace/generated-helpers.o CC i386-softmmu/tcg-runtime.o CC arm-softmmu/hw/misc/arm_sysctl.o LINK alpha-softmmu/qemu-system-alpha CC i386-softmmu/hax-stub.o CC arm-softmmu/hw/misc/cbus.o CC aarch64-softmmu/hw/intc/bcm2835_ic.o CC i386-softmmu/kvm-stub.o CC i386-softmmu/arch_init.o CC arm-softmmu/hw/misc/exynos4210_pmu.o CC aarch64-softmmu/hw/intc/bcm2836_control.o CC i386-softmmu/cpus.o CC arm-softmmu/hw/misc/exynos4210_clk.o CC aarch64-softmmu/hw/intc/allwinner-a10-pic.o CC i386-softmmu/monitor.o CC arm-softmmu/hw/misc/imx_ccm.o CC aarch64-softmmu/hw/intc/aspeed_vic.o CC arm-softmmu/hw/misc/imx31_ccm.o CC arm-softmmu/hw/misc/imx25_ccm.o CC aarch64-softmmu/hw/intc/arm_gicv3_cpuif.o CC arm-softmmu/hw/misc/imx6_ccm.o CC arm-softmmu/hw/misc/imx6_src.o CC arm-softmmu/hw/misc/mst_fpga.o CC i386-softmmu/gdbstub.o CC arm-softmmu/hw/misc/omap_clk.o CC aarch64-softmmu/hw/misc/ivshmem.o GEN lm32-softmmu/hmp-commands.h GEN lm32-softmmu/hmp-commands-info.h GEN lm32-softmmu/config-target.h CC arm-softmmu/hw/misc/omap_gpmc.o CC aarch64-softmmu/hw/misc/arm_sysctl.o CC lm32-softmmu/exec.o CC i386-softmmu/balloon.o CC arm-softmmu/hw/misc/omap_l4.o CC aarch64-softmmu/hw/misc/cbus.o CC i386-softmmu/ioport.o CC arm-softmmu/hw/misc/omap_sdrc.o CC aarch64-softmmu/hw/misc/exynos4210_pmu.o CC i386-softmmu/numa.o CC arm-softmmu/hw/misc/omap_tap.o CC aarch64-softmmu/hw/misc/exynos4210_clk.o CC arm-softmmu/hw/misc/bcm2835_mbox.o CC i386-softmmu/qtest.o CC aarch64-softmmu/hw/misc/imx_ccm.o CC arm-softmmu/hw/misc/bcm2835_property.o CC aarch64-softmmu/hw/misc/imx31_ccm.o CC lm32-softmmu/translate-all.o CC i386-softmmu/bootdevice.o CC arm-softmmu/hw/misc/bcm2835_rng.o CC i386-softmmu/memory.o CC aarch64-softmmu/hw/misc/imx25_ccm.o CC arm-softmmu/hw/misc/zynq_slcr.o CC aarch64-softmmu/hw/misc/imx6_ccm.o CC lm32-softmmu/cpu-exec.o CC arm-softmmu/hw/misc/zynq-xadc.o CC aarch64-softmmu/hw/misc/imx6_src.o CC aarch64-softmmu/hw/misc/mst_fpga.o CC arm-softmmu/hw/misc/stm32f2xx_syscfg.o CC lm32-softmmu/translate-common.o CC aarch64-softmmu/hw/misc/omap_clk.o CC i386-softmmu/cputlb.o CC arm-softmmu/hw/misc/edu.o CC lm32-softmmu/cpu-exec-common.o CC aarch64-softmmu/hw/misc/omap_gpmc.o CC lm32-softmmu/tcg/tcg.o CC arm-softmmu/hw/misc/aspeed_scu.o CC aarch64-softmmu/hw/misc/omap_l4.o CC arm-softmmu/hw/misc/aspeed_sdmc.o CC i386-softmmu/memory_mapping.o CC aarch64-softmmu/hw/misc/omap_sdrc.o CC arm-softmmu/hw/net/virtio-net.o CC i386-softmmu/dump.o CC aarch64-softmmu/hw/misc/omap_tap.o CC aarch64-softmmu/hw/misc/bcm2835_mbox.o CC lm32-softmmu/tcg/tcg-op.o CC i386-softmmu/migration/ram.o CC aarch64-softmmu/hw/misc/bcm2835_property.o CC arm-softmmu/hw/net/vhost_net.o CC aarch64-softmmu/hw/misc/bcm2835_rng.o CC arm-softmmu/hw/pcmcia/pxa2xx.o CC aarch64-softmmu/hw/misc/zynq_slcr.o CC arm-softmmu/hw/scsi/virtio-scsi.o CC i386-softmmu/migration/savevm.o CC aarch64-softmmu/hw/misc/zynq-xadc.o CC arm-softmmu/hw/scsi/virtio-scsi-dataplane.o CC aarch64-softmmu/hw/misc/stm32f2xx_syscfg.o CC aarch64-softmmu/hw/misc/edu.o CC arm-softmmu/hw/scsi/vhost-scsi.o CC i386-softmmu/xen-common-stub.o CC aarch64-softmmu/hw/misc/auxbus.o CC lm32-softmmu/tcg/optimize.o CC arm-softmmu/hw/sd/omap_mmc.o CC i386-softmmu/xen-hvm-stub.o CC aarch64-softmmu/hw/misc/aspeed_scu.o CC arm-softmmu/hw/sd/pxa2xx_mmci.o CC i386-softmmu/hw/9pfs/virtio-9p-device.o CC aarch64-softmmu/hw/misc/aspeed_sdmc.o CC lm32-softmmu/tcg/tcg-common.o CC i386-softmmu/hw/block/virtio-blk.o CC arm-softmmu/hw/sd/bcm2835_sdhost.o CC lm32-softmmu/fpu/softfloat.o CC aarch64-softmmu/hw/net/virtio-net.o CC arm-softmmu/hw/ssi/omap_spi.o CC i386-softmmu/hw/block/dataplane/virtio-blk.o CC arm-softmmu/hw/ssi/imx_spi.o CC i386-softmmu/hw/char/virtio-serial-bus.o CC aarch64-softmmu/hw/net/vhost_net.o CC arm-softmmu/hw/timer/exynos4210_mct.o CC aarch64-softmmu/hw/pcmcia/pxa2xx.o CC arm-softmmu/hw/timer/exynos4210_pwm.o CC i386-softmmu/hw/core/nmi.o CC aarch64-softmmu/hw/scsi/virtio-scsi.o CC arm-softmmu/hw/timer/exynos4210_rtc.o CC i386-softmmu/hw/core/generic-loader.o CC aarch64-softmmu/hw/scsi/virtio-scsi-dataplane.o CC i386-softmmu/hw/core/null-machine.o CC arm-softmmu/hw/timer/omap_gptimer.o CC aarch64-softmmu/hw/scsi/vhost-scsi.o CC i386-softmmu/hw/cpu/core.o CC arm-softmmu/hw/timer/omap_synctimer.o CC lm32-softmmu/disas.o CC i386-softmmu/hw/display/vga.o CC aarch64-softmmu/hw/sd/omap_mmc.o CC arm-softmmu/hw/timer/pxa2xx_timer.o CC lm32-softmmu/tcg-runtime.o CC aarch64-softmmu/hw/sd/pxa2xx_mmci.o CC arm-softmmu/hw/timer/digic-timer.o CC aarch64-softmmu/hw/sd/bcm2835_sdhost.o CC lm32-softmmu/hax-stub.o CC arm-softmmu/hw/timer/allwinner-a10-pit.o CC i386-softmmu/hw/display/virtio-gpu.o CC aarch64-softmmu/hw/ssi/omap_spi.o CC arm-softmmu/hw/usb/tusb6010.o CC lm32-softmmu/kvm-stub.o CC lm32-softmmu/arch_init.o CC arm-softmmu/hw/vfio/common.o CC aarch64-softmmu/hw/ssi/imx_spi.o CC lm32-softmmu/cpus.o CC aarch64-softmmu/hw/timer/exynos4210_mct.o CC i386-softmmu/hw/display/virtio-gpu-3d.o CC arm-softmmu/hw/vfio/pci.o CC aarch64-softmmu/hw/timer/exynos4210_pwm.o CC i386-softmmu/hw/display/virtio-gpu-pci.o CC lm32-softmmu/monitor.o CC i386-softmmu/hw/display/virtio-vga.o CC aarch64-softmmu/hw/timer/exynos4210_rtc.o CC aarch64-softmmu/hw/timer/omap_gptimer.o CC arm-softmmu/hw/vfio/pci-quirks.o CC i386-softmmu/hw/intc/apic.o CC aarch64-softmmu/hw/timer/omap_synctimer.o CC aarch64-softmmu/hw/timer/pxa2xx_timer.o CC lm32-softmmu/gdbstub.o CC i386-softmmu/hw/intc/apic_common.o CC arm-softmmu/hw/vfio/platform.o CC aarch64-softmmu/hw/timer/digic-timer.o CC aarch64-softmmu/hw/timer/allwinner-a10-pit.o CC i386-softmmu/hw/intc/ioapic.o CC arm-softmmu/hw/vfio/calxeda-xgmac.o CC lm32-softmmu/balloon.o CC arm-softmmu/hw/vfio/amd-xgbe.o CC aarch64-softmmu/hw/usb/tusb6010.o CC lm32-softmmu/ioport.o CC i386-softmmu/hw/isa/lpc_ich9.o CC arm-softmmu/hw/vfio/spapr.o CC aarch64-softmmu/hw/vfio/common.o CC lm32-softmmu/numa.o CC i386-softmmu/hw/misc/vmport.o CC arm-softmmu/hw/virtio/virtio.o CC aarch64-softmmu/hw/vfio/pci.o CC i386-softmmu/hw/misc/ivshmem.o CC lm32-softmmu/qtest.o CC i386-softmmu/hw/misc/pvpanic.o CC arm-softmmu/hw/virtio/virtio-balloon.o CC i386-softmmu/hw/misc/edu.o CC lm32-softmmu/bootdevice.o CC arm-softmmu/hw/virtio/vhost.o CC aarch64-softmmu/hw/vfio/pci-quirks.o CC lm32-softmmu/memory.o CC i386-softmmu/hw/net/virtio-net.o CC arm-softmmu/hw/virtio/vhost-backend.o CC aarch64-softmmu/hw/vfio/platform.o CC aarch64-softmmu/hw/vfio/calxeda-xgmac.o CC arm-softmmu/hw/virtio/vhost-user.o CC aarch64-softmmu/hw/vfio/amd-xgbe.o CC i386-softmmu/hw/net/vhost_net.o CC arm-softmmu/hw/virtio/vhost-vsock.o CC aarch64-softmmu/hw/vfio/spapr.o CC i386-softmmu/hw/scsi/virtio-scsi.o CC lm32-softmmu/cputlb.o CC arm-softmmu/hw/virtio/virtio-crypto.o CC aarch64-softmmu/hw/virtio/virtio.o CC arm-softmmu/hw/virtio/virtio-crypto-pci.o CC i386-softmmu/hw/scsi/virtio-scsi-dataplane.o CC arm-softmmu/hw/arm/boot.o CC i386-softmmu/hw/scsi/vhost-scsi.o CC arm-softmmu/hw/arm/collie.o CC i386-softmmu/hw/timer/mc146818rtc.o CC aarch64-softmmu/hw/virtio/virtio-balloon.o CC lm32-softmmu/memory_mapping.o CC lm32-softmmu/dump.o CC arm-softmmu/hw/arm/exynos4_boards.o CC aarch64-softmmu/hw/virtio/vhost.o CC i386-softmmu/hw/vfio/common.o CC arm-softmmu/hw/arm/gumstix.o CC arm-softmmu/hw/arm/highbank.o CC lm32-softmmu/migration/ram.o CC i386-softmmu/hw/vfio/pci.o CC aarch64-softmmu/hw/virtio/vhost-backend.o CC arm-softmmu/hw/arm/digic_boards.o CC i386-softmmu/hw/vfio/pci-quirks.o CC arm-softmmu/hw/arm/integratorcp.o CC aarch64-softmmu/hw/virtio/vhost-user.o CC lm32-softmmu/migration/savevm.o CC aarch64-softmmu/hw/virtio/vhost-vsock.o CC i386-softmmu/hw/vfio/platform.o CC arm-softmmu/hw/arm/mainstone.o CC aarch64-softmmu/hw/virtio/virtio-crypto.o CC arm-softmmu/hw/arm/musicpal.o CC aarch64-softmmu/hw/virtio/virtio-crypto-pci.o CC i386-softmmu/hw/vfio/spapr.o CC lm32-softmmu/xen-common-stub.o CC aarch64-softmmu/hw/arm/boot.o CC lm32-softmmu/xen-hvm-stub.o CC i386-softmmu/hw/virtio/virtio.o CC lm32-softmmu/hw/core/nmi.o CC arm-softmmu/hw/arm/nseries.o CC aarch64-softmmu/hw/arm/collie.o CC lm32-softmmu/hw/core/generic-loader.o CC aarch64-softmmu/hw/arm/exynos4_boards.o CC lm32-softmmu/hw/core/null-machine.o CC arm-softmmu/hw/arm/omap_sx1.o CC i386-softmmu/hw/virtio/virtio-balloon.o CC aarch64-softmmu/hw/arm/gumstix.o CC lm32-softmmu/hw/cpu/core.o CC aarch64-softmmu/hw/arm/highbank.o CC i386-softmmu/hw/virtio/vhost.o CC arm-softmmu/hw/arm/palm.o CC lm32-softmmu/hw/input/milkymist-softusb.o CC arm-softmmu/hw/arm/realview.o CC aarch64-softmmu/hw/arm/digic_boards.o CC i386-softmmu/hw/virtio/vhost-backend.o CC arm-softmmu/hw/arm/spitz.o CC lm32-softmmu/hw/misc/milkymist-hpdmc.o CC aarch64-softmmu/hw/arm/integratorcp.o CC i386-softmmu/hw/virtio/vhost-user.o CC aarch64-softmmu/hw/arm/mainstone.o CC lm32-softmmu/hw/misc/milkymist-pfpu.o CC arm-softmmu/hw/arm/stellaris.o CC aarch64-softmmu/hw/arm/musicpal.o CC i386-softmmu/hw/virtio/vhost-vsock.o CC lm32-softmmu/hw/net/milkymist-minimac2.o CC i386-softmmu/hw/virtio/virtio-crypto.o CC arm-softmmu/hw/arm/tosa.o CC lm32-softmmu/hw/net/vhost_net.o CC aarch64-softmmu/hw/arm/nseries.o CC lm32-softmmu/hw/net/rocker/qmp-norocker.o CC arm-softmmu/hw/arm/versatilepb.o CC i386-softmmu/hw/virtio/virtio-crypto-pci.o CC lm32-softmmu/hw/sd/milkymist-memcard.o CC arm-softmmu/hw/arm/vexpress.o CC aarch64-softmmu/hw/arm/omap_sx1.o CC i386-softmmu/hw/i386/multiboot.o CC lm32-softmmu/hw/vfio/common.o CC arm-softmmu/hw/arm/virt.o CC i386-softmmu/hw/i386/pc.o CC aarch64-softmmu/hw/arm/palm.o CC lm32-softmmu/hw/vfio/platform.o CC arm-softmmu/hw/arm/xilinx_zynq.o CC aarch64-softmmu/hw/arm/realview.o CC arm-softmmu/hw/arm/z2.o CC lm32-softmmu/hw/vfio/spapr.o CC i386-softmmu/hw/i386/pc_piix.o CC aarch64-softmmu/hw/arm/spitz.o CC lm32-softmmu/hw/lm32/lm32_boards.o CC arm-softmmu/hw/arm/virt-acpi-build.o CC aarch64-softmmu/hw/arm/stellaris.o CC i386-softmmu/hw/i386/pc_q35.o CC lm32-softmmu/hw/lm32/milkymist.o CC arm-softmmu/hw/arm/netduino2.o CC aarch64-softmmu/hw/arm/tosa.o CC arm-softmmu/hw/arm/sysbus-fdt.o CC i386-softmmu/hw/i386/pc_sysfw.o CC aarch64-softmmu/hw/arm/versatilepb.o CC lm32-softmmu/target/lm32/translate.o CC arm-softmmu/hw/arm/armv7m.o CC i386-softmmu/hw/i386/x86-iommu.o CC aarch64-softmmu/hw/arm/vexpress.o CC i386-softmmu/hw/i386/intel_iommu.o CC arm-softmmu/hw/arm/exynos4210.o CC aarch64-softmmu/hw/arm/virt.o CC lm32-softmmu/target/lm32/op_helper.o CC arm-softmmu/hw/arm/pxa2xx.o CC lm32-softmmu/target/lm32/helper.o CC aarch64-softmmu/hw/arm/xilinx_zynq.o CC lm32-softmmu/target/lm32/cpu.o CC i386-softmmu/hw/i386/amd_iommu.o CC aarch64-softmmu/hw/arm/z2.o CC lm32-softmmu/target/lm32/gdbstub.o CC lm32-softmmu/target/lm32/lm32-semi.o CC arm-softmmu/hw/arm/pxa2xx_gpio.o CC i386-softmmu/hw/i386/kvmvapic.o CC aarch64-softmmu/hw/arm/virt-acpi-build.o CC lm32-softmmu/target/lm32/machine.o CC arm-softmmu/hw/arm/pxa2xx_pic.o CC i386-softmmu/hw/i386/acpi-build.o GEN trace/generated-helpers.c CC aarch64-softmmu/hw/arm/netduino2.o CC lm32-softmmu/trace/control-target.o CC arm-softmmu/hw/arm/digic.o CC aarch64-softmmu/hw/arm/sysbus-fdt.o CC lm32-softmmu/trace/generated-helpers.o CC arm-softmmu/hw/arm/omap1.o LINK lm32-softmmu/qemu-system-lm32 CC aarch64-softmmu/hw/arm/armv7m.o CC i386-softmmu/hw/i386/pci-assign-load-rom.o CC aarch64-softmmu/hw/arm/exynos4210.o CC arm-softmmu/hw/arm/omap2.o CC i386-softmmu/target/i386/translate.o CC aarch64-softmmu/hw/arm/pxa2xx.o CC arm-softmmu/hw/arm/strongarm.o GEN m68k-softmmu/hmp-commands.h GEN m68k-softmmu/hmp-commands-info.h CC aarch64-softmmu/hw/arm/pxa2xx_gpio.o GEN m68k-softmmu/config-target.h CC m68k-softmmu/exec.o CC aarch64-softmmu/hw/arm/pxa2xx_pic.o CC arm-softmmu/hw/arm/allwinner-a10.o CC aarch64-softmmu/hw/arm/digic.o CC arm-softmmu/hw/arm/cubieboard.o CC aarch64-softmmu/hw/arm/omap1.o CC arm-softmmu/hw/arm/bcm2835_peripherals.o CC arm-softmmu/hw/arm/bcm2836.o CC m68k-softmmu/translate-all.o CC arm-softmmu/hw/arm/raspi.o CC aarch64-softmmu/hw/arm/omap2.o CC m68k-softmmu/cpu-exec.o CC arm-softmmu/hw/arm/stm32f205_soc.o CC m68k-softmmu/translate-common.o CC aarch64-softmmu/hw/arm/strongarm.o CC arm-softmmu/hw/arm/fsl-imx25.o CC m68k-softmmu/cpu-exec-common.o CC arm-softmmu/hw/arm/imx25_pdk.o CC m68k-softmmu/tcg/tcg.o CC aarch64-softmmu/hw/arm/allwinner-a10.o CC arm-softmmu/hw/arm/fsl-imx31.o CC arm-softmmu/hw/arm/kzm.o CC aarch64-softmmu/hw/arm/cubieboard.o CC arm-softmmu/hw/arm/fsl-imx6.o CC aarch64-softmmu/hw/arm/bcm2835_peripherals.o CC i386-softmmu/target/i386/helper.o CC arm-softmmu/hw/arm/sabrelite.o CC aarch64-softmmu/hw/arm/bcm2836.o CC m68k-softmmu/tcg/tcg-op.o CC i386-softmmu/target/i386/cpu.o CC arm-softmmu/hw/arm/aspeed_soc.o CC aarch64-softmmu/hw/arm/raspi.o CC arm-softmmu/hw/arm/aspeed.o CC i386-softmmu/target/i386/bpt_helper.o CC arm-softmmu/target/arm/arm-semi.o CC aarch64-softmmu/hw/arm/stm32f205_soc.o CC i386-softmmu/target/i386/excp_helper.o CC arm-softmmu/target/arm/machine.o CC aarch64-softmmu/hw/arm/xlnx-zynqmp.o CC arm-softmmu/target/arm/psci.o CC i386-softmmu/target/i386/fpu_helper.o CC aarch64-softmmu/hw/arm/xlnx-ep108.o CC arm-softmmu/target/arm/arch_dump.o CC m68k-softmmu/tcg/optimize.o CC arm-softmmu/target/arm/monitor.o CC aarch64-softmmu/hw/arm/fsl-imx25.o CC arm-softmmu/target/arm/kvm-stub.o CC aarch64-softmmu/hw/arm/imx25_pdk.o CC arm-softmmu/target/arm/translate.o CC aarch64-softmmu/hw/arm/fsl-imx31.o CC m68k-softmmu/tcg/tcg-common.o CC aarch64-softmmu/hw/arm/kzm.o CC m68k-softmmu/fpu/softfloat.o CC aarch64-softmmu/hw/arm/fsl-imx6.o CC aarch64-softmmu/hw/arm/sabrelite.o CC aarch64-softmmu/hw/arm/aspeed_soc.o CC i386-softmmu/target/i386/cc_helper.o CC aarch64-softmmu/hw/arm/aspeed.o CC i386-softmmu/target/i386/int_helper.o CC aarch64-softmmu/target/arm/arm-semi.o CC i386-softmmu/target/i386/svm_helper.o CC aarch64-softmmu/target/arm/machine.o CC m68k-softmmu/disas.o CC i386-softmmu/target/i386/smm_helper.o CC aarch64-softmmu/target/arm/psci.o CC m68k-softmmu/tcg-runtime.o CC i386-softmmu/target/i386/misc_helper.o GEN m68k-softmmu/gdbstub-xml.c CC aarch64-softmmu/target/arm/arch_dump.o CC i386-softmmu/target/i386/mem_helper.o CC m68k-softmmu/hax-stub.o CC aarch64-softmmu/target/arm/monitor.o CC m68k-softmmu/kvm-stub.o CC i386-softmmu/target/i386/seg_helper.o CC aarch64-softmmu/target/arm/kvm-stub.o CC m68k-softmmu/arch_init.o CC aarch64-softmmu/target/arm/translate.o CC m68k-softmmu/cpus.o CC arm-softmmu/target/arm/op_helper.o CC m68k-softmmu/monitor.o CC arm-softmmu/target/arm/helper.o CC i386-softmmu/target/i386/mpx_helper.o CC m68k-softmmu/gdbstub.o CC i386-softmmu/target/i386/gdbstub.o CC i386-softmmu/target/i386/machine.o CC m68k-softmmu/balloon.o CC m68k-softmmu/ioport.o CC i386-softmmu/target/i386/arch_memory_mapping.o CC m68k-softmmu/numa.o CC i386-softmmu/target/i386/arch_dump.o CC m68k-softmmu/qtest.o CC i386-softmmu/target/i386/monitor.o CC arm-softmmu/target/arm/cpu.o CC m68k-softmmu/bootdevice.o CC i386-softmmu/target/i386/kvm-stub.o CC arm-softmmu/target/arm/neon_helper.o CC m68k-softmmu/memory.o GEN trace/generated-helpers.c CC i386-softmmu/trace/control-target.o CC aarch64-softmmu/target/arm/op_helper.o CC i386-softmmu/trace/generated-helpers.o LINK i386-softmmu/qemu-system-i386 CC arm-softmmu/target/arm/iwmmxt_helper.o CC m68k-softmmu/cputlb.o CC aarch64-softmmu/target/arm/helper.o CC arm-softmmu/target/arm/gdbstub.o CC arm-softmmu/target/arm/crypto_helper.o CC m68k-softmmu/memory_mapping.o GEN microblazeel-softmmu/hmp-commands.h GEN microblazeel-softmmu/hmp-commands-info.h CC arm-softmmu/target/arm/arm-powerctl.o GEN microblazeel-softmmu/config-target.h CC microblazeel-softmmu/exec.o CC m68k-softmmu/dump.o GEN trace/generated-helpers.c CC arm-softmmu/trace/control-target.o CC arm-softmmu/gdbstub-xml.o CC m68k-softmmu/migration/ram.o CC arm-softmmu/trace/generated-helpers.o CC aarch64-softmmu/target/arm/cpu.o CC m68k-softmmu/migration/savevm.o LINK arm-softmmu/qemu-system-arm CC microblazeel-softmmu/translate-all.o CC aarch64-softmmu/target/arm/neon_helper.o CC microblazeel-softmmu/cpu-exec.o CC m68k-softmmu/xen-common-stub.o CC microblazeel-softmmu/translate-common.o CC m68k-softmmu/xen-hvm-stub.o CC m68k-softmmu/hw/char/mcf_uart.o CC microblazeel-softmmu/cpu-exec-common.o CC aarch64-softmmu/target/arm/iwmmxt_helper.o CC microblazeel-softmmu/tcg/tcg.o CC m68k-softmmu/hw/core/nmi.o CC m68k-softmmu/hw/core/generic-loader.o CC aarch64-softmmu/target/arm/gdbstub.o CC m68k-softmmu/hw/core/null-machine.o GEN microblaze-softmmu/hmp-commands.h CC m68k-softmmu/hw/cpu/core.o GEN microblaze-softmmu/hmp-commands-info.h CC aarch64-softmmu/target/arm/cpu64.o GEN microblaze-softmmu/config-target.h CC microblaze-softmmu/exec.o CC m68k-softmmu/hw/net/mcf_fec.o CC aarch64-softmmu/target/arm/translate-a64.o CC m68k-softmmu/hw/net/vhost_net.o CC microblazeel-softmmu/tcg/tcg-op.o CC m68k-softmmu/hw/net/rocker/qmp-norocker.o CC m68k-softmmu/hw/vfio/common.o CC microblaze-softmmu/translate-all.o CC m68k-softmmu/hw/vfio/platform.o CC microblazeel-softmmu/tcg/optimize.o CC m68k-softmmu/hw/vfio/spapr.o CC microblaze-softmmu/cpu-exec.o CC m68k-softmmu/hw/m68k/an5206.o CC microblaze-softmmu/translate-common.o CC m68k-softmmu/hw/m68k/mcf5208.o CC microblaze-softmmu/cpu-exec-common.o CC microblaze-softmmu/tcg/tcg.o CC m68k-softmmu/hw/m68k/mcf5206.o CC microblazeel-softmmu/tcg/tcg-common.o CC microblazeel-softmmu/fpu/softfloat.o CC m68k-softmmu/hw/m68k/mcf_intc.o CC aarch64-softmmu/target/arm/helper-a64.o CC m68k-softmmu/target/m68k/m68k-semi.o CC aarch64-softmmu/target/arm/gdbstub64.o CC m68k-softmmu/target/m68k/translate.o CC aarch64-softmmu/target/arm/crypto_helper.o CC microblaze-softmmu/tcg/tcg-op.o CC aarch64-softmmu/target/arm/arm-powerctl.o GEN trace/generated-helpers.c CC aarch64-softmmu/trace/control-target.o CC aarch64-softmmu/gdbstub-xml.o CC microblazeel-softmmu/disas.o CC aarch64-softmmu/trace/generated-helpers.o CC m68k-softmmu/target/m68k/op_helper.o CC microblazeel-softmmu/tcg-runtime.o LINK aarch64-softmmu/qemu-system-aarch64 CC microblazeel-softmmu/hax-stub.o CC microblaze-softmmu/tcg/optimize.o CC m68k-softmmu/target/m68k/helper.o CC microblazeel-softmmu/kvm-stub.o CC microblazeel-softmmu/arch_init.o CC m68k-softmmu/target/m68k/cpu.o CC microblazeel-softmmu/cpus.o CC microblaze-softmmu/tcg/tcg-common.o CC m68k-softmmu/target/m68k/gdbstub.o CC microblaze-softmmu/fpu/softfloat.o GEN trace/generated-helpers.c CC m68k-softmmu/trace/control-target.o CC microblazeel-softmmu/monitor.o CC m68k-softmmu/gdbstub-xml.o CC m68k-softmmu/trace/generated-helpers.o LINK m68k-softmmu/qemu-system-m68k GEN mips64el-softmmu/hmp-commands.h CC microblazeel-softmmu/gdbstub.o GEN mips64el-softmmu/hmp-commands-info.h GEN mips64el-softmmu/config-target.h CC mips64el-softmmu/exec.o CC microblazeel-softmmu/balloon.o CC microblazeel-softmmu/ioport.o CC microblaze-softmmu/disas.o CC microblazeel-softmmu/numa.o CC microblaze-softmmu/tcg-runtime.o CC microblazeel-softmmu/qtest.o CC microblaze-softmmu/hax-stub.o CC mips64el-softmmu/translate-all.o CC microblaze-softmmu/kvm-stub.o CC microblazeel-softmmu/bootdevice.o CC microblaze-softmmu/arch_init.o CC microblazeel-softmmu/memory.o CC mips64el-softmmu/cpu-exec.o CC microblaze-softmmu/cpus.o CC mips64el-softmmu/translate-common.o CC mips64el-softmmu/cpu-exec-common.o GEN mips64-softmmu/hmp-commands.h GEN mips64-softmmu/hmp-commands-info.h GEN mips64-softmmu/config-target.h CC mips64-softmmu/exec.o CC microblaze-softmmu/monitor.o CC mips64el-softmmu/tcg/tcg.o CC microblazeel-softmmu/cputlb.o CC microblaze-softmmu/gdbstub.o CC mips64-softmmu/translate-all.o CC microblazeel-softmmu/memory_mapping.o CC microblaze-softmmu/balloon.o CC mips64el-softmmu/tcg/tcg-op.o CC microblazeel-softmmu/dump.o CC mips64-softmmu/cpu-exec.o CC microblaze-softmmu/ioport.o CC mips64-softmmu/translate-common.o CC microblaze-softmmu/numa.o CC microblazeel-softmmu/migration/ram.o CC mips64-softmmu/cpu-exec-common.o CC microblaze-softmmu/qtest.o CC mips64-softmmu/tcg/tcg.o CC microblaze-softmmu/bootdevice.o CC microblaze-softmmu/memory.o CC microblazeel-softmmu/migration/savevm.o CC mips64el-softmmu/tcg/optimize.o CC microblazeel-softmmu/xen-common-stub.o CC microblaze-softmmu/cputlb.o CC microblazeel-softmmu/xen-hvm-stub.o CC mips64-softmmu/tcg/tcg-op.o CC microblazeel-softmmu/hw/core/nmi.o CC microblazeel-softmmu/hw/core/generic-loader.o CC microblazeel-softmmu/hw/core/null-machine.o CC mips64el-softmmu/tcg/tcg-common.o CC microblazeel-softmmu/hw/cpu/core.o CC mips64el-softmmu/fpu/softfloat.o CC microblazeel-softmmu/hw/net/xilinx_ethlite.o CC microblaze-softmmu/memory_mapping.o CC microblaze-softmmu/dump.o CC microblazeel-softmmu/hw/net/vhost_net.o CC microblazeel-softmmu/hw/net/rocker/qmp-norocker.o CC microblaze-softmmu/migration/ram.o CC microblazeel-softmmu/hw/vfio/common.o CC mips64-softmmu/tcg/optimize.o CC microblazeel-softmmu/hw/vfio/platform.o CC microblaze-softmmu/migration/savevm.o CC microblazeel-softmmu/hw/vfio/spapr.o CC mips64el-softmmu/disas.o CC microblazeel-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o CC mips64-softmmu/tcg/tcg-common.o CC mips64el-softmmu/tcg-runtime.o CC microblaze-softmmu/xen-common-stub.o CC microblazeel-softmmu/hw/microblaze/petalogix_ml605_mmu.o CC mips64-softmmu/fpu/softfloat.o CC microblaze-softmmu/xen-hvm-stub.o CC mips64el-softmmu/hax-stub.o CC microblaze-softmmu/hw/core/nmi.o CC microblazeel-softmmu/hw/microblaze/boot.o CC microblaze-softmmu/hw/core/generic-loader.o CC mips64el-softmmu/kvm-stub.o CC microblazeel-softmmu/target/microblaze/translate.o CC microblaze-softmmu/hw/core/null-machine.o CC mips64el-softmmu/arch_init.o CC microblaze-softmmu/hw/cpu/core.o CC mips64el-softmmu/cpus.o CC microblaze-softmmu/hw/net/xilinx_ethlite.o CC microblazeel-softmmu/target/microblaze/op_helper.o CC microblaze-softmmu/hw/net/vhost_net.o CC mips64el-softmmu/monitor.o CC microblaze-softmmu/hw/net/rocker/qmp-norocker.o CC microblazeel-softmmu/target/microblaze/helper.o CC microblaze-softmmu/hw/vfio/common.o CC mips64-softmmu/disas.o CC microblazeel-softmmu/target/microblaze/cpu.o CC mips64-softmmu/tcg-runtime.o CC microblazeel-softmmu/target/microblaze/gdbstub.o CC microblaze-softmmu/hw/vfio/platform.o CC mips64-softmmu/hax-stub.o CC mips64el-softmmu/gdbstub.o CC microblazeel-softmmu/target/microblaze/mmu.o CC mips64-softmmu/kvm-stub.o CC microblaze-softmmu/hw/vfio/spapr.o GEN trace/generated-helpers.c CC microblazeel-softmmu/trace/control-target.o CC mips64el-softmmu/balloon.o CC microblaze-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o CC mips64-softmmu/arch_init.o CC microblazeel-softmmu/trace/generated-helpers.o CC mips64el-softmmu/ioport.o CC microblaze-softmmu/hw/microblaze/petalogix_ml605_mmu.o CC mips64-softmmu/cpus.o LINK microblazeel-softmmu/qemu-system-microblazeel CC microblaze-softmmu/hw/microblaze/boot.o CC mips64el-softmmu/numa.o CC microblaze-softmmu/target/microblaze/translate.o CC mips64-softmmu/monitor.o CC mips64el-softmmu/qtest.o CC mips64el-softmmu/bootdevice.o CC microblaze-softmmu/target/microblaze/op_helper.o CC microblaze-softmmu/target/microblaze/helper.o CC mips64el-softmmu/memory.o CC microblaze-softmmu/target/microblaze/cpu.o CC microblaze-softmmu/target/microblaze/gdbstub.o CC mips64-softmmu/gdbstub.o CC microblaze-softmmu/target/microblaze/mmu.o CC mips64el-softmmu/cputlb.o GEN mipsel-softmmu/hmp-commands.h GEN trace/generated-helpers.c CC microblaze-softmmu/trace/control-target.o GEN mipsel-softmmu/hmp-commands-info.h GEN mipsel-softmmu/config-target.h CC mips64-softmmu/balloon.o CC mipsel-softmmu/exec.o CC mips64-softmmu/ioport.o CC microblaze-softmmu/trace/generated-helpers.o LINK microblaze-softmmu/qemu-system-microblaze CC mips64-softmmu/numa.o CC mips64el-softmmu/memory_mapping.o CC mips64-softmmu/qtest.o CC mips64el-softmmu/dump.o CC mips64-softmmu/bootdevice.o CC mips64el-softmmu/migration/ram.o CC mips64-softmmu/memory.o CC mips64el-softmmu/migration/savevm.o CC mipsel-softmmu/translate-all.o CC mipsel-softmmu/cpu-exec.o CC mips64-softmmu/cputlb.o CC mips64el-softmmu/xen-common-stub.o CC mipsel-softmmu/translate-common.o CC mips64el-softmmu/xen-hvm-stub.o GEN mips-softmmu/hmp-commands.h CC mipsel-softmmu/cpu-exec-common.o CC mips64el-softmmu/hw/9pfs/virtio-9p-device.o GEN mips-softmmu/hmp-commands-info.h GEN mips-softmmu/config-target.h CC mips-softmmu/exec.o CC mips64el-softmmu/hw/block/virtio-blk.o CC mipsel-softmmu/tcg/tcg.o CC mips64-softmmu/memory_mapping.o CC mips64el-softmmu/hw/block/dataplane/virtio-blk.o CC mips64-softmmu/dump.o CC mips64el-softmmu/hw/char/virtio-serial-bus.o CC mips64-softmmu/migration/ram.o CC mips64el-softmmu/hw/core/nmi.o CC mips-softmmu/translate-all.o CC mips64el-softmmu/hw/core/generic-loader.o CC mipsel-softmmu/tcg/tcg-op.o CC mips64-softmmu/migration/savevm.o CC mips64el-softmmu/hw/core/null-machine.o CC mips64el-softmmu/hw/cpu/core.o CC mips-softmmu/cpu-exec.o CC mips64el-softmmu/hw/display/vga.o CC mips-softmmu/translate-common.o CC mips64-softmmu/xen-common-stub.o CC mips-softmmu/cpu-exec-common.o CC mips64-softmmu/xen-hvm-stub.o CC mips-softmmu/tcg/tcg.o CC mips64el-softmmu/hw/display/virtio-gpu.o CC mips64-softmmu/hw/9pfs/virtio-9p-device.o CC mips64-softmmu/hw/block/virtio-blk.o CC mipsel-softmmu/tcg/optimize.o CC mips64-softmmu/hw/block/dataplane/virtio-blk.o CC mips64el-softmmu/hw/display/virtio-gpu-3d.o CC mips64-softmmu/hw/char/virtio-serial-bus.o CC mips64-softmmu/hw/core/nmi.o CC mips64el-softmmu/hw/display/virtio-gpu-pci.o CC mipsel-softmmu/tcg/tcg-common.o CC mips-softmmu/tcg/tcg-op.o CC mips64-softmmu/hw/core/generic-loader.o CC mipsel-softmmu/fpu/softfloat.o CC mips64-softmmu/hw/core/null-machine.o CC mips64el-softmmu/hw/intc/mips_gic.o CC mips64-softmmu/hw/cpu/core.o CC mips64el-softmmu/hw/misc/ivshmem.o CC mips64-softmmu/hw/display/vga.o CC mips64el-softmmu/hw/misc/mips_cmgcr.o CC mips64el-softmmu/hw/misc/mips_cpc.o CC mips64-softmmu/hw/display/virtio-gpu.o CC mips64el-softmmu/hw/misc/mips_itu.o CC mips-softmmu/tcg/optimize.o CC mipsel-softmmu/disas.o CC mips64el-softmmu/hw/misc/edu.o CC mipsel-softmmu/tcg-runtime.o CC mips64-softmmu/hw/display/virtio-gpu-3d.o CC mips64el-softmmu/hw/net/virtio-net.o CC mipsel-softmmu/hax-stub.o CC mips-softmmu/tcg/tcg-common.o CC mipsel-softmmu/kvm-stub.o CC mips-softmmu/fpu/softfloat.o CC mips64el-softmmu/hw/net/vhost_net.o CC mips64-softmmu/hw/display/virtio-gpu-pci.o CC mipsel-softmmu/arch_init.o CC mips64el-softmmu/hw/scsi/virtio-scsi.o CC mips64-softmmu/hw/intc/mips_gic.o CC mips64-softmmu/hw/misc/ivshmem.o CC mipsel-softmmu/cpus.o CC mips64el-softmmu/hw/scsi/virtio-scsi-dataplane.o CC mips64el-softmmu/hw/scsi/vhost-scsi.o CC mips64-softmmu/hw/misc/mips_cmgcr.o CC mipsel-softmmu/monitor.o CC mips64el-softmmu/hw/timer/mips_gictimer.o CC mips64el-softmmu/hw/timer/mc146818rtc.o CC mips64-softmmu/hw/misc/mips_cpc.o CC mips64-softmmu/hw/misc/mips_itu.o CC mips64el-softmmu/hw/vfio/common.o CC mips-softmmu/disas.o CC mips64-softmmu/hw/misc/edu.o CC mipsel-softmmu/gdbstub.o CC mips-softmmu/tcg-runtime.o CC mips64-softmmu/hw/net/virtio-net.o CC mips64el-softmmu/hw/vfio/pci.o CC mips-softmmu/hax-stub.o CC mipsel-softmmu/balloon.o CC mips-softmmu/kvm-stub.o CC mips64-softmmu/hw/net/vhost_net.o CC mipsel-softmmu/ioport.o CC mips-softmmu/arch_init.o CC mips64el-softmmu/hw/vfio/pci-quirks.o CC mips64-softmmu/hw/scsi/virtio-scsi.o CC mipsel-softmmu/numa.o CC mips-softmmu/cpus.o CC mipsel-softmmu/qtest.o CC mips64-softmmu/hw/scsi/virtio-scsi-dataplane.o CC mips64el-softmmu/hw/vfio/platform.o CC mips-softmmu/monitor.o CC mips64-softmmu/hw/scsi/vhost-scsi.o CC mips64el-softmmu/hw/vfio/spapr.o CC mipsel-softmmu/bootdevice.o CC mips64-softmmu/hw/timer/mips_gictimer.o CC mipsel-softmmu/memory.o CC mips64el-softmmu/hw/virtio/virtio.o CC mips64-softmmu/hw/timer/mc146818rtc.o CC mips-softmmu/gdbstub.o CC mips64-softmmu/hw/vfio/common.o CC mips64el-softmmu/hw/virtio/virtio-balloon.o CC mipsel-softmmu/cputlb.o CC mips64-softmmu/hw/vfio/pci.o CC mips64el-softmmu/hw/virtio/vhost.o CC mips-softmmu/balloon.o CC mips-softmmu/ioport.o CC mips64el-softmmu/hw/virtio/vhost-backend.o CC mips-softmmu/numa.o CC mips64-softmmu/hw/vfio/pci-quirks.o CC mips64el-softmmu/hw/virtio/vhost-user.o CC mipsel-softmmu/memory_mapping.o CC mips-softmmu/qtest.o CC mipsel-softmmu/dump.o CC mips64el-softmmu/hw/virtio/vhost-vsock.o CC mips64-softmmu/hw/vfio/platform.o CC mips-softmmu/bootdevice.o CC mips64-softmmu/hw/vfio/spapr.o CC mips64el-softmmu/hw/virtio/virtio-crypto.o CC mips-softmmu/memory.o CC mipsel-softmmu/migration/ram.o CC mips64-softmmu/hw/virtio/virtio.o CC mips64el-softmmu/hw/virtio/virtio-crypto-pci.o CC mipsel-softmmu/migration/savevm.o CC mips64el-softmmu/hw/mips/mips_r4k.o CC mips-softmmu/cputlb.o CC mips64-softmmu/hw/virtio/virtio-balloon.o CC mips64el-softmmu/hw/mips/mips_malta.o CC mips64-softmmu/hw/virtio/vhost.o CC mipsel-softmmu/xen-common-stub.o CC mips64el-softmmu/hw/mips/mips_mipssim.o CC mipsel-softmmu/xen-hvm-stub.o CC mips64-softmmu/hw/virtio/vhost-backend.o CC mips64el-softmmu/hw/mips/addr.o CC mipsel-softmmu/hw/9pfs/virtio-9p-device.o CC mips64-softmmu/hw/virtio/vhost-user.o CC mips-softmmu/memory_mapping.o CC mips64el-softmmu/hw/mips/cputimer.o CC mips64el-softmmu/hw/mips/mips_int.o CC mips-softmmu/dump.o CC mipsel-softmmu/hw/block/virtio-blk.o CC mips64-softmmu/hw/virtio/vhost-vsock.o CC mips64el-softmmu/hw/mips/mips_jazz.o CC mipsel-softmmu/hw/block/dataplane/virtio-blk.o CC mips64-softmmu/hw/virtio/virtio-crypto.o CC mips-softmmu/migration/ram.o CC mips64el-softmmu/hw/mips/mips_fulong2e.o CC mipsel-softmmu/hw/char/virtio-serial-bus.o CC mips64el-softmmu/hw/mips/gt64xxx_pci.o CC mips64-softmmu/hw/virtio/virtio-crypto-pci.o CC mips64el-softmmu/hw/mips/cps.o CC mips64-softmmu/hw/mips/mips_r4k.o CC mips-softmmu/migration/savevm.o CC mipsel-softmmu/hw/core/nmi.o CC mips64el-softmmu/hw/mips/boston.o CC mipsel-softmmu/hw/core/generic-loader.o CC mips64-softmmu/hw/mips/mips_malta.o CC mips64el-softmmu/target/mips/translate.o CC mipsel-softmmu/hw/core/null-machine.o CC mips64-softmmu/hw/mips/mips_mipssim.o CC mips-softmmu/xen-common-stub.o CC mips64-softmmu/hw/mips/addr.o CC mipsel-softmmu/hw/cpu/core.o CC mips-softmmu/xen-hvm-stub.o CC mipsel-softmmu/hw/display/vga.o CC mips64-softmmu/hw/mips/cputimer.o CC mips-softmmu/hw/9pfs/virtio-9p-device.o CC mips64-softmmu/hw/mips/mips_int.o CC mips-softmmu/hw/block/virtio-blk.o CC mipsel-softmmu/hw/display/virtio-gpu.o CC mips64-softmmu/hw/mips/mips_jazz.o CC mips-softmmu/hw/block/dataplane/virtio-blk.o CC mipsel-softmmu/hw/display/virtio-gpu-3d.o CC mips64-softmmu/hw/mips/gt64xxx_pci.o CC mips64-softmmu/hw/mips/cps.o CC mips-softmmu/hw/char/virtio-serial-bus.o CC mips64-softmmu/target/mips/translate.o CC mipsel-softmmu/hw/display/virtio-gpu-pci.o CC mips-softmmu/hw/core/nmi.o CC mips-softmmu/hw/core/generic-loader.o CC mipsel-softmmu/hw/intc/mips_gic.o CC mips-softmmu/hw/core/null-machine.o CC mipsel-softmmu/hw/misc/ivshmem.o CC mips-softmmu/hw/cpu/core.o CC mipsel-softmmu/hw/misc/mips_cmgcr.o CC mips-softmmu/hw/display/vga.o CC mipsel-softmmu/hw/misc/mips_cpc.o CC mipsel-softmmu/hw/misc/mips_itu.o CC mips-softmmu/hw/display/virtio-gpu.o CC mipsel-softmmu/hw/misc/edu.o CC mips64el-softmmu/target/mips/dsp_helper.o CC mipsel-softmmu/hw/net/virtio-net.o CC mips-softmmu/hw/display/virtio-gpu-3d.o CC mipsel-softmmu/hw/net/vhost_net.o CC mips-softmmu/hw/display/virtio-gpu-pci.o CC mipsel-softmmu/hw/scsi/virtio-scsi.o CC mips64el-softmmu/target/mips/op_helper.o CC mipsel-softmmu/hw/scsi/virtio-scsi-dataplane.o CC mips-softmmu/hw/intc/mips_gic.o CC mipsel-softmmu/hw/scsi/vhost-scsi.o CC mips-softmmu/hw/misc/ivshmem.o CC mipsel-softmmu/hw/timer/mips_gictimer.o CC mipsel-softmmu/hw/timer/mc146818rtc.o CC mips-softmmu/hw/misc/mips_cmgcr.o CC mipsel-softmmu/hw/vfio/common.o CC mips-softmmu/hw/misc/mips_cpc.o CC mips64-softmmu/target/mips/dsp_helper.o CC mips-softmmu/hw/misc/mips_itu.o CC mipsel-softmmu/hw/vfio/pci.o CC mips64el-softmmu/target/mips/lmi_helper.o CC mips-softmmu/hw/misc/edu.o CC mips64el-softmmu/target/mips/helper.o CC mips-softmmu/hw/net/virtio-net.o CC mipsel-softmmu/hw/vfio/pci-quirks.o CC mips64el-softmmu/target/mips/cpu.o CC mips64-softmmu/target/mips/op_helper.o CC mips64el-softmmu/target/mips/gdbstub.o CC mips-softmmu/hw/net/vhost_net.o CC mipsel-softmmu/hw/vfio/platform.o CC mips64el-softmmu/target/mips/msa_helper.o CC mips-softmmu/hw/scsi/virtio-scsi.o CC mipsel-softmmu/hw/vfio/spapr.o CC mips-softmmu/hw/scsi/virtio-scsi-dataplane.o CC mipsel-softmmu/hw/virtio/virtio.o CC mips-softmmu/hw/scsi/vhost-scsi.o CC mips-softmmu/hw/timer/mips_gictimer.o CC mips-softmmu/hw/timer/mc146818rtc.o CC mipsel-softmmu/hw/virtio/virtio-balloon.o CC mips64-softmmu/target/mips/lmi_helper.o CC mips-softmmu/hw/vfio/common.o CC mipsel-softmmu/hw/virtio/vhost.o CC mips64-softmmu/target/mips/helper.o CC mips-softmmu/hw/vfio/pci.o CC mipsel-softmmu/hw/virtio/vhost-backend.o CC mips64-softmmu/target/mips/cpu.o CC mips64-softmmu/target/mips/gdbstub.o CC mipsel-softmmu/hw/virtio/vhost-user.o CC mips64-softmmu/target/mips/msa_helper.o CC mips64el-softmmu/target/mips/mips-semi.o CC mipsel-softmmu/hw/virtio/vhost-vsock.o CC mips-softmmu/hw/vfio/pci-quirks.o CC mipsel-softmmu/hw/virtio/virtio-crypto.o CC mips64el-softmmu/target/mips/machine.o CC mips-softmmu/hw/vfio/platform.o GEN trace/generated-helpers.c CC mips64el-softmmu/trace/control-target.o CC mipsel-softmmu/hw/virtio/virtio-crypto-pci.o CC mips-softmmu/hw/vfio/spapr.o CC mipsel-softmmu/hw/mips/mips_r4k.o CC mips64el-softmmu/trace/generated-helpers.o CC mips-softmmu/hw/virtio/virtio.o CC mipsel-softmmu/hw/mips/mips_malta.o LINK mips64el-softmmu/qemu-system-mips64el CC mipsel-softmmu/hw/mips/mips_mipssim.o CC mips-softmmu/hw/virtio/virtio-balloon.o CC mipsel-softmmu/hw/mips/addr.o CC mipsel-softmmu/hw/mips/cputimer.o CC mips-softmmu/hw/virtio/vhost.o CC mipsel-softmmu/hw/mips/mips_int.o CC mipsel-softmmu/hw/mips/gt64xxx_pci.o CC mips64-softmmu/target/mips/mips-semi.o CC mipsel-softmmu/hw/mips/cps.o CC mips-softmmu/hw/virtio/vhost-backend.o CC mips-softmmu/hw/virtio/vhost-user.o CC mips64-softmmu/target/mips/machine.o CC mipsel-softmmu/target/mips/translate.o CC mipsel-softmmu/target/mips/dsp_helper.o GEN trace/generated-helpers.c CC mips-softmmu/hw/virtio/vhost-vsock.o CC mips64-softmmu/trace/control-target.o CC mips64-softmmu/trace/generated-helpers.o CC mips-softmmu/hw/virtio/virtio-crypto.o LINK mips64-softmmu/qemu-system-mips64 CC mips-softmmu/hw/virtio/virtio-crypto-pci.o CC mips-softmmu/hw/mips/mips_r4k.o GEN moxie-softmmu/hmp-commands.h GEN moxie-softmmu/hmp-commands-info.h GEN moxie-softmmu/config-target.h CC mips-softmmu/hw/mips/mips_malta.o CC moxie-softmmu/exec.o CC mipsel-softmmu/target/mips/op_helper.o CC mips-softmmu/hw/mips/mips_mipssim.o CC mips-softmmu/hw/mips/addr.o CC mips-softmmu/hw/mips/cputimer.o CC mips-softmmu/hw/mips/mips_int.o CC mips-softmmu/hw/mips/gt64xxx_pci.o CC mips-softmmu/hw/mips/cps.o CC moxie-softmmu/translate-all.o CC mipsel-softmmu/target/mips/lmi_helper.o CC mips-softmmu/target/mips/translate.o CC mipsel-softmmu/target/mips/helper.o CC moxie-softmmu/cpu-exec.o CC moxie-softmmu/translate-common.o CC mips-softmmu/target/mips/dsp_helper.o CC mipsel-softmmu/target/mips/cpu.o CC moxie-softmmu/cpu-exec-common.o CC mipsel-softmmu/target/mips/gdbstub.o CC moxie-softmmu/tcg/tcg.o CC mipsel-softmmu/target/mips/msa_helper.o CC mips-softmmu/target/mips/op_helper.o CC moxie-softmmu/tcg/tcg-op.o CC moxie-softmmu/tcg/optimize.o CC mips-softmmu/target/mips/lmi_helper.o CC mipsel-softmmu/target/mips/mips-semi.o CC moxie-softmmu/tcg/tcg-common.o CC mipsel-softmmu/target/mips/machine.o CC mips-softmmu/target/mips/helper.o CC moxie-softmmu/fpu/softfloat.o GEN trace/generated-helpers.c CC mipsel-softmmu/trace/control-target.o CC mips-softmmu/target/mips/cpu.o GEN nios2-softmmu/hmp-commands.h GEN nios2-softmmu/hmp-commands-info.h GEN nios2-softmmu/config-target.h CC nios2-softmmu/exec.o CC mipsel-softmmu/trace/generated-helpers.o CC mips-softmmu/target/mips/gdbstub.o LINK mipsel-softmmu/qemu-system-mipsel CC mips-softmmu/target/mips/msa_helper.o CC moxie-softmmu/disas.o GEN or1k-softmmu/hmp-commands.h GEN or1k-softmmu/hmp-commands-info.h GEN or1k-softmmu/config-target.h CC or1k-softmmu/exec.o CC nios2-softmmu/translate-all.o CC moxie-softmmu/tcg-runtime.o CC nios2-softmmu/cpu-exec.o CC moxie-softmmu/hax-stub.o CC nios2-softmmu/translate-common.o CC moxie-softmmu/kvm-stub.o CC moxie-softmmu/arch_init.o CC nios2-softmmu/cpu-exec-common.o CC or1k-softmmu/translate-all.o CC mips-softmmu/target/mips/mips-semi.o CC moxie-softmmu/cpus.o CC nios2-softmmu/tcg/tcg.o CC mips-softmmu/target/mips/machine.o CC or1k-softmmu/cpu-exec.o CC moxie-softmmu/monitor.o GEN trace/generated-helpers.c CC mips-softmmu/trace/control-target.o CC or1k-softmmu/translate-common.o CC mips-softmmu/trace/generated-helpers.o CC or1k-softmmu/cpu-exec-common.o CC nios2-softmmu/tcg/tcg-op.o LINK mips-softmmu/qemu-system-mips CC or1k-softmmu/tcg/tcg.o CC moxie-softmmu/gdbstub.o CC moxie-softmmu/balloon.o CC moxie-softmmu/ioport.o CC or1k-softmmu/tcg/tcg-op.o CC moxie-softmmu/numa.o CC nios2-softmmu/tcg/optimize.o GEN ppc64-softmmu/hmp-commands.h GEN ppc64-softmmu/hmp-commands-info.h GEN ppc64-softmmu/config-target.h CC moxie-softmmu/qtest.o CC ppc64-softmmu/exec.o CC nios2-softmmu/tcg/tcg-common.o CC nios2-softmmu/fpu/softfloat.o CC moxie-softmmu/bootdevice.o CC or1k-softmmu/tcg/optimize.o CC moxie-softmmu/memory.o CC or1k-softmmu/tcg/tcg-common.o CC moxie-softmmu/cputlb.o CC or1k-softmmu/fpu/softfloat.o CC ppc64-softmmu/translate-all.o CC ppc64-softmmu/cpu-exec.o CC nios2-softmmu/disas.o CC moxie-softmmu/memory_mapping.o CC ppc64-softmmu/translate-common.o CC moxie-softmmu/dump.o CC ppc64-softmmu/cpu-exec-common.o CC nios2-softmmu/tcg-runtime.o CC ppc64-softmmu/tcg/tcg.o CC nios2-softmmu/hax-stub.o CC moxie-softmmu/migration/ram.o CC nios2-softmmu/kvm-stub.o CC or1k-softmmu/disas.o CC nios2-softmmu/arch_init.o CC moxie-softmmu/migration/savevm.o CC or1k-softmmu/tcg-runtime.o CC nios2-softmmu/cpus.o CC or1k-softmmu/hax-stub.o CC moxie-softmmu/xen-common-stub.o CC or1k-softmmu/kvm-stub.o CC ppc64-softmmu/tcg/tcg-op.o CC moxie-softmmu/xen-hvm-stub.o CC nios2-softmmu/monitor.o CC moxie-softmmu/hw/core/nmi.o CC or1k-softmmu/arch_init.o CC moxie-softmmu/hw/core/generic-loader.o CC or1k-softmmu/cpus.o CC moxie-softmmu/hw/core/null-machine.o CC moxie-softmmu/hw/cpu/core.o CC nios2-softmmu/gdbstub.o CC or1k-softmmu/monitor.o CC moxie-softmmu/hw/display/vga.o CC nios2-softmmu/balloon.o CC ppc64-softmmu/tcg/optimize.o CC nios2-softmmu/ioport.o CC moxie-softmmu/hw/net/vhost_net.o CC nios2-softmmu/numa.o CC or1k-softmmu/gdbstub.o CC moxie-softmmu/hw/net/rocker/qmp-norocker.o CC ppc64-softmmu/tcg/tcg-common.o CC nios2-softmmu/qtest.o CC or1k-softmmu/balloon.o CC moxie-softmmu/hw/timer/mc146818rtc.o CC ppc64-softmmu/fpu/softfloat.o CC or1k-softmmu/ioport.o CC nios2-softmmu/bootdevice.o CC moxie-softmmu/hw/vfio/common.o CC nios2-softmmu/memory.o CC or1k-softmmu/numa.o CC moxie-softmmu/hw/vfio/platform.o CC or1k-softmmu/qtest.o CC moxie-softmmu/hw/vfio/spapr.o CC nios2-softmmu/cputlb.o CC or1k-softmmu/bootdevice.o CC moxie-softmmu/hw/moxie/moxiesim.o CC or1k-softmmu/memory.o CC ppc64-softmmu/disas.o CC moxie-softmmu/target/moxie/translate.o CC ppc64-softmmu/tcg-runtime.o GEN ppc64-softmmu/gdbstub-xml.c CC moxie-softmmu/target/moxie/helper.o CC nios2-softmmu/memory_mapping.o CC moxie-softmmu/target/moxie/machine.o CC moxie-softmmu/target/moxie/cpu.o CC nios2-softmmu/dump.o CC or1k-softmmu/cputlb.o CC moxie-softmmu/target/moxie/mmu.o CC ppc64-softmmu/hax-stub.o CC nios2-softmmu/migration/ram.o GEN trace/generated-helpers.c CC ppc64-softmmu/kvm-stub.o CC moxie-softmmu/trace/control-target.o CC ppc64-softmmu/libdecnumber/decContext.o CC moxie-softmmu/trace/generated-helpers.o CC nios2-softmmu/migration/savevm.o CC or1k-softmmu/memory_mapping.o CC ppc64-softmmu/libdecnumber/decNumber.o LINK moxie-softmmu/qemu-system-moxie CC or1k-softmmu/dump.o CC nios2-softmmu/xen-common-stub.o CC nios2-softmmu/xen-hvm-stub.o CC or1k-softmmu/migration/ram.o CC nios2-softmmu/hw/core/nmi.o CC ppc64-softmmu/libdecnumber/dpd/decimal32.o CC nios2-softmmu/hw/core/generic-loader.o CC nios2-softmmu/hw/core/null-machine.o CC ppc64-softmmu/libdecnumber/dpd/decimal64.o CC or1k-softmmu/migration/savevm.o CC nios2-softmmu/hw/cpu/core.o CC or1k-softmmu/xen-common-stub.o CC ppc64-softmmu/libdecnumber/dpd/decimal128.o CC nios2-softmmu/hw/intc/nios2_iic.o CC ppc64-softmmu/arch_init.o CC nios2-softmmu/hw/net/vhost_net.o CC nios2-softmmu/hw/net/rocker/qmp-norocker.o CC nios2-softmmu/hw/timer/altera_timer.o CC ppc64-softmmu/cpus.o CC or1k-softmmu/xen-hvm-stub.o CC nios2-softmmu/hw/vfio/common.o CC or1k-softmmu/hw/core/nmi.o GEN ppcemb-softmmu/hmp-commands.h CC ppc64-softmmu/monitor.o GEN ppcemb-softmmu/hmp-commands-info.h GEN ppcemb-softmmu/config-target.h CC or1k-softmmu/hw/core/generic-loader.o CC ppcemb-softmmu/exec.o CC nios2-softmmu/hw/vfio/platform.o CC or1k-softmmu/hw/core/null-machine.o CC or1k-softmmu/hw/cpu/core.o CC nios2-softmmu/hw/vfio/spapr.o CC or1k-softmmu/hw/net/vhost_net.o CC nios2-softmmu/hw/nios2/boot.o CC or1k-softmmu/hw/net/rocker/qmp-norocker.o CC ppc64-softmmu/gdbstub.o CC nios2-softmmu/hw/nios2/cpu_pic.o CC or1k-softmmu/hw/vfio/common.o CC nios2-softmmu/hw/nios2/10m50_devboard.o CC ppc64-softmmu/balloon.o CC nios2-softmmu/target/nios2/translate.o CC ppcemb-softmmu/translate-all.o CC or1k-softmmu/hw/vfio/platform.o CC ppc64-softmmu/ioport.o CC ppcemb-softmmu/cpu-exec.o CC or1k-softmmu/hw/vfio/spapr.o CC nios2-softmmu/target/nios2/op_helper.o CC ppc64-softmmu/numa.o CC ppcemb-softmmu/translate-common.o CC or1k-softmmu/hw/openrisc/pic_cpu.o CC nios2-softmmu/target/nios2/helper.o CC ppcemb-softmmu/cpu-exec-common.o CC ppc64-softmmu/qtest.o CC or1k-softmmu/hw/openrisc/cputimer.o CC ppcemb-softmmu/tcg/tcg.o CC nios2-softmmu/target/nios2/cpu.o CC or1k-softmmu/hw/openrisc/openrisc_sim.o CC ppc64-softmmu/bootdevice.o CC or1k-softmmu/target/openrisc/machine.o CC nios2-softmmu/target/nios2/mmu.o CC or1k-softmmu/target/openrisc/cpu.o CC ppc64-softmmu/memory.o CC nios2-softmmu/target/nios2/monitor.o CC or1k-softmmu/target/openrisc/exception.o CC or1k-softmmu/target/openrisc/interrupt.o GEN trace/generated-helpers.c CC nios2-softmmu/trace/control-target.o CC ppcemb-softmmu/tcg/tcg-op.o CC or1k-softmmu/target/openrisc/mmu.o CC ppc64-softmmu/cputlb.o CC nios2-softmmu/trace/generated-helpers.o CC or1k-softmmu/target/openrisc/translate.o LINK nios2-softmmu/qemu-system-nios2 CC or1k-softmmu/target/openrisc/exception_helper.o CC ppc64-softmmu/memory_mapping.o CC or1k-softmmu/target/openrisc/fpu_helper.o CC or1k-softmmu/target/openrisc/interrupt_helper.o CC ppc64-softmmu/dump.o CC or1k-softmmu/target/openrisc/mmu_helper.o CC ppc64-softmmu/migration/ram.o CC or1k-softmmu/target/openrisc/sys_helper.o CC ppcemb-softmmu/tcg/optimize.o CC or1k-softmmu/target/openrisc/gdbstub.o GEN trace/generated-helpers.c GEN ppc-softmmu/hmp-commands.h CC or1k-softmmu/trace/control-target.o GEN ppc-softmmu/hmp-commands-info.h GEN ppc-softmmu/config-target.h CC ppc64-softmmu/migration/savevm.o CC ppc-softmmu/exec.o CC or1k-softmmu/trace/generated-helpers.o CC ppcemb-softmmu/tcg/tcg-common.o LINK or1k-softmmu/qemu-system-or1k CC ppc64-softmmu/xen-common-stub.o CC ppcemb-softmmu/fpu/softfloat.o CC ppc64-softmmu/xen-hvm-stub.o CC ppc64-softmmu/hw/9pfs/virtio-9p-device.o CC ppc64-softmmu/hw/block/virtio-blk.o CC ppc-softmmu/translate-all.o CC ppcemb-softmmu/disas.o CC ppc64-softmmu/hw/block/dataplane/virtio-blk.o CC ppc-softmmu/cpu-exec.o CC ppc64-softmmu/hw/char/spapr_vty.o CC ppc-softmmu/translate-common.o GEN s390x-softmmu/hmp-commands.h CC ppc64-softmmu/hw/char/virtio-serial-bus.o GEN s390x-softmmu/hmp-commands-info.h CC s390x-softmmu/gen-features CC ppcemb-softmmu/tcg-runtime.o CC ppc-softmmu/cpu-exec-common.o GEN s390x-softmmu/config-target.h GEN s390x-softmmu/gen-features.h CC s390x-softmmu/exec.o CC ppc-softmmu/tcg/tcg.o GEN ppcemb-softmmu/gdbstub-xml.c CC ppc64-softmmu/hw/core/nmi.o CC ppc64-softmmu/hw/core/generic-loader.o CC ppcemb-softmmu/hax-stub.o CC ppc64-softmmu/hw/core/null-machine.o CC ppc-softmmu/tcg/tcg-op.o CC ppcemb-softmmu/kvm-stub.o CC ppc64-softmmu/hw/cpu/core.o CC s390x-softmmu/translate-all.o CC ppcemb-softmmu/libdecnumber/decContext.o CC ppc64-softmmu/hw/display/vga.o CC s390x-softmmu/cpu-exec.o CC ppcemb-softmmu/libdecnumber/decNumber.o CC s390x-softmmu/translate-common.o CC s390x-softmmu/cpu-exec-common.o CC s390x-softmmu/tcg/tcg.o CC ppc64-softmmu/hw/display/virtio-gpu.o CC ppc64-softmmu/hw/display/virtio-gpu-3d.o CC ppcemb-softmmu/libdecnumber/dpd/decimal32.o CC ppc-softmmu/tcg/optimize.o CC ppcemb-softmmu/libdecnumber/dpd/decimal64.o CC s390x-softmmu/tcg/tcg-op.o CC ppcemb-softmmu/libdecnumber/dpd/decimal128.o CC ppc64-softmmu/hw/display/virtio-gpu-pci.o CC ppcemb-softmmu/arch_init.o CC ppc64-softmmu/hw/display/virtio-vga.o CC ppc-softmmu/tcg/tcg-common.o CC ppcemb-softmmu/cpus.o CC ppc64-softmmu/hw/intc/xics.o CC ppc-softmmu/fpu/softfloat.o CC ppc64-softmmu/hw/intc/xics_spapr.o CC ppcemb-softmmu/monitor.o CC ppc64-softmmu/hw/misc/ivshmem.o CC ppc64-softmmu/hw/misc/edu.o CC s390x-softmmu/tcg/optimize.o CC ppc64-softmmu/hw/net/spapr_llan.o CC ppcemb-softmmu/gdbstub.o CC s390x-softmmu/tcg/tcg-common.o CC ppc64-softmmu/hw/net/xilinx_ethlite.o CC ppcemb-softmmu/balloon.o CC s390x-softmmu/fpu/softfloat.o CC ppc64-softmmu/hw/net/virtio-net.o CC ppc-softmmu/disas.o CC ppcemb-softmmu/ioport.o CC ppc-softmmu/tcg-runtime.o CC ppcemb-softmmu/numa.o GEN ppc-softmmu/gdbstub-xml.c CC ppcemb-softmmu/qtest.o CC ppc64-softmmu/hw/net/vhost_net.o CC ppcemb-softmmu/bootdevice.o CC ppc64-softmmu/hw/net/fsl_etsec/etsec.o CC ppc-softmmu/hax-stub.o CC ppc64-softmmu/hw/net/fsl_etsec/registers.o CC ppc-softmmu/kvm-stub.o CC ppcemb-softmmu/memory.o CC ppc-softmmu/libdecnumber/decContext.o CC ppc64-softmmu/hw/net/fsl_etsec/rings.o CC ppc-softmmu/libdecnumber/decNumber.o CC ppc64-softmmu/hw/net/fsl_etsec/miim.o CC s390x-softmmu/disas.o CC ppc64-softmmu/hw/nvram/spapr_nvram.o CC s390x-softmmu/tcg-runtime.o CC ppcemb-softmmu/cputlb.o CC ppc64-softmmu/hw/scsi/spapr_vscsi.o GEN s390x-softmmu/gdbstub-xml.c CC ppc64-softmmu/hw/scsi/virtio-scsi.o CC ppc64-softmmu/hw/scsi/virtio-scsi-dataplane.o CC ppc-softmmu/libdecnumber/dpd/decimal32.o CC ppc64-softmmu/hw/scsi/vhost-scsi.o CC s390x-softmmu/hax-stub.o CC ppc-softmmu/libdecnumber/dpd/decimal64.o CC ppc64-softmmu/hw/timer/mc146818rtc.o CC s390x-softmmu/arch_init.o CC ppcemb-softmmu/memory_mapping.o CC ppc-softmmu/libdecnumber/dpd/decimal128.o CC s390x-softmmu/cpus.o CC ppc64-softmmu/hw/vfio/common.o CC ppcemb-softmmu/dump.o CC ppc-softmmu/arch_init.o CC ppc64-softmmu/hw/vfio/pci.o CC s390x-softmmu/monitor.o CC ppc-softmmu/cpus.o CC ppcemb-softmmu/migration/ram.o CC ppc-softmmu/monitor.o CC ppc64-softmmu/hw/vfio/pci-quirks.o CC ppcemb-softmmu/migration/savevm.o CC s390x-softmmu/gdbstub.o CC ppc64-softmmu/hw/vfio/platform.o CC ppc-softmmu/gdbstub.o CC ppc64-softmmu/hw/vfio/spapr.o CC s390x-softmmu/balloon.o CC ppc64-softmmu/hw/virtio/virtio.o CC ppcemb-softmmu/xen-common-stub.o CC s390x-softmmu/ioport.o CC ppc-softmmu/balloon.o CC s390x-softmmu/numa.o CC ppcemb-softmmu/xen-hvm-stub.o CC ppc-softmmu/ioport.o CC s390x-softmmu/qtest.o CC ppcemb-softmmu/hw/9pfs/virtio-9p-device.o CC ppc-softmmu/numa.o CC ppc64-softmmu/hw/virtio/virtio-balloon.o CC s390x-softmmu/bootdevice.o CC ppcemb-softmmu/hw/block/virtio-blk.o CC s390x-softmmu/kvm-all.o CC ppc-softmmu/qtest.o CC ppc64-softmmu/hw/virtio/vhost.o CC ppcemb-softmmu/hw/block/dataplane/virtio-blk.o CC ppc-softmmu/bootdevice.o CC ppcemb-softmmu/hw/char/virtio-serial-bus.o CC s390x-softmmu/memory.o CC ppc-softmmu/memory.o CC ppc64-softmmu/hw/virtio/vhost-backend.o CC ppcemb-softmmu/hw/core/nmi.o CC ppc64-softmmu/hw/virtio/vhost-user.o CC ppcemb-softmmu/hw/core/generic-loader.o CC s390x-softmmu/cputlb.o CC ppc64-softmmu/hw/virtio/vhost-vsock.o CC ppc-softmmu/cputlb.o CC ppcemb-softmmu/hw/core/null-machine.o CC ppc64-softmmu/hw/virtio/virtio-crypto.o CC ppcemb-softmmu/hw/cpu/core.o CC ppc64-softmmu/hw/virtio/virtio-crypto-pci.o CC ppcemb-softmmu/hw/display/vga.o CC ppc64-softmmu/hw/ppc/ppc.o CC ppc64-softmmu/hw/ppc/ppc_booke.o CC ppcemb-softmmu/hw/display/virtio-gpu.o CC ppc64-softmmu/hw/ppc/fdt.o CC s390x-softmmu/memory_mapping.o CC ppc64-softmmu/hw/ppc/spapr.o CC ppc-softmmu/memory_mapping.o CC s390x-softmmu/dump.o CC ppcemb-softmmu/hw/display/virtio-gpu-3d.o CC ppc-softmmu/dump.o CC ppc64-softmmu/hw/ppc/spapr_vio.o CC s390x-softmmu/migration/ram.o CC ppc-softmmu/migration/ram.o CC ppcemb-softmmu/hw/display/virtio-gpu-pci.o CC ppc64-softmmu/hw/ppc/spapr_events.o CC ppcemb-softmmu/hw/misc/ivshmem.o CC s390x-softmmu/migration/savevm.o CC ppc64-softmmu/hw/ppc/spapr_hcall.o CC ppc-softmmu/migration/savevm.o CC ppcemb-softmmu/hw/misc/edu.o CC ppc64-softmmu/hw/ppc/spapr_iommu.o CC s390x-softmmu/xen-common-stub.o CC ppcemb-softmmu/hw/net/xilinx_ethlite.o CC ppc-softmmu/xen-common-stub.o CC s390x-softmmu/xen-hvm-stub.o CC ppc64-softmmu/hw/ppc/spapr_rtas.o CC ppcemb-softmmu/hw/net/virtio-net.o CC ppc-softmmu/xen-hvm-stub.o CC s390x-softmmu/hw/9pfs/virtio-9p-device.o CC ppc-softmmu/hw/9pfs/virtio-9p-device.o CC ppc64-softmmu/hw/ppc/spapr_pci.o CC s390x-softmmu/hw/block/virtio-blk.o CC ppc-softmmu/hw/block/virtio-blk.o CC ppcemb-softmmu/hw/net/vhost_net.o CC ppcemb-softmmu/hw/scsi/virtio-scsi.o CC s390x-softmmu/hw/block/dataplane/virtio-blk.o CC ppc64-softmmu/hw/ppc/spapr_rtc.o CC ppc-softmmu/hw/block/dataplane/virtio-blk.o CC s390x-softmmu/hw/char/virtio-serial-bus.o CC ppc64-softmmu/hw/ppc/spapr_drc.o CC ppcemb-softmmu/hw/scsi/virtio-scsi-dataplane.o CC ppc-softmmu/hw/char/virtio-serial-bus.o CC s390x-softmmu/hw/core/nmi.o CC ppcemb-softmmu/hw/scsi/vhost-scsi.o CC ppc64-softmmu/hw/ppc/spapr_rng.o CC ppc-softmmu/hw/core/nmi.o CC s390x-softmmu/hw/core/generic-loader.o CC ppc-softmmu/hw/core/generic-loader.o CC ppc64-softmmu/hw/ppc/spapr_cpu_core.o CC s390x-softmmu/hw/core/null-machine.o CC ppcemb-softmmu/hw/vfio/common.o CC ppc-softmmu/hw/core/null-machine.o CC s390x-softmmu/hw/cpu/core.o CC ppc64-softmmu/hw/ppc/spapr_ovec.o CC s390x-softmmu/hw/display/virtio-gpu.o CC ppc-softmmu/hw/cpu/core.o CC ppc64-softmmu/hw/ppc/pnv.o CC ppc-softmmu/hw/display/vga.o CC ppcemb-softmmu/hw/vfio/pci.o CC ppc64-softmmu/hw/ppc/pnv_xscom.o CC s390x-softmmu/hw/display/virtio-gpu-3d.o CC ppc64-softmmu/hw/ppc/pnv_core.o CC ppc-softmmu/hw/display/virtio-gpu.o CC ppc64-softmmu/hw/ppc/pnv_lpc.o CC ppcemb-softmmu/hw/vfio/pci-quirks.o CC s390x-softmmu/hw/display/virtio-gpu-pci.o CC ppc64-softmmu/hw/ppc/spapr_pci_vfio.o CC s390x-softmmu/hw/intc/s390_flic.o CC ppc64-softmmu/hw/ppc/spapr_rtas_ddw.o CC s390x-softmmu/hw/intc/s390_flic_kvm.o CC ppcemb-softmmu/hw/vfio/platform.o CC ppc-softmmu/hw/display/virtio-gpu-3d.o CC ppc64-softmmu/hw/ppc/ppc405_boards.o CC s390x-softmmu/hw/net/virtio-net.o CC ppcemb-softmmu/hw/vfio/spapr.o CC ppc64-softmmu/hw/ppc/ppc4xx_devs.o CC ppc-softmmu/hw/display/virtio-gpu-pci.o CC ppcemb-softmmu/hw/virtio/virtio.o CC ppc64-softmmu/hw/ppc/ppc405_uc.o CC s390x-softmmu/hw/net/vhost_net.o CC ppc-softmmu/hw/misc/ivshmem.o CC s390x-softmmu/hw/net/rocker/qmp-norocker.o CC ppc64-softmmu/hw/ppc/ppc440_bamboo.o CC ppc-softmmu/hw/misc/edu.o CC s390x-softmmu/hw/scsi/virtio-scsi.o CC ppcemb-softmmu/hw/virtio/virtio-balloon.o CC ppc-softmmu/hw/net/xilinx_ethlite.o CC s390x-softmmu/hw/scsi/virtio-scsi-dataplane.o CC ppc64-softmmu/hw/ppc/ppc4xx_pci.o CC s390x-softmmu/hw/scsi/vhost-scsi.o CC ppcemb-softmmu/hw/virtio/vhost.o CC ppc-softmmu/hw/net/virtio-net.o CC ppc64-softmmu/hw/ppc/prep.o CC s390x-softmmu/hw/vfio/common.o CC ppc-softmmu/hw/net/vhost_net.o CC ppc64-softmmu/hw/ppc/prep_systemio.o CC ppcemb-softmmu/hw/virtio/vhost-backend.o CC ppc-softmmu/hw/net/fsl_etsec/etsec.o CC s390x-softmmu/hw/vfio/pci.o CC ppcemb-softmmu/hw/virtio/vhost-user.o CC ppc64-softmmu/hw/ppc/rs6000_mc.o CC ppc-softmmu/hw/net/fsl_etsec/registers.o CC ppcemb-softmmu/hw/virtio/vhost-vsock.o CC ppc-softmmu/hw/net/fsl_etsec/rings.o CC ppc64-softmmu/hw/ppc/mac_oldworld.o CC ppcemb-softmmu/hw/virtio/virtio-crypto.o CC ppc-softmmu/hw/net/fsl_etsec/miim.o CC s390x-softmmu/hw/vfio/pci-quirks.o CC ppcemb-softmmu/hw/virtio/virtio-crypto-pci.o CC ppc64-softmmu/hw/ppc/mac_newworld.o CC ppc-softmmu/hw/scsi/virtio-scsi.o CC ppcemb-softmmu/hw/ppc/ppc.o CC ppc64-softmmu/hw/ppc/e500.o CC ppc-softmmu/hw/scsi/virtio-scsi-dataplane.o CC s390x-softmmu/hw/vfio/platform.o CC ppc-softmmu/hw/scsi/vhost-scsi.o CC ppcemb-softmmu/hw/ppc/ppc_booke.o CC ppc64-softmmu/hw/ppc/mpc8544ds.o CC s390x-softmmu/hw/vfio/spapr.o CC s390x-softmmu/hw/virtio/virtio.o CC ppc64-softmmu/hw/ppc/e500plat.o CC ppcemb-softmmu/hw/ppc/fdt.o CC ppc-softmmu/hw/timer/mc146818rtc.o CC ppc64-softmmu/hw/ppc/mpc8544_guts.o CC ppcemb-softmmu/hw/ppc/ppc405_boards.o CC ppc64-softmmu/hw/ppc/ppce500_spin.o CC ppc-softmmu/hw/vfio/common.o CC ppcemb-softmmu/hw/ppc/ppc4xx_devs.o CC s390x-softmmu/hw/virtio/virtio-balloon.o CC ppc64-softmmu/hw/ppc/virtex_ml507.o CC ppcemb-softmmu/hw/ppc/ppc405_uc.o CC ppc-softmmu/hw/vfio/pci.o CC ppc64-softmmu/target/ppc/cpu-models.o CC s390x-softmmu/hw/virtio/vhost.o CC ppcemb-softmmu/hw/ppc/ppc440_bamboo.o CC ppcemb-softmmu/hw/ppc/ppc4xx_pci.o CC s390x-softmmu/hw/virtio/vhost-backend.o CC ppcemb-softmmu/hw/ppc/virtex_ml507.o CC s390x-softmmu/hw/virtio/vhost-user.o CC ppcemb-softmmu/target/ppc/cpu-models.o CC ppc-softmmu/hw/vfio/pci-quirks.o CC s390x-softmmu/hw/virtio/vhost-vsock.o CC s390x-softmmu/hw/virtio/virtio-crypto.o CC ppc64-softmmu/target/ppc/translate.o CC ppc-softmmu/hw/vfio/platform.o CC s390x-softmmu/hw/virtio/virtio-crypto-pci.o CC ppc-softmmu/hw/vfio/spapr.o CC s390x-softmmu/hw/s390x/s390-virtio.o CC ppc-softmmu/hw/virtio/virtio.o CC ppcemb-softmmu/target/ppc/translate.o CC s390x-softmmu/hw/s390x/s390-virtio-hcall.o CC s390x-softmmu/hw/s390x/sclp.o CC s390x-softmmu/hw/s390x/event-facility.o CC s390x-softmmu/hw/s390x/sclpquiesce.o CC ppc-softmmu/hw/virtio/virtio-balloon.o CC s390x-softmmu/hw/s390x/sclpcpu.o CC ppc-softmmu/hw/virtio/vhost.o CC s390x-softmmu/hw/s390x/ipl.o CC s390x-softmmu/hw/s390x/css.o CC ppc-softmmu/hw/virtio/vhost-backend.o CC ppc-softmmu/hw/virtio/vhost-user.o CC s390x-softmmu/hw/s390x/s390-virtio-ccw.o CC ppc-softmmu/hw/virtio/vhost-vsock.o CC s390x-softmmu/hw/s390x/virtio-ccw.o CC ppc-softmmu/hw/virtio/virtio-crypto.o CC ppc-softmmu/hw/virtio/virtio-crypto-pci.o CC s390x-softmmu/hw/s390x/css-bridge.o CC ppc-softmmu/hw/ppc/ppc.o CC s390x-softmmu/hw/s390x/ccw-device.o CC s390x-softmmu/hw/s390x/s390-pci-bus.o CC ppc-softmmu/hw/ppc/ppc_booke.o CC ppc-softmmu/hw/ppc/fdt.o CC s390x-softmmu/hw/s390x/s390-pci-inst.o CC ppc-softmmu/hw/ppc/ppc405_boards.o CC s390x-softmmu/hw/s390x/s390-skeys.o CC ppc-softmmu/hw/ppc/ppc4xx_devs.o CC s390x-softmmu/hw/s390x/s390-skeys-kvm.o CC ppc-softmmu/hw/ppc/ppc405_uc.o CC s390x-softmmu/target/s390x/translate.o CC ppc-softmmu/hw/ppc/ppc440_bamboo.o CC ppc-softmmu/hw/ppc/ppc4xx_pci.o CC ppc-softmmu/hw/ppc/prep.o CC ppc-softmmu/hw/ppc/prep_systemio.o CC ppc-softmmu/hw/ppc/rs6000_mc.o CC s390x-softmmu/target/s390x/helper.o CC ppc-softmmu/hw/ppc/mac_oldworld.o CC s390x-softmmu/target/s390x/cpu.o CC ppc-softmmu/hw/ppc/mac_newworld.o CC ppcemb-softmmu/target/ppc/machine.o CC s390x-softmmu/target/s390x/interrupt.o CC ppc-softmmu/hw/ppc/e500.o CC s390x-softmmu/target/s390x/int_helper.o CC ppcemb-softmmu/target/ppc/mmu_helper.o CC ppc64-softmmu/target/ppc/machine.o CC s390x-softmmu/target/s390x/fpu_helper.o CC ppc-softmmu/hw/ppc/mpc8544ds.o CC ppc-softmmu/hw/ppc/e500plat.o CC ppc64-softmmu/target/ppc/mmu_helper.o CC ppc-softmmu/hw/ppc/mpc8544_guts.o CC ppcemb-softmmu/target/ppc/mmu-hash32.o CC s390x-softmmu/target/s390x/cc_helper.o CC ppc-softmmu/hw/ppc/ppce500_spin.o CC ppcemb-softmmu/target/ppc/monitor.o CC s390x-softmmu/target/s390x/mem_helper.o CC ppc-softmmu/hw/ppc/virtex_ml507.o CC ppcemb-softmmu/target/ppc/kvm-stub.o CC ppc64-softmmu/target/ppc/mmu-hash32.o CC ppcemb-softmmu/target/ppc/dfp_helper.o CC ppc-softmmu/target/ppc/cpu-models.o CC ppc64-softmmu/target/ppc/monitor.o CC s390x-softmmu/target/s390x/misc_helper.o CC ppcemb-softmmu/target/ppc/excp_helper.o CC ppc64-softmmu/target/ppc/mmu-hash64.o CC s390x-softmmu/target/s390x/gdbstub.o CC ppc64-softmmu/target/ppc/arch_dump.o CC ppcemb-softmmu/target/ppc/fpu_helper.o CC s390x-softmmu/target/s390x/cpu_models.o CC ppc64-softmmu/target/ppc/compat.o CC ppc-softmmu/target/ppc/translate.o CC s390x-softmmu/target/s390x/cpu_features.o CC ppc64-softmmu/target/ppc/kvm-stub.o CC s390x-softmmu/target/s390x/machine.o CC ppc64-softmmu/target/ppc/dfp_helper.o CC s390x-softmmu/target/s390x/ioinst.o CC s390x-softmmu/target/s390x/arch_dump.o CC ppc64-softmmu/target/ppc/excp_helper.o CC s390x-softmmu/target/s390x/mmu_helper.o CC s390x-softmmu/target/s390x/kvm.o CC ppc64-softmmu/target/ppc/fpu_helper.o GEN trace/generated-helpers.c CC s390x-softmmu/trace/control-target.o CC s390x-softmmu/gdbstub-xml.o CC ppcemb-softmmu/target/ppc/int_helper.o CC s390x-softmmu/trace/generated-helpers.o LINK s390x-softmmu/qemu-system-s390x CC ppcemb-softmmu/target/ppc/timebase_helper.o CC ppc-softmmu/target/ppc/machine.o CC ppcemb-softmmu/target/ppc/misc_helper.o CC ppc-softmmu/target/ppc/mmu_helper.o CC ppcemb-softmmu/target/ppc/mem_helper.o CC ppc64-softmmu/target/ppc/int_helper.o CC ppc64-softmmu/target/ppc/timebase_helper.o CC ppcemb-softmmu/target/ppc/gdbstub.o GEN trace/generated-helpers.c CC ppcemb-softmmu/trace/control-target.o CC ppcemb-softmmu/gdbstub-xml.o GEN sh4eb-softmmu/hmp-commands.h GEN sh4eb-softmmu/hmp-commands-info.h GEN sh4eb-softmmu/config-target.h CC sh4eb-softmmu/exec.o CC ppc64-softmmu/target/ppc/misc_helper.o CC ppcemb-softmmu/trace/generated-helpers.o CC ppc64-softmmu/target/ppc/mem_helper.o LINK ppcemb-softmmu/qemu-system-ppcemb CC ppc64-softmmu/target/ppc/gdbstub.o GEN trace/generated-helpers.c CC ppc64-softmmu/trace/control-target.o CC sh4eb-softmmu/translate-all.o CC ppc64-softmmu/gdbstub-xml.o CC sh4eb-softmmu/cpu-exec.o CC sh4eb-softmmu/translate-common.o CC ppc64-softmmu/trace/generated-helpers.o CC ppc-softmmu/target/ppc/mmu-hash32.o CC ppc-softmmu/target/ppc/monitor.o CC sh4eb-softmmu/cpu-exec-common.o CC sh4eb-softmmu/tcg/tcg.o LINK ppc64-softmmu/qemu-system-ppc64 CC ppc-softmmu/target/ppc/kvm-stub.o CC ppc-softmmu/target/ppc/dfp_helper.o CC sh4eb-softmmu/tcg/tcg-op.o CC ppc-softmmu/target/ppc/excp_helper.o CC ppc-softmmu/target/ppc/fpu_helper.o CC sh4eb-softmmu/tcg/optimize.o GEN sh4-softmmu/hmp-commands.h GEN sh4-softmmu/hmp-commands-info.h GEN sh4-softmmu/config-target.h CC sh4-softmmu/exec.o CC sh4eb-softmmu/tcg/tcg-common.o GEN sparc64-softmmu/hmp-commands.h CC sh4eb-softmmu/fpu/softfloat.o GEN sparc64-softmmu/hmp-commands-info.h GEN sparc64-softmmu/config-target.h CC sparc64-softmmu/exec.o CC sh4-softmmu/translate-all.o CC sh4-softmmu/cpu-exec.o CC sh4-softmmu/translate-common.o CC ppc-softmmu/target/ppc/int_helper.o CC sparc64-softmmu/translate-all.o CC sh4-softmmu/cpu-exec-common.o CC sh4eb-softmmu/disas.o CC sh4-softmmu/tcg/tcg.o CC sh4eb-softmmu/tcg-runtime.o CC sparc64-softmmu/cpu-exec.o CC sh4eb-softmmu/hax-stub.o CC sparc64-softmmu/translate-common.o CC sh4eb-softmmu/kvm-stub.o CC ppc-softmmu/target/ppc/timebase_helper.o CC sparc64-softmmu/cpu-exec-common.o CC ppc-softmmu/target/ppc/misc_helper.o CC sh4eb-softmmu/arch_init.o CC sparc64-softmmu/tcg/tcg.o CC sh4-softmmu/tcg/tcg-op.o CC ppc-softmmu/target/ppc/mem_helper.o CC sh4eb-softmmu/cpus.o CC sh4eb-softmmu/monitor.o CC ppc-softmmu/target/ppc/gdbstub.o GEN trace/generated-helpers.c CC sparc64-softmmu/tcg/tcg-op.o CC ppc-softmmu/trace/control-target.o CC ppc-softmmu/gdbstub-xml.o CC sh4-softmmu/tcg/optimize.o CC sh4eb-softmmu/gdbstub.o CC ppc-softmmu/trace/generated-helpers.o LINK ppc-softmmu/qemu-system-ppc CC sh4-softmmu/tcg/tcg-common.o CC sh4eb-softmmu/balloon.o CC sh4-softmmu/fpu/softfloat.o CC sh4eb-softmmu/ioport.o CC sh4eb-softmmu/numa.o CC sparc64-softmmu/tcg/optimize.o CC sh4eb-softmmu/qtest.o GEN sparc-softmmu/hmp-commands.h GEN sparc-softmmu/hmp-commands-info.h GEN sparc-softmmu/config-target.h CC sparc-softmmu/exec.o CC sparc64-softmmu/tcg/tcg-common.o CC sh4eb-softmmu/bootdevice.o CC sparc64-softmmu/fpu/softfloat.o CC sh4eb-softmmu/memory.o CC sh4-softmmu/disas.o CC sh4-softmmu/tcg-runtime.o CC sh4-softmmu/hax-stub.o CC sh4-softmmu/kvm-stub.o CC sh4eb-softmmu/cputlb.o CC sh4-softmmu/arch_init.o CC sparc-softmmu/translate-all.o CC sh4-softmmu/cpus.o CC sparc-softmmu/cpu-exec.o CC sparc-softmmu/translate-common.o CC sh4-softmmu/monitor.o CC sh4eb-softmmu/memory_mapping.o CC sparc-softmmu/cpu-exec-common.o CC sparc64-softmmu/disas.o CC sh4eb-softmmu/dump.o CC sparc-softmmu/tcg/tcg.o CC sparc64-softmmu/tcg-runtime.o CC sparc64-softmmu/hax-stub.o CC sh4-softmmu/gdbstub.o CC sh4eb-softmmu/migration/ram.o CC sparc64-softmmu/kvm-stub.o CC sh4-softmmu/balloon.o CC sparc64-softmmu/arch_init.o CC sh4-softmmu/ioport.o CC sparc64-softmmu/cpus.o CC sh4eb-softmmu/migration/savevm.o CC sparc-softmmu/tcg/tcg-op.o CC sh4-softmmu/numa.o CC sh4-softmmu/qtest.o CC sparc64-softmmu/monitor.o CC sh4eb-softmmu/xen-common-stub.o CC sh4-softmmu/bootdevice.o CC sh4eb-softmmu/xen-hvm-stub.o CC sh4-softmmu/memory.o CC sh4eb-softmmu/hw/9pfs/virtio-9p-device.o CC sh4eb-softmmu/hw/block/tc58128.o CC sparc64-softmmu/gdbstub.o CC sh4-softmmu/cputlb.o CC sh4eb-softmmu/hw/block/virtio-blk.o CC sparc-softmmu/tcg/optimize.o CC sparc64-softmmu/balloon.o CC sh4eb-softmmu/hw/block/dataplane/virtio-blk.o CC sparc64-softmmu/ioport.o CC sparc64-softmmu/numa.o CC sparc-softmmu/tcg/tcg-common.o CC sh4eb-softmmu/hw/char/sh_serial.o CC sparc-softmmu/fpu/softfloat.o CC sh4eb-softmmu/hw/char/virtio-serial-bus.o CC sparc64-softmmu/qtest.o CC sh4-softmmu/memory_mapping.o CC sh4eb-softmmu/hw/core/nmi.o CC sparc64-softmmu/bootdevice.o CC sh4-softmmu/dump.o CC sh4eb-softmmu/hw/core/generic-loader.o CC sparc64-softmmu/memory.o CC sh4eb-softmmu/hw/core/null-machine.o CC sh4-softmmu/migration/ram.o CC sh4eb-softmmu/hw/cpu/core.o CC sh4eb-softmmu/hw/display/sm501.o CC sparc64-softmmu/cputlb.o CC sh4-softmmu/migration/savevm.o CC sparc-softmmu/disas.o CC sh4eb-softmmu/hw/display/vga.o CC sparc-softmmu/tcg-runtime.o CC sh4-softmmu/xen-common-stub.o CC sparc-softmmu/hax-stub.o CC sh4eb-softmmu/hw/display/virtio-gpu.o CC sparc-softmmu/kvm-stub.o CC sh4-softmmu/xen-hvm-stub.o CC sparc64-softmmu/memory_mapping.o CC sparc-softmmu/arch_init.o CC sh4-softmmu/hw/9pfs/virtio-9p-device.o CC sparc64-softmmu/dump.o CC sparc-softmmu/cpus.o CC sh4-softmmu/hw/block/tc58128.o CC sh4eb-softmmu/hw/display/virtio-gpu-3d.o CC sh4-softmmu/hw/block/virtio-blk.o CC sparc-softmmu/monitor.o CC sparc64-softmmu/migration/ram.o CC sh4eb-softmmu/hw/display/virtio-gpu-pci.o CC sh4-softmmu/hw/block/dataplane/virtio-blk.o CC sparc64-softmmu/migration/savevm.o CC sh4eb-softmmu/hw/intc/sh_intc.o CC sh4-softmmu/hw/char/sh_serial.o CC sh4-softmmu/hw/char/virtio-serial-bus.o CC sparc-softmmu/gdbstub.o CC sh4eb-softmmu/hw/misc/ivshmem.o CC sparc64-softmmu/xen-common-stub.o CC sh4-softmmu/hw/core/nmi.o CC sh4eb-softmmu/hw/misc/edu.o CC sparc-softmmu/balloon.o CC sparc64-softmmu/xen-hvm-stub.o CC sh4-softmmu/hw/core/generic-loader.o CC sh4eb-softmmu/hw/net/virtio-net.o CC sparc64-softmmu/hw/9pfs/virtio-9p-device.o CC sparc-softmmu/ioport.o CC sh4-softmmu/hw/core/null-machine.o CC sparc-softmmu/numa.o CC sparc64-softmmu/hw/block/virtio-blk.o CC sh4-softmmu/hw/cpu/core.o CC sh4-softmmu/hw/display/sm501.o CC sparc-softmmu/qtest.o CC sh4eb-softmmu/hw/net/vhost_net.o CC sparc64-softmmu/hw/block/dataplane/virtio-blk.o CC sh4eb-softmmu/hw/scsi/virtio-scsi.o CC sparc64-softmmu/hw/char/virtio-serial-bus.o CC sparc-softmmu/bootdevice.o CC sh4-softmmu/hw/display/vga.o CC sparc-softmmu/memory.o CC sh4eb-softmmu/hw/scsi/virtio-scsi-dataplane.o CC sparc64-softmmu/hw/core/nmi.o CC sh4eb-softmmu/hw/scsi/vhost-scsi.o CC sparc64-softmmu/hw/core/generic-loader.o CC sh4-softmmu/hw/display/virtio-gpu.o CC sh4eb-softmmu/hw/timer/sh_timer.o CC sparc-softmmu/cputlb.o CC sparc64-softmmu/hw/core/null-machine.o CC sh4eb-softmmu/hw/timer/mc146818rtc.o CC sparc64-softmmu/hw/cpu/core.o CC sh4-softmmu/hw/display/virtio-gpu-3d.o CC sparc64-softmmu/hw/display/vga.o CC sh4eb-softmmu/hw/vfio/common.o CC sparc-softmmu/memory_mapping.o CC sh4-softmmu/hw/display/virtio-gpu-pci.o CC sparc-softmmu/dump.o CC sh4-softmmu/hw/intc/sh_intc.o CC sh4eb-softmmu/hw/vfio/pci.o CC sparc64-softmmu/hw/display/virtio-gpu.o CC sh4-softmmu/hw/misc/ivshmem.o CC sparc-softmmu/migration/ram.o CC sh4-softmmu/hw/misc/edu.o CC sparc64-softmmu/hw/display/virtio-gpu-3d.o CC sh4-softmmu/hw/net/virtio-net.o CC sh4eb-softmmu/hw/vfio/pci-quirks.o CC sparc-softmmu/migration/savevm.o CC sparc64-softmmu/hw/display/virtio-gpu-pci.o CC sh4eb-softmmu/hw/vfio/platform.o CC sh4-softmmu/hw/net/vhost_net.o CC sh4eb-softmmu/hw/vfio/spapr.o CC sparc64-softmmu/hw/misc/ivshmem.o CC sh4-softmmu/hw/scsi/virtio-scsi.o CC sh4eb-softmmu/hw/virtio/virtio.o CC sparc-softmmu/xen-common-stub.o CC sparc64-softmmu/hw/misc/edu.o CC sparc-softmmu/xen-hvm-stub.o CC sh4-softmmu/hw/scsi/virtio-scsi-dataplane.o CC sparc-softmmu/hw/core/nmi.o CC sh4-softmmu/hw/scsi/vhost-scsi.o CC sparc64-softmmu/hw/net/virtio-net.o CC sparc-softmmu/hw/core/generic-loader.o CC sh4eb-softmmu/hw/virtio/virtio-balloon.o CC sh4-softmmu/hw/timer/sh_timer.o CC sparc-softmmu/hw/core/null-machine.o CC sh4-softmmu/hw/timer/mc146818rtc.o CC sparc-softmmu/hw/cpu/core.o CC sh4eb-softmmu/hw/virtio/vhost.o CC sh4-softmmu/hw/vfio/common.o CC sparc-softmmu/hw/display/tcx.o CC sparc64-softmmu/hw/net/vhost_net.o CC sparc64-softmmu/hw/scsi/virtio-scsi.o CC sh4eb-softmmu/hw/virtio/vhost-backend.o CC sh4-softmmu/hw/vfio/pci.o CC sh4eb-softmmu/hw/virtio/vhost-user.o CC sparc64-softmmu/hw/scsi/virtio-scsi-dataplane.o CC sparc-softmmu/hw/display/cg3.o CC sparc64-softmmu/hw/scsi/vhost-scsi.o CC sh4eb-softmmu/hw/virtio/vhost-vsock.o CC sparc64-softmmu/hw/timer/mc146818rtc.o CC sparc-softmmu/hw/intc/grlib_irqmp.o CC sparc64-softmmu/hw/vfio/common.o CC sh4eb-softmmu/hw/virtio/virtio-crypto.o CC sparc-softmmu/hw/misc/eccmemctl.o CC sh4-softmmu/hw/vfio/pci-quirks.o CC sh4eb-softmmu/hw/virtio/virtio-crypto-pci.o CC sparc64-softmmu/hw/vfio/pci.o CC sparc-softmmu/hw/misc/slavio_misc.o CC sh4-softmmu/hw/vfio/platform.o CC sh4eb-softmmu/hw/sh4/shix.o CC sh4-softmmu/hw/vfio/spapr.o CC sparc-softmmu/hw/net/vhost_net.o CC sh4-softmmu/hw/virtio/virtio.o CC sparc64-softmmu/hw/vfio/pci-quirks.o CC sh4eb-softmmu/hw/sh4/r2d.o CC sparc-softmmu/hw/net/rocker/qmp-norocker.o CC sparc-softmmu/hw/vfio/common.o CC sh4eb-softmmu/hw/sh4/sh7750.o CC sparc64-softmmu/hw/vfio/platform.o CC sh4-softmmu/hw/virtio/virtio-balloon.o CC sparc-softmmu/hw/vfio/platform.o CC sh4eb-softmmu/hw/sh4/sh7750_regnames.o CC sparc64-softmmu/hw/vfio/spapr.o CC sh4-softmmu/hw/virtio/vhost.o CC sparc-softmmu/hw/vfio/spapr.o CC sh4eb-softmmu/hw/sh4/sh_pci.o CC sparc64-softmmu/hw/virtio/virtio.o CC sparc-softmmu/hw/sparc/sun4m.o CC sh4eb-softmmu/target/sh4/translate.o CC sh4-softmmu/hw/virtio/vhost-backend.o CC sparc-softmmu/hw/sparc/leon3.o CC sh4-softmmu/hw/virtio/vhost-user.o CC sparc64-softmmu/hw/virtio/virtio-balloon.o CC sh4-softmmu/hw/virtio/vhost-vsock.o CC sparc-softmmu/target/sparc/machine.o CC sparc64-softmmu/hw/virtio/vhost.o CC sh4-softmmu/hw/virtio/virtio-crypto.o CC sparc-softmmu/target/sparc/monitor.o CC sh4-softmmu/hw/virtio/virtio-crypto-pci.o CC sparc-softmmu/target/sparc/translate.o CC sparc64-softmmu/hw/virtio/vhost-backend.o CC sh4-softmmu/hw/sh4/shix.o CC sh4-softmmu/hw/sh4/r2d.o CC sparc64-softmmu/hw/virtio/vhost-user.o CC sh4eb-softmmu/target/sh4/op_helper.o CC sh4-softmmu/hw/sh4/sh7750.o CC sh4-softmmu/hw/sh4/sh7750_regnames.o CC sparc64-softmmu/hw/virtio/vhost-vsock.o CC sh4eb-softmmu/target/sh4/helper.o CC sh4-softmmu/hw/sh4/sh_pci.o CC sparc-softmmu/target/sparc/helper.o CC sparc64-softmmu/hw/virtio/virtio-crypto.o CC sparc-softmmu/target/sparc/cpu.o CC sh4-softmmu/target/sh4/translate.o CC sh4eb-softmmu/target/sh4/cpu.o CC sparc64-softmmu/hw/virtio/virtio-crypto-pci.o CC sparc-softmmu/target/sparc/fop_helper.o CC sh4eb-softmmu/target/sh4/monitor.o CC sparc-softmmu/target/sparc/cc_helper.o CC sh4eb-softmmu/target/sh4/gdbstub.o CC sparc64-softmmu/hw/sparc64/sparc64.o CC sparc-softmmu/target/sparc/win_helper.o CC sparc64-softmmu/hw/sparc64/sun4u.o GEN trace/generated-helpers.c CC sh4eb-softmmu/trace/control-target.o CC sparc-softmmu/target/sparc/mmu_helper.o CC sparc-softmmu/target/sparc/ldst_helper.o CC sh4eb-softmmu/trace/generated-helpers.o CC sparc-softmmu/target/sparc/int32_helper.o CC sparc64-softmmu/hw/sparc64/niagara.o CC sparc-softmmu/target/sparc/gdbstub.o LINK sh4eb-softmmu/qemu-system-sh4eb CC sparc64-softmmu/target/sparc/machine.o GEN trace/generated-helpers.c CC sparc-softmmu/trace/control-target.o CC sh4-softmmu/target/sh4/op_helper.o CC sparc64-softmmu/target/sparc/monitor.o CC sparc-softmmu/trace/generated-helpers.o CC sh4-softmmu/target/sh4/helper.o CC sparc64-softmmu/target/sparc/translate.o LINK sparc-softmmu/qemu-system-sparc CC sh4-softmmu/target/sh4/cpu.o CC sh4-softmmu/target/sh4/monitor.o CC sh4-softmmu/target/sh4/gdbstub.o GEN trace/generated-helpers.c CC sh4-softmmu/trace/control-target.o GEN tricore-softmmu/hmp-commands.h GEN tricore-softmmu/hmp-commands-info.h GEN tricore-softmmu/config-target.h CC tricore-softmmu/exec.o CC sh4-softmmu/trace/generated-helpers.o GEN unicore32-softmmu/hmp-commands.h GEN unicore32-softmmu/hmp-commands-info.h GEN unicore32-softmmu/config-target.h CC unicore32-softmmu/exec.o LINK sh4-softmmu/qemu-system-sh4 CC sparc64-softmmu/target/sparc/helper.o CC sparc64-softmmu/target/sparc/cpu.o CC sparc64-softmmu/target/sparc/fop_helper.o CC sparc64-softmmu/target/sparc/cc_helper.o CC tricore-softmmu/translate-all.o CC sparc64-softmmu/target/sparc/win_helper.o CC tricore-softmmu/cpu-exec.o CC sparc64-softmmu/target/sparc/mmu_helper.o CC unicore32-softmmu/translate-all.o CC sparc64-softmmu/target/sparc/ldst_helper.o CC tricore-softmmu/translate-common.o GEN x86_64-softmmu/hmp-commands.h CC sparc64-softmmu/target/sparc/int64_helper.o GEN x86_64-softmmu/hmp-commands-info.h CC unicore32-softmmu/cpu-exec.o GEN x86_64-softmmu/config-target.h CC tricore-softmmu/cpu-exec-common.o CC sparc64-softmmu/target/sparc/vis_helper.o CC x86_64-softmmu/exec.o CC tricore-softmmu/tcg/tcg.o CC unicore32-softmmu/translate-common.o CC sparc64-softmmu/target/sparc/gdbstub.o CC unicore32-softmmu/cpu-exec-common.o GEN trace/generated-helpers.c CC sparc64-softmmu/trace/control-target.o CC unicore32-softmmu/tcg/tcg.o CC sparc64-softmmu/trace/generated-helpers.o LINK sparc64-softmmu/qemu-system-sparc64 CC x86_64-softmmu/translate-all.o CC tricore-softmmu/tcg/tcg-op.o CC x86_64-softmmu/cpu-exec.o CC unicore32-softmmu/tcg/tcg-op.o CC x86_64-softmmu/translate-common.o CC x86_64-softmmu/cpu-exec-common.o CC x86_64-softmmu/tcg/tcg.o GEN xtensaeb-softmmu/hmp-commands.h GEN xtensaeb-softmmu/hmp-commands-info.h GEN xtensaeb-softmmu/config-target.h CC xtensaeb-softmmu/exec.o CC tricore-softmmu/tcg/optimize.o CC unicore32-softmmu/tcg/optimize.o CC tricore-softmmu/tcg/tcg-common.o CC x86_64-softmmu/tcg/tcg-op.o CC tricore-softmmu/fpu/softfloat.o CC xtensaeb-softmmu/translate-all.o CC unicore32-softmmu/tcg/tcg-common.o CC unicore32-softmmu/fpu/softfloat.o CC xtensaeb-softmmu/cpu-exec.o CC xtensaeb-softmmu/translate-common.o CC xtensaeb-softmmu/cpu-exec-common.o CC x86_64-softmmu/tcg/optimize.o CC xtensaeb-softmmu/tcg/tcg.o CC tricore-softmmu/disas.o CC tricore-softmmu/tcg-runtime.o CC tricore-softmmu/hax-stub.o CC x86_64-softmmu/tcg/tcg-common.o CC xtensaeb-softmmu/tcg/tcg-op.o CC tricore-softmmu/kvm-stub.o CC unicore32-softmmu/disas.o CC x86_64-softmmu/fpu/softfloat.o CC tricore-softmmu/arch_init.o CC unicore32-softmmu/tcg-runtime.o CC tricore-softmmu/cpus.o CC unicore32-softmmu/hax-stub.o CC unicore32-softmmu/kvm-stub.o CC tricore-softmmu/monitor.o CC unicore32-softmmu/arch_init.o CC unicore32-softmmu/cpus.o CC tricore-softmmu/gdbstub.o CC xtensaeb-softmmu/tcg/optimize.o CC unicore32-softmmu/monitor.o CC x86_64-softmmu/disas.o CC tricore-softmmu/balloon.o CC x86_64-softmmu/tcg-runtime.o CC tricore-softmmu/ioport.o CC xtensaeb-softmmu/tcg/tcg-common.o CC tricore-softmmu/numa.o CC x86_64-softmmu/hax-stub.o CC xtensaeb-softmmu/fpu/softfloat.o CC x86_64-softmmu/kvm-stub.o CC tricore-softmmu/qtest.o CC x86_64-softmmu/arch_init.o CC unicore32-softmmu/gdbstub.o CC tricore-softmmu/bootdevice.o CC x86_64-softmmu/cpus.o CC unicore32-softmmu/balloon.o CC tricore-softmmu/memory.o CC unicore32-softmmu/ioport.o CC x86_64-softmmu/monitor.o CC unicore32-softmmu/numa.o CC tricore-softmmu/cputlb.o CC unicore32-softmmu/qtest.o CC xtensaeb-softmmu/disas.o CC xtensaeb-softmmu/tcg-runtime.o CC unicore32-softmmu/bootdevice.o CC x86_64-softmmu/gdbstub.o CC xtensaeb-softmmu/hax-stub.o CC unicore32-softmmu/memory.o CC xtensaeb-softmmu/kvm-stub.o CC tricore-softmmu/memory_mapping.o CC xtensaeb-softmmu/arch_init.o CC x86_64-softmmu/balloon.o CC tricore-softmmu/dump.o CC xtensaeb-softmmu/cpus.o CC x86_64-softmmu/ioport.o CC unicore32-softmmu/cputlb.o CC x86_64-softmmu/numa.o CC tricore-softmmu/migration/ram.o CC xtensaeb-softmmu/monitor.o CC x86_64-softmmu/qtest.o CC x86_64-softmmu/bootdevice.o CC tricore-softmmu/migration/savevm.o CC unicore32-softmmu/memory_mapping.o CC xtensaeb-softmmu/gdbstub.o CC x86_64-softmmu/memory.o CC unicore32-softmmu/dump.o CC xtensaeb-softmmu/balloon.o CC tricore-softmmu/xen-common-stub.o CC tricore-softmmu/xen-hvm-stub.o CC xtensaeb-softmmu/ioport.o CC unicore32-softmmu/migration/ram.o CC tricore-softmmu/hw/core/nmi.o CC tricore-softmmu/hw/core/generic-loader.o CC x86_64-softmmu/cputlb.o CC xtensaeb-softmmu/numa.o CC tricore-softmmu/hw/core/null-machine.o CC unicore32-softmmu/migration/savevm.o CC tricore-softmmu/hw/cpu/core.o CC xtensaeb-softmmu/qtest.o CC tricore-softmmu/hw/net/vhost_net.o CC xtensaeb-softmmu/bootdevice.o CC tricore-softmmu/hw/net/rocker/qmp-norocker.o CC tricore-softmmu/hw/vfio/common.o CC x86_64-softmmu/memory_mapping.o CC xtensaeb-softmmu/memory.o CC unicore32-softmmu/xen-common-stub.o CC x86_64-softmmu/dump.o CC tricore-softmmu/hw/vfio/platform.o CC unicore32-softmmu/xen-hvm-stub.o CC unicore32-softmmu/hw/core/nmi.o CC tricore-softmmu/hw/vfio/spapr.o CC x86_64-softmmu/migration/ram.o CC tricore-softmmu/hw/tricore/tricore_testboard.o CC unicore32-softmmu/hw/core/generic-loader.o CC xtensaeb-softmmu/cputlb.o CC tricore-softmmu/target/tricore/translate.o CC unicore32-softmmu/hw/core/null-machine.o CC x86_64-softmmu/migration/savevm.o CC unicore32-softmmu/hw/cpu/core.o CC unicore32-softmmu/hw/net/vhost_net.o CC x86_64-softmmu/xen-common-stub.o CC unicore32-softmmu/hw/net/rocker/qmp-norocker.o CC xtensaeb-softmmu/memory_mapping.o CC x86_64-softmmu/xen-hvm-stub.o CC unicore32-softmmu/hw/vfio/common.o CC xtensaeb-softmmu/dump.o CC x86_64-softmmu/hw/9pfs/virtio-9p-device.o CC unicore32-softmmu/hw/vfio/platform.o CC x86_64-softmmu/hw/block/virtio-blk.o CC xtensaeb-softmmu/migration/ram.o CC unicore32-softmmu/hw/vfio/spapr.o CC x86_64-softmmu/hw/block/dataplane/virtio-blk.o CC unicore32-softmmu/hw/unicore32/puv3.o CC xtensaeb-softmmu/migration/savevm.o CC x86_64-softmmu/hw/char/virtio-serial-bus.o CC unicore32-softmmu/target/unicore32/translate.o CC x86_64-softmmu/hw/core/nmi.o CC x86_64-softmmu/hw/core/generic-loader.o CC tricore-softmmu/target/tricore/helper.o CC xtensaeb-softmmu/xen-common-stub.o CC tricore-softmmu/target/tricore/cpu.o CC x86_64-softmmu/hw/core/null-machine.o CC xtensaeb-softmmu/xen-hvm-stub.o CC unicore32-softmmu/target/unicore32/op_helper.o CC tricore-softmmu/target/tricore/op_helper.o CC x86_64-softmmu/hw/cpu/core.o CC xtensaeb-softmmu/hw/core/nmi.o CC unicore32-softmmu/target/unicore32/helper.o CC x86_64-softmmu/hw/display/vga.o CC xtensaeb-softmmu/hw/core/generic-loader.o CC unicore32-softmmu/target/unicore32/cpu.o CC xtensaeb-softmmu/hw/core/null-machine.o CC unicore32-softmmu/target/unicore32/ucf64_helper.o CC xtensaeb-softmmu/hw/cpu/core.o CC tricore-softmmu/target/tricore/fpu_helper.o CC unicore32-softmmu/target/unicore32/softmmu.o CC xtensaeb-softmmu/hw/net/vhost_net.o GEN trace/generated-helpers.c CC tricore-softmmu/trace/control-target.o CC x86_64-softmmu/hw/display/virtio-gpu.o GEN trace/generated-helpers.c CC unicore32-softmmu/trace/control-target.o CC xtensaeb-softmmu/hw/net/rocker/qmp-norocker.o CC tricore-softmmu/trace/generated-helpers.o CC xtensaeb-softmmu/hw/vfio/common.o LINK tricore-softmmu/qemu-system-tricore CC unicore32-softmmu/trace/generated-helpers.o CC x86_64-softmmu/hw/display/virtio-gpu-3d.o LINK unicore32-softmmu/qemu-system-unicore32 CC xtensaeb-softmmu/hw/vfio/platform.o CC xtensaeb-softmmu/hw/vfio/spapr.o CC x86_64-softmmu/hw/display/virtio-gpu-pci.o CC xtensaeb-softmmu/hw/xtensa/pic_cpu.o CC xtensaeb-softmmu/hw/xtensa/sim.o CC x86_64-softmmu/hw/display/virtio-vga.o CC x86_64-softmmu/hw/intc/apic.o CC xtensaeb-softmmu/hw/xtensa/xtfpga.o GEN xtensa-softmmu/hmp-commands.h GEN xtensa-softmmu/hmp-commands-info.h GEN xtensa-softmmu/config-target.h CC xtensaeb-softmmu/target/xtensa/xtensa-semi.o CC x86_64-softmmu/hw/intc/apic_common.o CC xtensa-softmmu/exec.o CC xtensaeb-softmmu/target/xtensa/core-dc232b.o CC x86_64-softmmu/hw/intc/ioapic.o CC xtensaeb-softmmu/target/xtensa/core-dc233c.o CC xtensa-softmmu/translate-all.o CC x86_64-softmmu/hw/isa/lpc_ich9.o CC xtensaeb-softmmu/target/xtensa/core-fsf.o CC xtensa-softmmu/cpu-exec.o CC x86_64-softmmu/hw/misc/vmport.o CC xtensa-softmmu/translate-common.o CC xtensaeb-softmmu/target/xtensa/monitor.o CC x86_64-softmmu/hw/misc/ivshmem.o CC xtensa-softmmu/cpu-exec-common.o CC xtensaeb-softmmu/target/xtensa/translate.o CC xtensa-softmmu/tcg/tcg.o CC x86_64-softmmu/hw/misc/pvpanic.o CC x86_64-softmmu/hw/misc/edu.o GEN aarch64-linux-user/config-target.h CC x86_64-softmmu/hw/net/virtio-net.o CC aarch64-linux-user/exec.o CC aarch64-linux-user/translate-all.o CC x86_64-softmmu/hw/net/vhost_net.o CC x86_64-softmmu/hw/scsi/virtio-scsi.o CC xtensaeb-softmmu/target/xtensa/op_helper.o CC aarch64-linux-user/cpu-exec.o CC xtensa-softmmu/tcg/tcg-op.o CC x86_64-softmmu/hw/scsi/virtio-scsi-dataplane.o CC x86_64-softmmu/hw/scsi/vhost-scsi.o CC aarch64-linux-user/translate-common.o CC xtensaeb-softmmu/target/xtensa/helper.o CC x86_64-softmmu/hw/timer/mc146818rtc.o CC aarch64-linux-user/cpu-exec-common.o CC xtensaeb-softmmu/target/xtensa/cpu.o CC aarch64-linux-user/tcg/tcg.o CC xtensaeb-softmmu/target/xtensa/gdbstub.o CC x86_64-softmmu/hw/vfio/common.o GEN trace/generated-helpers.c CC xtensaeb-softmmu/trace/control-target.o CC xtensa-softmmu/tcg/optimize.o CC xtensaeb-softmmu/trace/generated-helpers.o CC x86_64-softmmu/hw/vfio/pci.o LINK xtensaeb-softmmu/qemu-system-xtensaeb CC xtensa-softmmu/tcg/tcg-common.o CC aarch64-linux-user/tcg/tcg-op.o CC xtensa-softmmu/fpu/softfloat.o CC x86_64-softmmu/hw/vfio/pci-quirks.o CC x86_64-softmmu/hw/vfio/platform.o GEN alpha-linux-user/config-target.h CC alpha-linux-user/exec.o CC x86_64-softmmu/hw/vfio/spapr.o CC alpha-linux-user/translate-all.o CC x86_64-softmmu/hw/virtio/virtio.o CC alpha-linux-user/cpu-exec.o CC aarch64-linux-user/tcg/optimize.o CC alpha-linux-user/translate-common.o CC xtensa-softmmu/disas.o CC alpha-linux-user/cpu-exec-common.o CC x86_64-softmmu/hw/virtio/virtio-balloon.o CC xtensa-softmmu/tcg-runtime.o CC alpha-linux-user/tcg/tcg.o CC xtensa-softmmu/hax-stub.o CC x86_64-softmmu/hw/virtio/vhost.o CC aarch64-linux-user/tcg/tcg-common.o CC xtensa-softmmu/kvm-stub.o CC aarch64-linux-user/fpu/softfloat.o CC xtensa-softmmu/arch_init.o CC xtensa-softmmu/cpus.o CC x86_64-softmmu/hw/virtio/vhost-backend.o CC xtensa-softmmu/monitor.o CC alpha-linux-user/tcg/tcg-op.o CC x86_64-softmmu/hw/virtio/vhost-user.o CC x86_64-softmmu/hw/virtio/vhost-vsock.o CC x86_64-softmmu/hw/virtio/virtio-crypto.o CC aarch64-linux-user/disas.o CC x86_64-softmmu/hw/virtio/virtio-crypto-pci.o CC xtensa-softmmu/gdbstub.o CC aarch64-linux-user/tcg-runtime.o CC alpha-linux-user/tcg/optimize.o CC x86_64-softmmu/hw/i386/multiboot.o CC x86_64-softmmu/hw/i386/pc.o CC xtensa-softmmu/balloon.o GEN aarch64-linux-user/gdbstub-xml.c CC xtensa-softmmu/ioport.o CC alpha-linux-user/tcg/tcg-common.o CC x86_64-softmmu/hw/i386/pc_piix.o CC xtensa-softmmu/numa.o CC aarch64-linux-user/hax-stub.o CC alpha-linux-user/fpu/softfloat.o CC aarch64-linux-user/kvm-stub.o CC xtensa-softmmu/qtest.o CC x86_64-softmmu/hw/i386/pc_q35.o CC aarch64-linux-user/gdbstub.o CC xtensa-softmmu/bootdevice.o CC x86_64-softmmu/hw/i386/pc_sysfw.o CC xtensa-softmmu/memory.o CC aarch64-linux-user/thunk.o CC x86_64-softmmu/hw/i386/x86-iommu.o CC x86_64-softmmu/hw/i386/intel_iommu.o CC aarch64-linux-user/user-exec.o CC aarch64-linux-user/user-exec-stub.o CC xtensa-softmmu/cputlb.o CC alpha-linux-user/disas.o CC aarch64-linux-user/linux-user/main.o CC x86_64-softmmu/hw/i386/amd_iommu.o CC alpha-linux-user/tcg-runtime.o CC aarch64-linux-user/linux-user/syscall.o CC x86_64-softmmu/hw/i386/kvmvapic.o CC alpha-linux-user/hax-stub.o CC xtensa-softmmu/memory_mapping.o CC alpha-linux-user/kvm-stub.o CC x86_64-softmmu/hw/i386/acpi-build.o CC xtensa-softmmu/dump.o CC alpha-linux-user/gdbstub.o CC xtensa-softmmu/migration/ram.o CC alpha-linux-user/thunk.o CC x86_64-softmmu/hw/i386/pci-assign-load-rom.o CC alpha-linux-user/user-exec.o CC x86_64-softmmu/target/i386/translate.o CC xtensa-softmmu/migration/savevm.o CC alpha-linux-user/user-exec-stub.o CC alpha-linux-user/linux-user/main.o CC aarch64-linux-user/linux-user/strace.o CC xtensa-softmmu/xen-common-stub.o CC alpha-linux-user/linux-user/syscall.o CC xtensa-softmmu/xen-hvm-stub.o CC aarch64-linux-user/linux-user/mmap.o CC xtensa-softmmu/hw/core/nmi.o CC xtensa-softmmu/hw/core/generic-loader.o CC aarch64-linux-user/linux-user/signal.o CC xtensa-softmmu/hw/core/null-machine.o CC aarch64-linux-user/linux-user/elfload.o CC xtensa-softmmu/hw/cpu/core.o CC xtensa-softmmu/hw/net/vhost_net.o CC aarch64-linux-user/linux-user/linuxload.o CC xtensa-softmmu/hw/net/rocker/qmp-norocker.o CC xtensa-softmmu/hw/vfio/common.o CC aarch64-linux-user/linux-user/uaccess.o CC alpha-linux-user/linux-user/strace.o CC aarch64-linux-user/linux-user/uname.o CCAS aarch64-linux-user/linux-user/safe-syscall.o CC xtensa-softmmu/hw/vfio/platform.o CC aarch64-linux-user/linux-user/flatload.o CC alpha-linux-user/linux-user/mmap.o CC aarch64-linux-user/target/arm/arm-semi.o CC xtensa-softmmu/hw/vfio/spapr.o CC alpha-linux-user/linux-user/signal.o CC x86_64-softmmu/target/i386/helper.o CC aarch64-linux-user/target/arm/kvm-stub.o CC xtensa-softmmu/hw/xtensa/pic_cpu.o CC aarch64-linux-user/target/arm/translate.o CC alpha-linux-user/linux-user/elfload.o CC x86_64-softmmu/target/i386/cpu.o CC xtensa-softmmu/hw/xtensa/sim.o CC xtensa-softmmu/hw/xtensa/xtfpga.o CC alpha-linux-user/linux-user/linuxload.o CC xtensa-softmmu/target/xtensa/xtensa-semi.o CC alpha-linux-user/linux-user/uaccess.o CC x86_64-softmmu/target/i386/bpt_helper.o CC alpha-linux-user/linux-user/uname.o CC xtensa-softmmu/target/xtensa/core-dc232b.o CC x86_64-softmmu/target/i386/excp_helper.o CC xtensa-softmmu/target/xtensa/core-dc233c.o CCAS alpha-linux-user/linux-user/safe-syscall.o CC xtensa-softmmu/target/xtensa/core-fsf.o CC x86_64-softmmu/target/i386/fpu_helper.o CC alpha-linux-user/target/alpha/translate.o CC xtensa-softmmu/target/xtensa/monitor.o CC xtensa-softmmu/target/xtensa/translate.o CC alpha-linux-user/target/alpha/helper.o CC alpha-linux-user/target/alpha/cpu.o CC alpha-linux-user/target/alpha/int_helper.o CC xtensa-softmmu/target/xtensa/op_helper.o CC alpha-linux-user/target/alpha/fpu_helper.o CC x86_64-softmmu/target/i386/cc_helper.o CC alpha-linux-user/target/alpha/vax_helper.o CC xtensa-softmmu/target/xtensa/helper.o CC x86_64-softmmu/target/i386/int_helper.o CC aarch64-linux-user/target/arm/op_helper.o CC alpha-linux-user/target/alpha/sys_helper.o CC xtensa-softmmu/target/xtensa/cpu.o CC alpha-linux-user/target/alpha/mem_helper.o CC xtensa-softmmu/target/xtensa/gdbstub.o CC x86_64-softmmu/target/i386/svm_helper.o CC alpha-linux-user/target/alpha/gdbstub.o CC aarch64-linux-user/target/arm/helper.o GEN trace/generated-helpers.c CC xtensa-softmmu/trace/control-target.o GEN trace/generated-helpers.c CC alpha-linux-user/trace/control-target.o CC x86_64-softmmu/target/i386/smm_helper.o CC xtensa-softmmu/trace/generated-helpers.o CC alpha-linux-user/trace/generated-helpers.o CC x86_64-softmmu/target/i386/misc_helper.o LINK xtensa-softmmu/qemu-system-xtensa LINK alpha-linux-user/qemu-alpha CC x86_64-softmmu/target/i386/mem_helper.o CC x86_64-softmmu/target/i386/seg_helper.o GEN armeb-linux-user/config-target.h CC armeb-linux-user/exec.o CC aarch64-linux-user/target/arm/cpu.o CC aarch64-linux-user/target/arm/neon_helper.o GEN arm-linux-user/config-target.h CC armeb-linux-user/translate-all.o CC arm-linux-user/exec.o CC arm-linux-user/translate-all.o CC armeb-linux-user/cpu-exec.o CC aarch64-linux-user/target/arm/iwmmxt_helper.o CC arm-linux-user/cpu-exec.o CC armeb-linux-user/translate-common.o CC x86_64-softmmu/target/i386/mpx_helper.o CC arm-linux-user/translate-common.o CC armeb-linux-user/cpu-exec-common.o CC aarch64-linux-user/target/arm/gdbstub.o CC arm-linux-user/cpu-exec-common.o CC x86_64-softmmu/target/i386/gdbstub.o CC armeb-linux-user/tcg/tcg.o CC aarch64-linux-user/target/arm/cpu64.o CC arm-linux-user/tcg/tcg.o CC x86_64-softmmu/target/i386/machine.o CC aarch64-linux-user/target/arm/translate-a64.o CC x86_64-softmmu/target/i386/arch_memory_mapping.o CC x86_64-softmmu/target/i386/arch_dump.o CC x86_64-softmmu/target/i386/monitor.o CC armeb-linux-user/tcg/tcg-op.o CC x86_64-softmmu/target/i386/kvm-stub.o CC arm-linux-user/tcg/tcg-op.o GEN trace/generated-helpers.c CC x86_64-softmmu/trace/control-target.o CC x86_64-softmmu/trace/generated-helpers.o LINK x86_64-softmmu/qemu-system-x86_64 CC aarch64-linux-user/target/arm/helper-a64.o CC armeb-linux-user/tcg/optimize.o CC arm-linux-user/tcg/optimize.o CC aarch64-linux-user/target/arm/gdbstub64.o CC aarch64-linux-user/target/arm/crypto_helper.o GEN trace/generated-helpers.c CC aarch64-linux-user/trace/control-target.o CC arm-linux-user/tcg/tcg-common.o CC arm-linux-user/fpu/softfloat.o CC armeb-linux-user/tcg/tcg-common.o CC aarch64-linux-user/gdbstub-xml.o CC arm-linux-user/disas.o CC armeb-linux-user/fpu/softfloat.o CC aarch64-linux-user/trace/generated-helpers.o CC arm-linux-user/tcg-runtime.o LINK aarch64-linux-user/qemu-aarch64 GEN arm-linux-user/gdbstub-xml.c GEN cris-linux-user/config-target.h CC cris-linux-user/exec.o CC arm-linux-user/hax-stub.o CC cris-linux-user/translate-all.o CC cris-linux-user/cpu-exec.o CC arm-linux-user/kvm-stub.o CC armeb-linux-user/disas.o CC arm-linux-user/gdbstub.o CC armeb-linux-user/tcg-runtime.o CC cris-linux-user/translate-common.o CC cris-linux-user/cpu-exec-common.o GEN armeb-linux-user/gdbstub-xml.c CC armeb-linux-user/hax-stub.o CC arm-linux-user/thunk.o CC cris-linux-user/tcg/tcg.o CC armeb-linux-user/kvm-stub.o CC arm-linux-user/user-exec.o CC cris-linux-user/tcg/tcg-op.o CC arm-linux-user/user-exec-stub.o CC armeb-linux-user/gdbstub.o CC arm-linux-user/linux-user/main.o CC armeb-linux-user/thunk.o CC arm-linux-user/linux-user/syscall.o CC armeb-linux-user/user-exec.o CC armeb-linux-user/user-exec-stub.o CC armeb-linux-user/linux-user/main.o CC cris-linux-user/tcg/optimize.o GEN hppa-linux-user/config-target.h CC hppa-linux-user/exec.o CC armeb-linux-user/linux-user/syscall.o CC cris-linux-user/tcg/tcg-common.o CC hppa-linux-user/translate-all.o CC cris-linux-user/fpu/softfloat.o CC hppa-linux-user/cpu-exec.o CC hppa-linux-user/translate-common.o CC hppa-linux-user/cpu-exec-common.o CC hppa-linux-user/tcg/tcg.o CC arm-linux-user/linux-user/strace.o CC cris-linux-user/disas.o CC arm-linux-user/linux-user/mmap.o CC cris-linux-user/tcg-runtime.o CC hppa-linux-user/tcg/tcg-op.o CC arm-linux-user/linux-user/signal.o CC armeb-linux-user/linux-user/strace.o CC cris-linux-user/hax-stub.o CC arm-linux-user/linux-user/elfload.o CC cris-linux-user/kvm-stub.o CC armeb-linux-user/linux-user/mmap.o CC cris-linux-user/gdbstub.o CC arm-linux-user/linux-user/linuxload.o CC armeb-linux-user/linux-user/signal.o CC cris-linux-user/thunk.o CC arm-linux-user/linux-user/uaccess.o CC armeb-linux-user/linux-user/elfload.o CC cris-linux-user/user-exec.o CC cris-linux-user/user-exec-stub.o CC arm-linux-user/linux-user/uname.o CC hppa-linux-user/tcg/optimize.o CC cris-linux-user/linux-user/main.o CCAS arm-linux-user/linux-user/safe-syscall.o CC arm-linux-user/linux-user/flatload.o CC armeb-linux-user/linux-user/linuxload.o CC cris-linux-user/linux-user/syscall.o CC arm-linux-user/linux-user/arm/nwfpe/fpa11.o CC armeb-linux-user/linux-user/uaccess.o CC hppa-linux-user/tcg/tcg-common.o CC arm-linux-user/linux-user/arm/nwfpe/fpa11_cpdo.o CC armeb-linux-user/linux-user/uname.o CC hppa-linux-user/fpu/softfloat.o CC arm-linux-user/linux-user/arm/nwfpe/fpa11_cpdt.o CCAS armeb-linux-user/linux-user/safe-syscall.o CC armeb-linux-user/linux-user/flatload.o CC arm-linux-user/linux-user/arm/nwfpe/fpa11_cprt.o CC armeb-linux-user/linux-user/arm/nwfpe/fpa11.o CC arm-linux-user/linux-user/arm/nwfpe/fpopcode.o CC armeb-linux-user/linux-user/arm/nwfpe/fpa11_cpdo.o CC armeb-linux-user/linux-user/arm/nwfpe/fpa11_cpdt.o CC arm-linux-user/linux-user/arm/nwfpe/single_cpdo.o CC hppa-linux-user/disas.o CC arm-linux-user/linux-user/arm/nwfpe/double_cpdo.o CC armeb-linux-user/linux-user/arm/nwfpe/fpa11_cprt.o CC hppa-linux-user/tcg-runtime.o CC arm-linux-user/linux-user/arm/nwfpe/extended_cpdo.o CC armeb-linux-user/linux-user/arm/nwfpe/fpopcode.o CC arm-linux-user/target/arm/arm-semi.o CC armeb-linux-user/linux-user/arm/nwfpe/single_cpdo.o CC hppa-linux-user/hax-stub.o CC cris-linux-user/linux-user/strace.o CC armeb-linux-user/linux-user/arm/nwfpe/double_cpdo.o CC hppa-linux-user/kvm-stub.o CC arm-linux-user/target/arm/kvm-stub.o CC armeb-linux-user/linux-user/arm/nwfpe/extended_cpdo.o CC hppa-linux-user/gdbstub.o CC arm-linux-user/target/arm/translate.o CC cris-linux-user/linux-user/mmap.o CC armeb-linux-user/target/arm/arm-semi.o CC hppa-linux-user/thunk.o CC cris-linux-user/linux-user/signal.o CC armeb-linux-user/target/arm/kvm-stub.o CC hppa-linux-user/user-exec.o CC cris-linux-user/linux-user/elfload.o CC armeb-linux-user/target/arm/translate.o CC hppa-linux-user/user-exec-stub.o CC hppa-linux-user/linux-user/main.o CC cris-linux-user/linux-user/linuxload.o CC hppa-linux-user/linux-user/syscall.o CC cris-linux-user/linux-user/uaccess.o CC cris-linux-user/linux-user/uname.o CCAS cris-linux-user/linux-user/safe-syscall.o CC cris-linux-user/target/cris/translate.o CC arm-linux-user/target/arm/op_helper.o CC cris-linux-user/target/cris/op_helper.o CC hppa-linux-user/linux-user/strace.o CC arm-linux-user/target/arm/helper.o CC cris-linux-user/target/cris/helper.o CC cris-linux-user/target/cris/cpu.o CC hppa-linux-user/linux-user/mmap.o CC cris-linux-user/target/cris/gdbstub.o CC armeb-linux-user/target/arm/op_helper.o GEN trace/generated-helpers.c CC cris-linux-user/trace/control-target.o CC hppa-linux-user/linux-user/signal.o CC arm-linux-user/target/arm/cpu.o CC hppa-linux-user/linux-user/elfload.o CC cris-linux-user/trace/generated-helpers.o CC armeb-linux-user/target/arm/helper.o CC arm-linux-user/target/arm/neon_helper.o LINK cris-linux-user/qemu-cris CC hppa-linux-user/linux-user/linuxload.o CC hppa-linux-user/linux-user/uaccess.o CC armeb-linux-user/target/arm/cpu.o CC hppa-linux-user/linux-user/uname.o CCAS hppa-linux-user/linux-user/safe-syscall.o CC armeb-linux-user/target/arm/neon_helper.o CC arm-linux-user/target/arm/iwmmxt_helper.o CC hppa-linux-user/target/hppa/translate.o CC hppa-linux-user/target/hppa/helper.o CC arm-linux-user/target/arm/gdbstub.o GEN i386-linux-user/config-target.h CC armeb-linux-user/target/arm/iwmmxt_helper.o CC i386-linux-user/exec.o CC arm-linux-user/target/arm/crypto_helper.o CC hppa-linux-user/target/hppa/cpu.o CC hppa-linux-user/target/hppa/op_helper.o GEN trace/generated-helpers.c CC arm-linux-user/trace/control-target.o CC i386-linux-user/translate-all.o CC hppa-linux-user/target/hppa/gdbstub.o CC armeb-linux-user/target/arm/gdbstub.o CC arm-linux-user/gdbstub-xml.o CC armeb-linux-user/target/arm/crypto_helper.o GEN trace/generated-helpers.c CC arm-linux-user/trace/generated-helpers.o CC hppa-linux-user/trace/control-target.o CC i386-linux-user/cpu-exec.o LINK arm-linux-user/qemu-arm GEN trace/generated-helpers.c CC armeb-linux-user/trace/control-target.o CC hppa-linux-user/trace/generated-helpers.o CC i386-linux-user/translate-common.o CC armeb-linux-user/gdbstub-xml.o LINK hppa-linux-user/qemu-hppa CC i386-linux-user/cpu-exec-common.o GEN m68k-linux-user/config-target.h CC armeb-linux-user/trace/generated-helpers.o CC i386-linux-user/tcg/tcg.o CC m68k-linux-user/exec.o LINK armeb-linux-user/qemu-armeb GEN microblazeel-linux-user/config-target.h CC m68k-linux-user/translate-all.o CC microblazeel-linux-user/exec.o CC microblazeel-linux-user/translate-all.o CC microblazeel-linux-user/cpu-exec.o CC m68k-linux-user/cpu-exec.o CC microblazeel-linux-user/translate-common.o CC microblazeel-linux-user/cpu-exec-common.o CC microblazeel-linux-user/tcg/tcg.o CC m68k-linux-user/translate-common.o CC i386-linux-user/tcg/tcg-op.o CC microblazeel-linux-user/tcg/tcg-op.o CC m68k-linux-user/cpu-exec-common.o CC m68k-linux-user/tcg/tcg.o CC i386-linux-user/tcg/optimize.o CC i386-linux-user/tcg/tcg-common.o CC microblazeel-linux-user/tcg/optimize.o CC i386-linux-user/fpu/softfloat.o CC m68k-linux-user/tcg/tcg-op.o CC i386-linux-user/disas.o GEN microblaze-linux-user/config-target.h CC microblazeel-linux-user/tcg/tcg-common.o CC microblazeel-linux-user/fpu/softfloat.o CC microblaze-linux-user/exec.o CC microblaze-linux-user/translate-all.o CC m68k-linux-user/tcg/optimize.o CC microblaze-linux-user/cpu-exec.o CC microblaze-linux-user/translate-common.o CC m68k-linux-user/tcg/tcg-common.o CC i386-linux-user/tcg-runtime.o CC microblaze-linux-user/cpu-exec-common.o CC m68k-linux-user/fpu/softfloat.o CC microblaze-linux-user/tcg/tcg.o CC i386-linux-user/hax-stub.o CC microblazeel-linux-user/disas.o CC i386-linux-user/kvm-stub.o CC microblazeel-linux-user/tcg-runtime.o CC i386-linux-user/gdbstub.o CC microblazeel-linux-user/hax-stub.o CC microblazeel-linux-user/kvm-stub.o CC i386-linux-user/thunk.o CC i386-linux-user/user-exec.o CC microblazeel-linux-user/gdbstub.o CC i386-linux-user/user-exec-stub.o CC microblaze-linux-user/tcg/tcg-op.o CC microblazeel-linux-user/thunk.o CC i386-linux-user/linux-user/main.o CC microblazeel-linux-user/user-exec.o CC i386-linux-user/linux-user/syscall.o CC microblazeel-linux-user/user-exec-stub.o CC m68k-linux-user/disas.o CC microblazeel-linux-user/linux-user/main.o CC m68k-linux-user/tcg-runtime.o CC microblazeel-linux-user/linux-user/syscall.o GEN m68k-linux-user/gdbstub-xml.c CC m68k-linux-user/hax-stub.o CC microblaze-linux-user/tcg/optimize.o CC m68k-linux-user/kvm-stub.o CC m68k-linux-user/gdbstub.o CC m68k-linux-user/thunk.o CC microblaze-linux-user/tcg/tcg-common.o CC microblaze-linux-user/fpu/softfloat.o CC m68k-linux-user/user-exec.o CC m68k-linux-user/user-exec-stub.o CC m68k-linux-user/linux-user/main.o CC m68k-linux-user/linux-user/syscall.o CC microblazeel-linux-user/linux-user/strace.o CC i386-linux-user/linux-user/strace.o CC microblaze-linux-user/disas.o CC microblaze-linux-user/tcg-runtime.o CC microblazeel-linux-user/linux-user/mmap.o CC i386-linux-user/linux-user/mmap.o CC microblazeel-linux-user/linux-user/signal.o CC microblaze-linux-user/hax-stub.o CC i386-linux-user/linux-user/signal.o CC microblaze-linux-user/kvm-stub.o CC microblaze-linux-user/gdbstub.o CC microblazeel-linux-user/linux-user/elfload.o CC i386-linux-user/linux-user/elfload.o CC microblaze-linux-user/thunk.o CC microblazeel-linux-user/linux-user/linuxload.o CC microblaze-linux-user/user-exec.o CC i386-linux-user/linux-user/linuxload.o CC microblazeel-linux-user/linux-user/uaccess.o CC microblaze-linux-user/user-exec-stub.o CC i386-linux-user/linux-user/uaccess.o CC m68k-linux-user/linux-user/strace.o CC microblazeel-linux-user/linux-user/uname.o CC i386-linux-user/linux-user/uname.o CC microblaze-linux-user/linux-user/main.o CCAS microblazeel-linux-user/linux-user/safe-syscall.o CC microblazeel-linux-user/linux-user/flatload.o CCAS i386-linux-user/linux-user/safe-syscall.o CC i386-linux-user/linux-user/vm86.o CC microblaze-linux-user/linux-user/syscall.o CC m68k-linux-user/linux-user/mmap.o CC i386-linux-user/target/i386/translate.o CC microblazeel-linux-user/target/microblaze/translate.o CC m68k-linux-user/linux-user/signal.o CC m68k-linux-user/linux-user/elfload.o CC microblazeel-linux-user/target/microblaze/op_helper.o CC microblazeel-linux-user/target/microblaze/helper.o CC microblazeel-linux-user/target/microblaze/cpu.o CC m68k-linux-user/linux-user/linuxload.o CC microblazeel-linux-user/target/microblaze/gdbstub.o CC m68k-linux-user/linux-user/uaccess.o GEN trace/generated-helpers.c CC microblazeel-linux-user/trace/control-target.o CC m68k-linux-user/linux-user/uname.o CCAS m68k-linux-user/linux-user/safe-syscall.o CC m68k-linux-user/linux-user/flatload.o CC microblazeel-linux-user/trace/generated-helpers.o CC m68k-linux-user/linux-user/m68k-sim.o CC m68k-linux-user/target/m68k/m68k-semi.o LINK microblazeel-linux-user/qemu-microblazeel CC m68k-linux-user/target/m68k/translate.o CC microblaze-linux-user/linux-user/strace.o GEN mips64el-linux-user/config-target.h CC mips64el-linux-user/exec.o CC microblaze-linux-user/linux-user/mmap.o CC mips64el-linux-user/translate-all.o CC microblaze-linux-user/linux-user/signal.o CC i386-linux-user/target/i386/helper.o CC mips64el-linux-user/cpu-exec.o CC m68k-linux-user/target/m68k/op_helper.o CC i386-linux-user/target/i386/cpu.o CC microblaze-linux-user/linux-user/elfload.o CC mips64el-linux-user/translate-common.o CC m68k-linux-user/target/m68k/helper.o CC mips64el-linux-user/cpu-exec-common.o CC m68k-linux-user/target/m68k/cpu.o CC i386-linux-user/target/i386/bpt_helper.o CC microblaze-linux-user/linux-user/linuxload.o CC mips64el-linux-user/tcg/tcg.o CC m68k-linux-user/target/m68k/gdbstub.o CC i386-linux-user/target/i386/excp_helper.o CC microblaze-linux-user/linux-user/uaccess.o GEN trace/generated-helpers.c CC m68k-linux-user/trace/control-target.o CC i386-linux-user/target/i386/fpu_helper.o CC microblaze-linux-user/linux-user/uname.o CC m68k-linux-user/gdbstub-xml.o CCAS microblaze-linux-user/linux-user/safe-syscall.o CC microblaze-linux-user/linux-user/flatload.o CC m68k-linux-user/trace/generated-helpers.o LINK m68k-linux-user/qemu-m68k CC microblaze-linux-user/target/microblaze/translate.o CC i386-linux-user/target/i386/cc_helper.o CC mips64el-linux-user/tcg/tcg-op.o CC mips64el-linux-user/tcg/optimize.o CC i386-linux-user/target/i386/int_helper.o CC microblaze-linux-user/target/microblaze/op_helper.o CC i386-linux-user/target/i386/svm_helper.o CC microblaze-linux-user/target/microblaze/helper.o CC i386-linux-user/target/i386/smm_helper.o CC i386-linux-user/target/i386/misc_helper.o CC microblaze-linux-user/target/microblaze/cpu.o CC microblaze-linux-user/target/microblaze/gdbstub.o CC i386-linux-user/target/i386/mem_helper.o GEN trace/generated-helpers.c CC microblaze-linux-user/trace/control-target.o CC i386-linux-user/target/i386/seg_helper.o GEN mips64-linux-user/config-target.h CC mips64el-linux-user/tcg/tcg-common.o CC mips64-linux-user/exec.o CC microblaze-linux-user/trace/generated-helpers.o LINK microblaze-linux-user/qemu-microblaze CC mips64el-linux-user/fpu/softfloat.o CC mips64-linux-user/translate-all.o CC mips64-linux-user/cpu-exec.o GEN mipsel-linux-user/config-target.h CC mipsel-linux-user/exec.o CC mips64-linux-user/translate-common.o CC mipsel-linux-user/translate-all.o CC mips64-linux-user/cpu-exec-common.o CC i386-linux-user/target/i386/mpx_helper.o CC mipsel-linux-user/cpu-exec.o CC mips64-linux-user/tcg/tcg.o CC mipsel-linux-user/translate-common.o CC mipsel-linux-user/cpu-exec-common.o CC i386-linux-user/target/i386/gdbstub.o CC mipsel-linux-user/tcg/tcg.o CC i386-linux-user/target/i386/kvm-stub.o GEN trace/generated-helpers.c CC i386-linux-user/trace/control-target.o CC mips64el-linux-user/disas.o CC i386-linux-user/trace/generated-helpers.o CC mips64el-linux-user/tcg-runtime.o LINK i386-linux-user/qemu-i386 CC mips64-linux-user/tcg/tcg-op.o CC mipsel-linux-user/tcg/tcg-op.o CC mipsel-linux-user/tcg/optimize.o CC mips64el-linux-user/hax-stub.o CC mips64el-linux-user/kvm-stub.o CC mips64el-linux-user/gdbstub.o CC mips64-linux-user/tcg/optimize.o CC mips64el-linux-user/thunk.o CC mipsel-linux-user/tcg/tcg-common.o CC mips64-linux-user/tcg/tcg-common.o CC mips64el-linux-user/user-exec.o CC mipsel-linux-user/fpu/softfloat.o CC mips64el-linux-user/user-exec-stub.o CC mipsel-linux-user/disas.o CC mips64el-linux-user/linux-user/main.o CC mips64-linux-user/fpu/softfloat.o CC mips64-linux-user/disas.o CC mips64el-linux-user/linux-user/syscall.o CC mipsel-linux-user/tcg-runtime.o CC mips64-linux-user/tcg-runtime.o CC mipsel-linux-user/hax-stub.o CC mips64el-linux-user/linux-user/strace.o CC mipsel-linux-user/kvm-stub.o CC mipsel-linux-user/gdbstub.o GEN mips-linux-user/config-target.h CC mips64-linux-user/hax-stub.o CC mips-linux-user/exec.o CC mipsel-linux-user/thunk.o CC mips64-linux-user/kvm-stub.o CC mips-linux-user/translate-all.o CC mipsel-linux-user/user-exec.o CC mips64el-linux-user/linux-user/mmap.o CC mips64-linux-user/gdbstub.o CC mipsel-linux-user/user-exec-stub.o CC mips-linux-user/cpu-exec.o CC mips64-linux-user/thunk.o CC mips64el-linux-user/linux-user/signal.o CC mipsel-linux-user/linux-user/main.o CC mips-linux-user/translate-common.o CC mips64-linux-user/user-exec.o CC mips-linux-user/cpu-exec-common.o CC mips64-linux-user/user-exec-stub.o CC mipsel-linux-user/linux-user/syscall.o CC mips64el-linux-user/linux-user/elfload.o CC mips-linux-user/tcg/tcg.o CC mips64-linux-user/linux-user/main.o CC mips64-linux-user/linux-user/syscall.o CC mips64el-linux-user/linux-user/linuxload.o CC mips64el-linux-user/linux-user/uaccess.o CC mips64el-linux-user/linux-user/uname.o CC mips-linux-user/tcg/tcg-op.o CCAS mips64el-linux-user/linux-user/safe-syscall.o CC mips64el-linux-user/target/mips/translate.o CC mips64-linux-user/linux-user/strace.o CC mipsel-linux-user/linux-user/strace.o CC mips64-linux-user/linux-user/mmap.o CC mips-linux-user/tcg/optimize.o CC mips64-linux-user/linux-user/signal.o CC mipsel-linux-user/linux-user/mmap.o CC mips64-linux-user/linux-user/elfload.o CC mips-linux-user/tcg/tcg-common.o CC mipsel-linux-user/linux-user/signal.o CC mips-linux-user/fpu/softfloat.o CC mips64-linux-user/linux-user/linuxload.o CC mipsel-linux-user/linux-user/elfload.o CC mips64-linux-user/linux-user/uaccess.o CC mips64-linux-user/linux-user/uname.o CC mipsel-linux-user/linux-user/linuxload.o CCAS mips64-linux-user/linux-user/safe-syscall.o CC mips64-linux-user/target/mips/translate.o CC mips64el-linux-user/target/mips/dsp_helper.o CC mipsel-linux-user/linux-user/uaccess.o CC mipsel-linux-user/linux-user/uname.o CC mips-linux-user/disas.o CCAS mipsel-linux-user/linux-user/safe-syscall.o CC mipsel-linux-user/target/mips/translate.o CC mips-linux-user/tcg-runtime.o CC mips64el-linux-user/target/mips/op_helper.o CC mips-linux-user/hax-stub.o CC mips-linux-user/kvm-stub.o CC mips-linux-user/gdbstub.o CC mips-linux-user/thunk.o CC mips-linux-user/user-exec.o CC mips64el-linux-user/target/mips/lmi_helper.o CC mips-linux-user/user-exec-stub.o CC mips64el-linux-user/target/mips/helper.o CC mips-linux-user/linux-user/main.o CC mips64el-linux-user/target/mips/cpu.o CC mips-linux-user/linux-user/syscall.o CC mips64-linux-user/target/mips/dsp_helper.o CC mips64el-linux-user/target/mips/gdbstub.o CC mips64el-linux-user/target/mips/msa_helper.o CC mipsel-linux-user/target/mips/dsp_helper.o CC mips64-linux-user/target/mips/op_helper.o CC mipsel-linux-user/target/mips/op_helper.o CC mips-linux-user/linux-user/strace.o CC mips-linux-user/linux-user/mmap.o CC mips64-linux-user/target/mips/lmi_helper.o CC mips64el-linux-user/target/mips/mips-semi.o CC mips-linux-user/linux-user/signal.o GEN trace/generated-helpers.c CC mips64el-linux-user/trace/control-target.o CC mips64el-linux-user/trace/generated-helpers.o CC mips64-linux-user/target/mips/helper.o LINK mips64el-linux-user/qemu-mips64el CC mips64-linux-user/target/mips/cpu.o CC mips-linux-user/linux-user/elfload.o CC mipsel-linux-user/target/mips/lmi_helper.o CC mips-linux-user/linux-user/linuxload.o CC mips64-linux-user/target/mips/gdbstub.o CC mipsel-linux-user/target/mips/helper.o CC mips64-linux-user/target/mips/msa_helper.o CC mips-linux-user/linux-user/uaccess.o CC mipsel-linux-user/target/mips/cpu.o GEN mipsn32el-linux-user/config-target.h CC mipsn32el-linux-user/exec.o CC mips-linux-user/linux-user/uname.o CC mipsel-linux-user/target/mips/gdbstub.o CC mipsn32el-linux-user/translate-all.o CCAS mips-linux-user/linux-user/safe-syscall.o CC mips-linux-user/target/mips/translate.o CC mipsel-linux-user/target/mips/msa_helper.o CC mipsn32el-linux-user/cpu-exec.o CC mipsn32el-linux-user/translate-common.o CC mipsn32el-linux-user/cpu-exec-common.o CC mipsn32el-linux-user/tcg/tcg.o CC mips64-linux-user/target/mips/mips-semi.o GEN trace/generated-helpers.c CC mips64-linux-user/trace/control-target.o CC mips64-linux-user/trace/generated-helpers.o LINK mips64-linux-user/qemu-mips64 CC mipsel-linux-user/target/mips/mips-semi.o CC mipsn32el-linux-user/tcg/tcg-op.o GEN trace/generated-helpers.c GEN mipsn32-linux-user/config-target.h CC mipsel-linux-user/trace/control-target.o CC mipsn32-linux-user/exec.o CC mipsel-linux-user/trace/generated-helpers.o CC mipsn32-linux-user/translate-all.o LINK mipsel-linux-user/qemu-mipsel CC mips-linux-user/target/mips/dsp_helper.o CC mips-linux-user/target/mips/op_helper.o CC mipsn32-linux-user/cpu-exec.o CC mipsn32-linux-user/translate-common.o GEN nios2-linux-user/config-target.h CC mipsn32-linux-user/cpu-exec-common.o CC nios2-linux-user/exec.o CC mipsn32el-linux-user/tcg/optimize.o CC mipsn32-linux-user/tcg/tcg.o CC nios2-linux-user/translate-all.o CC nios2-linux-user/cpu-exec.o CC mips-linux-user/target/mips/lmi_helper.o CC mipsn32el-linux-user/tcg/tcg-common.o CC nios2-linux-user/translate-common.o CC mips-linux-user/target/mips/helper.o CC mipsn32el-linux-user/fpu/softfloat.o CC nios2-linux-user/cpu-exec-common.o CC mips-linux-user/target/mips/cpu.o CC mipsn32-linux-user/tcg/tcg-op.o CC nios2-linux-user/tcg/tcg.o CC mips-linux-user/target/mips/gdbstub.o CC mips-linux-user/target/mips/msa_helper.o CC nios2-linux-user/tcg/tcg-op.o CC mipsn32-linux-user/tcg/optimize.o CC mipsn32el-linux-user/disas.o CC mipsn32el-linux-user/tcg-runtime.o CC mipsn32el-linux-user/hax-stub.o CC mipsn32-linux-user/tcg/tcg-common.o CC mipsn32-linux-user/fpu/softfloat.o CC mipsn32el-linux-user/kvm-stub.o CC mipsn32el-linux-user/gdbstub.o CC nios2-linux-user/tcg/optimize.o CC mips-linux-user/target/mips/mips-semi.o GEN trace/generated-helpers.c CC mipsn32el-linux-user/thunk.o CC mips-linux-user/trace/control-target.o CC nios2-linux-user/tcg/tcg-common.o CC mips-linux-user/trace/generated-helpers.o CC mipsn32el-linux-user/user-exec.o CC nios2-linux-user/fpu/softfloat.o CC mipsn32el-linux-user/user-exec-stub.o LINK mips-linux-user/qemu-mips CC mipsn32el-linux-user/linux-user/main.o CC nios2-linux-user/disas.o CC mipsn32-linux-user/disas.o CC nios2-linux-user/tcg-runtime.o CC mipsn32el-linux-user/linux-user/syscall.o CC mipsn32-linux-user/tcg-runtime.o CC mipsn32-linux-user/hax-stub.o GEN or1k-linux-user/config-target.h CC or1k-linux-user/exec.o CC mipsn32-linux-user/kvm-stub.o CC nios2-linux-user/hax-stub.o CC nios2-linux-user/kvm-stub.o CC or1k-linux-user/translate-all.o CC mipsn32-linux-user/gdbstub.o CC nios2-linux-user/gdbstub.o CC or1k-linux-user/cpu-exec.o CC or1k-linux-user/translate-common.o CC nios2-linux-user/thunk.o CC mipsn32-linux-user/thunk.o CC or1k-linux-user/cpu-exec-common.o CC or1k-linux-user/tcg/tcg.o CC nios2-linux-user/user-exec.o CC mipsn32-linux-user/user-exec.o CC nios2-linux-user/user-exec-stub.o CC mipsn32-linux-user/user-exec-stub.o CC mipsn32el-linux-user/linux-user/strace.o CC nios2-linux-user/linux-user/main.o CC mipsn32-linux-user/linux-user/main.o CC mipsn32el-linux-user/linux-user/mmap.o CC nios2-linux-user/linux-user/syscall.o CC or1k-linux-user/tcg/tcg-op.o CC mipsn32-linux-user/linux-user/syscall.o CC mipsn32el-linux-user/linux-user/signal.o CC mipsn32el-linux-user/linux-user/elfload.o CC mipsn32el-linux-user/linux-user/linuxload.o CC mipsn32el-linux-user/linux-user/uaccess.o CC mipsn32el-linux-user/linux-user/uname.o CC or1k-linux-user/tcg/optimize.o CC nios2-linux-user/linux-user/strace.o CCAS mipsn32el-linux-user/linux-user/safe-syscall.o CC mipsn32el-linux-user/target/mips/translate.o CC nios2-linux-user/linux-user/mmap.o CC or1k-linux-user/tcg/tcg-common.o CC mipsn32-linux-user/linux-user/strace.o CC nios2-linux-user/linux-user/signal.o CC or1k-linux-user/fpu/softfloat.o CC nios2-linux-user/linux-user/elfload.o CC mipsn32-linux-user/linux-user/mmap.o CC mipsn32-linux-user/linux-user/signal.o CC nios2-linux-user/linux-user/linuxload.o CC mipsn32-linux-user/linux-user/elfload.o CC nios2-linux-user/linux-user/uaccess.o CC nios2-linux-user/linux-user/uname.o CC mipsn32-linux-user/linux-user/linuxload.o CC or1k-linux-user/disas.o CCAS nios2-linux-user/linux-user/safe-syscall.o CC nios2-linux-user/target/nios2/translate.o CC or1k-linux-user/tcg-runtime.o CC mipsn32-linux-user/linux-user/uaccess.o CC nios2-linux-user/target/nios2/op_helper.o CC mipsn32-linux-user/linux-user/uname.o CC nios2-linux-user/target/nios2/helper.o CC or1k-linux-user/hax-stub.o CCAS mipsn32-linux-user/linux-user/safe-syscall.o CC mipsn32-linux-user/target/mips/translate.o CC nios2-linux-user/target/nios2/cpu.o CC or1k-linux-user/kvm-stub.o CC mipsn32el-linux-user/target/mips/dsp_helper.o CC or1k-linux-user/gdbstub.o CC nios2-linux-user/target/nios2/mmu.o GEN trace/generated-helpers.c CC nios2-linux-user/trace/control-target.o CC or1k-linux-user/thunk.o CC nios2-linux-user/trace/generated-helpers.o CC mipsn32el-linux-user/target/mips/op_helper.o LINK nios2-linux-user/qemu-nios2 CC or1k-linux-user/user-exec.o CC or1k-linux-user/user-exec-stub.o GEN ppc64abi32-linux-user/config-target.h CC ppc64abi32-linux-user/exec.o CC or1k-linux-user/linux-user/main.o CC or1k-linux-user/linux-user/syscall.o CC ppc64abi32-linux-user/translate-all.o CC ppc64abi32-linux-user/cpu-exec.o CC ppc64abi32-linux-user/translate-common.o CC mipsn32el-linux-user/target/mips/lmi_helper.o CC ppc64abi32-linux-user/cpu-exec-common.o CC ppc64abi32-linux-user/tcg/tcg.o CC mipsn32el-linux-user/target/mips/helper.o CC mipsn32el-linux-user/target/mips/cpu.o CC mipsn32el-linux-user/target/mips/gdbstub.o CC mipsn32-linux-user/target/mips/dsp_helper.o CC or1k-linux-user/linux-user/strace.o CC mipsn32el-linux-user/target/mips/msa_helper.o CC ppc64abi32-linux-user/tcg/tcg-op.o CC or1k-linux-user/linux-user/mmap.o CC mipsn32-linux-user/target/mips/op_helper.o CC or1k-linux-user/linux-user/signal.o CC or1k-linux-user/linux-user/elfload.o CC or1k-linux-user/linux-user/linuxload.o CC ppc64abi32-linux-user/tcg/optimize.o CC or1k-linux-user/linux-user/uaccess.o CC or1k-linux-user/linux-user/uname.o CCAS or1k-linux-user/linux-user/safe-syscall.o CC mipsn32-linux-user/target/mips/lmi_helper.o CC or1k-linux-user/target/openrisc/cpu.o CC or1k-linux-user/target/openrisc/exception.o CC ppc64abi32-linux-user/tcg/tcg-common.o CC mipsn32-linux-user/target/mips/helper.o CC ppc64abi32-linux-user/fpu/softfloat.o CC or1k-linux-user/target/openrisc/interrupt.o CC mipsn32-linux-user/target/mips/cpu.o CC or1k-linux-user/target/openrisc/mmu.o CC mipsn32el-linux-user/target/mips/mips-semi.o CC mipsn32-linux-user/target/mips/gdbstub.o CC or1k-linux-user/target/openrisc/translate.o GEN trace/generated-helpers.c CC mipsn32el-linux-user/trace/control-target.o CC mipsn32-linux-user/target/mips/msa_helper.o CC mipsn32el-linux-user/trace/generated-helpers.o CC or1k-linux-user/target/openrisc/exception_helper.o LINK mipsn32el-linux-user/qemu-mipsn32el CC or1k-linux-user/target/openrisc/fpu_helper.o CC mipsn32-linux-user/target/mips/mips-semi.o CC or1k-linux-user/target/openrisc/interrupt_helper.o CC ppc64abi32-linux-user/disas.o CC or1k-linux-user/target/openrisc/mmu_helper.o GEN ppc64le-linux-user/config-target.h CC ppc64abi32-linux-user/tcg-runtime.o CC or1k-linux-user/target/openrisc/sys_helper.o CC ppc64le-linux-user/exec.o CC or1k-linux-user/target/openrisc/gdbstub.o GEN ppc64abi32-linux-user/gdbstub-xml.c CC ppc64le-linux-user/translate-all.o GEN trace/generated-helpers.c CC or1k-linux-user/trace/control-target.o CC or1k-linux-user/trace/generated-helpers.o CC ppc64le-linux-user/cpu-exec.o LINK or1k-linux-user/qemu-or1k CC ppc64abi32-linux-user/hax-stub.o CC ppc64le-linux-user/translate-common.o GEN trace/generated-helpers.c CC mipsn32-linux-user/trace/control-target.o CC ppc64abi32-linux-user/kvm-stub.o CC ppc64abi32-linux-user/libdecnumber/decContext.o CC ppc64le-linux-user/cpu-exec-common.o CC ppc64abi32-linux-user/libdecnumber/decNumber.o CC mipsn32-linux-user/trace/generated-helpers.o CC ppc64le-linux-user/tcg/tcg.o LINK mipsn32-linux-user/qemu-mipsn32 GEN ppc64-linux-user/config-target.h CC ppc64-linux-user/exec.o CC ppc64-linux-user/translate-all.o CC ppc64abi32-linux-user/libdecnumber/dpd/decimal32.o CC ppc64-linux-user/cpu-exec.o CC ppc64abi32-linux-user/libdecnumber/dpd/decimal64.o GEN ppc-linux-user/config-target.h CC ppc64-linux-user/translate-common.o CC ppc-linux-user/exec.o CC ppc64abi32-linux-user/libdecnumber/dpd/decimal128.o CC ppc-linux-user/translate-all.o CC ppc64le-linux-user/tcg/tcg-op.o CC ppc64-linux-user/cpu-exec-common.o CC ppc64abi32-linux-user/gdbstub.o CC ppc64-linux-user/tcg/tcg.o CC ppc-linux-user/cpu-exec.o CC ppc64abi32-linux-user/thunk.o CC ppc-linux-user/translate-common.o CC ppc64abi32-linux-user/user-exec.o CC ppc-linux-user/cpu-exec-common.o CC ppc64abi32-linux-user/user-exec-stub.o CC ppc-linux-user/tcg/tcg.o CC ppc64abi32-linux-user/linux-user/main.o CC ppc64abi32-linux-user/linux-user/syscall.o CC ppc64le-linux-user/tcg/optimize.o CC ppc64-linux-user/tcg/tcg-op.o CC ppc-linux-user/tcg/tcg-op.o CC ppc64le-linux-user/tcg/tcg-common.o CC ppc64le-linux-user/fpu/softfloat.o CC ppc64-linux-user/tcg/optimize.o CC ppc-linux-user/tcg/optimize.o CC ppc64abi32-linux-user/linux-user/strace.o CC ppc64-linux-user/tcg/tcg-common.o CC ppc64abi32-linux-user/linux-user/mmap.o CC ppc-linux-user/tcg/tcg-common.o CC ppc64le-linux-user/disas.o CC ppc64-linux-user/fpu/softfloat.o CC ppc-linux-user/fpu/softfloat.o CC ppc64abi32-linux-user/linux-user/signal.o CC ppc64le-linux-user/tcg-runtime.o CC ppc64abi32-linux-user/linux-user/elfload.o GEN ppc64le-linux-user/gdbstub-xml.c CC ppc64abi32-linux-user/linux-user/linuxload.o CC ppc64le-linux-user/hax-stub.o CC ppc64abi32-linux-user/linux-user/uaccess.o CC ppc64abi32-linux-user/linux-user/uname.o CC ppc64le-linux-user/kvm-stub.o CC ppc-linux-user/disas.o CCAS ppc64abi32-linux-user/linux-user/safe-syscall.o CC ppc64le-linux-user/libdecnumber/decContext.o CC ppc64abi32-linux-user/target/ppc/cpu-models.o CC ppc-linux-user/tcg-runtime.o CC ppc64-linux-user/disas.o CC ppc64le-linux-user/libdecnumber/decNumber.o CC ppc64-linux-user/tcg-runtime.o GEN ppc-linux-user/gdbstub-xml.c GEN ppc64-linux-user/gdbstub-xml.c CC ppc64abi32-linux-user/target/ppc/translate.o CC ppc-linux-user/hax-stub.o CC ppc64le-linux-user/libdecnumber/dpd/decimal32.o CC ppc-linux-user/kvm-stub.o CC ppc-linux-user/libdecnumber/decContext.o CC ppc-linux-user/libdecnumber/decNumber.o CC ppc64-linux-user/hax-stub.o CC ppc64le-linux-user/libdecnumber/dpd/decimal64.o CC ppc64-linux-user/kvm-stub.o CC ppc64le-linux-user/libdecnumber/dpd/decimal128.o CC ppc64-linux-user/libdecnumber/decContext.o CC ppc64le-linux-user/gdbstub.o CC ppc64-linux-user/libdecnumber/decNumber.o CC ppc-linux-user/libdecnumber/dpd/decimal32.o CC ppc-linux-user/libdecnumber/dpd/decimal64.o CC ppc64le-linux-user/thunk.o CC ppc-linux-user/libdecnumber/dpd/decimal128.o CC ppc64le-linux-user/user-exec.o CC ppc-linux-user/gdbstub.o CC ppc64-linux-user/libdecnumber/dpd/decimal32.o CC ppc64le-linux-user/user-exec-stub.o CC ppc64-linux-user/libdecnumber/dpd/decimal64.o CC ppc-linux-user/thunk.o CC ppc64le-linux-user/linux-user/main.o CC ppc-linux-user/user-exec.o CC ppc64-linux-user/libdecnumber/dpd/decimal128.o CC ppc-linux-user/user-exec-stub.o CC ppc64-linux-user/gdbstub.o CC ppc64le-linux-user/linux-user/syscall.o CC ppc-linux-user/linux-user/main.o CC ppc64-linux-user/thunk.o CC ppc-linux-user/linux-user/syscall.o CC ppc64-linux-user/user-exec.o CC ppc64-linux-user/user-exec-stub.o CC ppc64-linux-user/linux-user/main.o CC ppc64-linux-user/linux-user/syscall.o CC ppc64le-linux-user/linux-user/strace.o CC ppc64le-linux-user/linux-user/mmap.o CC ppc-linux-user/linux-user/strace.o CC ppc64le-linux-user/linux-user/signal.o CC ppc64-linux-user/linux-user/strace.o CC ppc-linux-user/linux-user/mmap.o CC ppc64le-linux-user/linux-user/elfload.o CC ppc-linux-user/linux-user/signal.o CC ppc64-linux-user/linux-user/mmap.o CC ppc64le-linux-user/linux-user/linuxload.o CC ppc64abi32-linux-user/target/ppc/kvm-stub.o CC ppc64-linux-user/linux-user/signal.o CC ppc64abi32-linux-user/target/ppc/dfp_helper.o CC ppc-linux-user/linux-user/elfload.o CC ppc64le-linux-user/linux-user/uaccess.o CC ppc64-linux-user/linux-user/elfload.o CC ppc64le-linux-user/linux-user/uname.o CCAS ppc64le-linux-user/linux-user/safe-syscall.o CC ppc64le-linux-user/target/ppc/cpu-models.o CC ppc64-linux-user/linux-user/linuxload.o CC ppc-linux-user/linux-user/linuxload.o CC ppc64abi32-linux-user/target/ppc/excp_helper.o CC ppc64-linux-user/linux-user/uaccess.o CC ppc-linux-user/linux-user/uaccess.o CC ppc64abi32-linux-user/target/ppc/fpu_helper.o CC ppc-linux-user/linux-user/uname.o CC ppc64-linux-user/linux-user/uname.o CCAS ppc-linux-user/linux-user/safe-syscall.o CCAS ppc64-linux-user/linux-user/safe-syscall.o CC ppc-linux-user/target/ppc/cpu-models.o CC ppc64-linux-user/target/ppc/cpu-models.o CC ppc64le-linux-user/target/ppc/translate.o CC ppc-linux-user/target/ppc/translate.o CC ppc64-linux-user/target/ppc/translate.o CC ppc64abi32-linux-user/target/ppc/int_helper.o CC ppc64abi32-linux-user/target/ppc/timebase_helper.o CC ppc64abi32-linux-user/target/ppc/misc_helper.o CC ppc64abi32-linux-user/target/ppc/mem_helper.o CC ppc64abi32-linux-user/target/ppc/user_only_helper.o CC ppc64abi32-linux-user/target/ppc/gdbstub.o GEN trace/generated-helpers.c CC ppc64abi32-linux-user/trace/control-target.o CC ppc64abi32-linux-user/gdbstub-xml.o CC ppc64abi32-linux-user/trace/generated-helpers.o LINK ppc64abi32-linux-user/qemu-ppc64abi32 CC ppc-linux-user/target/ppc/kvm-stub.o CC ppc-linux-user/target/ppc/dfp_helper.o CC ppc64-linux-user/target/ppc/kvm-stub.o CC ppc64-linux-user/target/ppc/dfp_helper.o CC ppc64le-linux-user/target/ppc/kvm-stub.o CC ppc-linux-user/target/ppc/excp_helper.o CC ppc64le-linux-user/target/ppc/dfp_helper.o CC ppc-linux-user/target/ppc/fpu_helper.o CC ppc-linux-user/target/ppc/int_helper.o CC ppc64le-linux-user/target/ppc/excp_helper.o CC ppc64le-linux-user/target/ppc/fpu_helper.o CC ppc64-linux-user/target/ppc/excp_helper.o CC ppc-linux-user/target/ppc/timebase_helper.o CC ppc64-linux-user/target/ppc/fpu_helper.o CC ppc64le-linux-user/target/ppc/int_helper.o CC ppc64le-linux-user/target/ppc/timebase_helper.o CC ppc64le-linux-user/target/ppc/misc_helper.o CC ppc-linux-user/target/ppc/misc_helper.o CC ppc64le-linux-user/target/ppc/mem_helper.o CC ppc-linux-user/target/ppc/mem_helper.o CC ppc64le-linux-user/target/ppc/user_only_helper.o CC ppc64le-linux-user/target/ppc/gdbstub.o GEN trace/generated-helpers.c CC ppc-linux-user/target/ppc/user_only_helper.o CC ppc64le-linux-user/trace/control-target.o CC ppc-linux-user/target/ppc/gdbstub.o CC ppc64-linux-user/target/ppc/int_helper.o CC ppc64le-linux-user/gdbstub-xml.o GEN trace/generated-helpers.c CC ppc-linux-user/trace/control-target.o CC ppc64le-linux-user/trace/generated-helpers.o CC ppc-linux-user/gdbstub-xml.o LINK ppc64le-linux-user/qemu-ppc64le CC ppc-linux-user/trace/generated-helpers.o CC s390x-linux-user/gen-features GEN s390x-linux-user/config-target.h GEN s390x-linux-user/gen-features.h CC s390x-linux-user/exec.o LINK ppc-linux-user/qemu-ppc CC ppc64-linux-user/target/ppc/timebase_helper.o CC s390x-linux-user/translate-all.o CC ppc64-linux-user/target/ppc/misc_helper.o CC ppc64-linux-user/target/ppc/mem_helper.o GEN sh4eb-linux-user/config-target.h CC s390x-linux-user/cpu-exec.o CC sh4eb-linux-user/exec.o CC ppc64-linux-user/target/ppc/user_only_helper.o GEN sh4-linux-user/config-target.h CC sh4-linux-user/exec.o CC ppc64-linux-user/target/ppc/gdbstub.o CC s390x-linux-user/translate-common.o CC sh4eb-linux-user/translate-all.o CC sh4-linux-user/translate-all.o CC s390x-linux-user/cpu-exec-common.o GEN trace/generated-helpers.c CC ppc64-linux-user/trace/control-target.o CC s390x-linux-user/tcg/tcg.o CC sh4eb-linux-user/cpu-exec.o CC ppc64-linux-user/gdbstub-xml.o CC sh4eb-linux-user/translate-common.o CC sh4-linux-user/cpu-exec.o CC sh4eb-linux-user/cpu-exec-common.o CC ppc64-linux-user/trace/generated-helpers.o CC sh4eb-linux-user/tcg/tcg.o CC sh4-linux-user/translate-common.o LINK ppc64-linux-user/qemu-ppc64 CC sh4-linux-user/cpu-exec-common.o CC s390x-linux-user/tcg/tcg-op.o CC sh4-linux-user/tcg/tcg.o CC s390x-linux-user/tcg/optimize.o CC s390x-linux-user/tcg/tcg-common.o CC sh4eb-linux-user/tcg/tcg-op.o CC s390x-linux-user/fpu/softfloat.o CC sh4-linux-user/tcg/tcg-op.o CC s390x-linux-user/disas.o CC s390x-linux-user/tcg-runtime.o GEN s390x-linux-user/gdbstub-xml.c CC sh4eb-linux-user/tcg/optimize.o CC sh4-linux-user/tcg/optimize.o CC s390x-linux-user/hax-stub.o CC s390x-linux-user/kvm-stub.o CC s390x-linux-user/gdbstub.o CC sh4eb-linux-user/tcg/tcg-common.o CC s390x-linux-user/thunk.o CC s390x-linux-user/user-exec.o CC sh4eb-linux-user/fpu/softfloat.o CC sh4-linux-user/tcg/tcg-common.o CC s390x-linux-user/user-exec-stub.o CC sh4-linux-user/fpu/softfloat.o CC s390x-linux-user/linux-user/main.o CC sh4-linux-user/disas.o CC sh4-linux-user/tcg-runtime.o CC s390x-linux-user/linux-user/syscall.o CC sh4-linux-user/hax-stub.o CC sh4-linux-user/kvm-stub.o CC sh4-linux-user/gdbstub.o CC sh4eb-linux-user/disas.o CC sh4-linux-user/thunk.o CC sh4eb-linux-user/tcg-runtime.o CC sh4-linux-user/user-exec.o CC sh4-linux-user/user-exec-stub.o CC s390x-linux-user/linux-user/strace.o CC sh4-linux-user/linux-user/main.o CC sh4eb-linux-user/hax-stub.o CC sh4eb-linux-user/kvm-stub.o CC sh4-linux-user/linux-user/syscall.o CC s390x-linux-user/linux-user/mmap.o CC s390x-linux-user/linux-user/signal.o CC sh4eb-linux-user/gdbstub.o CC sh4eb-linux-user/thunk.o CC s390x-linux-user/linux-user/elfload.o CC s390x-linux-user/linux-user/linuxload.o CC sh4eb-linux-user/user-exec.o CC sh4eb-linux-user/user-exec-stub.o GEN sparc32plus-linux-user/config-target.h CC sh4eb-linux-user/linux-user/main.o CC sparc32plus-linux-user/exec.o CC s390x-linux-user/linux-user/uaccess.o CC sh4eb-linux-user/linux-user/syscall.o CC sparc32plus-linux-user/translate-all.o CC s390x-linux-user/linux-user/uname.o CC sparc32plus-linux-user/cpu-exec.o CCAS s390x-linux-user/linux-user/safe-syscall.o CC s390x-linux-user/target/s390x/translate.o CC sparc32plus-linux-user/translate-common.o CC sparc32plus-linux-user/cpu-exec-common.o CC sparc32plus-linux-user/tcg/tcg.o CC sh4-linux-user/linux-user/strace.o CC sh4-linux-user/linux-user/mmap.o CC sparc32plus-linux-user/tcg/tcg-op.o CC s390x-linux-user/target/s390x/helper.o CC sh4-linux-user/linux-user/signal.o CC s390x-linux-user/target/s390x/cpu.o CC s390x-linux-user/target/s390x/interrupt.o CC sh4eb-linux-user/linux-user/strace.o CC sh4-linux-user/linux-user/elfload.o CC s390x-linux-user/target/s390x/int_helper.o CC s390x-linux-user/target/s390x/fpu_helper.o CC sh4-linux-user/linux-user/linuxload.o CC sh4eb-linux-user/linux-user/mmap.o CC sh4-linux-user/linux-user/uaccess.o CC s390x-linux-user/target/s390x/cc_helper.o CC sh4-linux-user/linux-user/uname.o CC sh4eb-linux-user/linux-user/signal.o CC s390x-linux-user/target/s390x/mem_helper.o CC sparc32plus-linux-user/tcg/optimize.o CCAS sh4-linux-user/linux-user/safe-syscall.o CC sh4-linux-user/linux-user/flatload.o CC sh4eb-linux-user/linux-user/elfload.o CC s390x-linux-user/target/s390x/misc_helper.o CC sh4-linux-user/target/sh4/translate.o CC sparc32plus-linux-user/tcg/tcg-common.o CC s390x-linux-user/target/s390x/gdbstub.o CC sparc32plus-linux-user/fpu/softfloat.o CC sh4eb-linux-user/linux-user/linuxload.o CC s390x-linux-user/target/s390x/cpu_models.o CC sh4eb-linux-user/linux-user/uaccess.o CC s390x-linux-user/target/s390x/cpu_features.o CC sh4eb-linux-user/linux-user/uname.o GEN trace/generated-helpers.c CC s390x-linux-user/trace/control-target.o CCAS sh4eb-linux-user/linux-user/safe-syscall.o CC s390x-linux-user/gdbstub-xml.o CC sh4eb-linux-user/linux-user/flatload.o CC s390x-linux-user/trace/generated-helpers.o CC sh4-linux-user/target/sh4/op_helper.o CC sh4eb-linux-user/target/sh4/translate.o LINK s390x-linux-user/qemu-s390x CC sh4-linux-user/target/sh4/helper.o CC sparc32plus-linux-user/disas.o CC sh4-linux-user/target/sh4/cpu.o CC sh4-linux-user/target/sh4/gdbstub.o GEN sparc64-linux-user/config-target.h CC sparc32plus-linux-user/tcg-runtime.o GEN trace/generated-helpers.c CC sparc64-linux-user/exec.o CC sh4-linux-user/trace/control-target.o CC sparc64-linux-user/translate-all.o CC sh4-linux-user/trace/generated-helpers.o CC sparc32plus-linux-user/hax-stub.o CC sparc64-linux-user/cpu-exec.o LINK sh4-linux-user/qemu-sh4 CC sparc32plus-linux-user/kvm-stub.o CC sh4eb-linux-user/target/sh4/op_helper.o CC sparc32plus-linux-user/gdbstub.o CC sh4eb-linux-user/target/sh4/helper.o CC sparc64-linux-user/translate-common.o CC sh4eb-linux-user/target/sh4/cpu.o CC sh4eb-linux-user/target/sh4/gdbstub.o CC sparc64-linux-user/cpu-exec-common.o GEN sparc-linux-user/config-target.h CC sparc-linux-user/exec.o GEN trace/generated-helpers.c CC sparc32plus-linux-user/thunk.o CC sh4eb-linux-user/trace/control-target.o CC sparc64-linux-user/tcg/tcg.o CC sparc32plus-linux-user/user-exec.o CC sh4eb-linux-user/trace/generated-helpers.o CC sparc-linux-user/translate-all.o LINK sh4eb-linux-user/qemu-sh4eb CC sparc32plus-linux-user/user-exec-stub.o CC sparc-linux-user/cpu-exec.o CC sparc32plus-linux-user/linux-user/main.o GEN tilegx-linux-user/config-target.h CC tilegx-linux-user/exec.o CC sparc-linux-user/translate-common.o CC sparc-linux-user/cpu-exec-common.o CC tilegx-linux-user/translate-all.o CC sparc32plus-linux-user/linux-user/syscall.o CC sparc64-linux-user/tcg/tcg-op.o CC sparc-linux-user/tcg/tcg.o CC tilegx-linux-user/cpu-exec.o CC tilegx-linux-user/translate-common.o CC tilegx-linux-user/cpu-exec-common.o CC tilegx-linux-user/tcg/tcg.o CC sparc64-linux-user/tcg/optimize.o CC sparc-linux-user/tcg/tcg-op.o CC sparc64-linux-user/tcg/tcg-common.o CC sparc64-linux-user/fpu/softfloat.o CC tilegx-linux-user/tcg/tcg-op.o CC sparc32plus-linux-user/linux-user/strace.o CC sparc32plus-linux-user/linux-user/mmap.o CC sparc-linux-user/tcg/optimize.o CC sparc32plus-linux-user/linux-user/signal.o CC sparc-linux-user/tcg/tcg-common.o CC sparc32plus-linux-user/linux-user/elfload.o CC sparc-linux-user/fpu/softfloat.o CC tilegx-linux-user/tcg/optimize.o CC sparc32plus-linux-user/linux-user/linuxload.o CC sparc64-linux-user/disas.o CC sparc32plus-linux-user/linux-user/uaccess.o CC tilegx-linux-user/tcg/tcg-common.o CC sparc32plus-linux-user/linux-user/uname.o CC sparc64-linux-user/tcg-runtime.o CC tilegx-linux-user/fpu/softfloat.o CCAS sparc32plus-linux-user/linux-user/safe-syscall.o CC sparc32plus-linux-user/target/sparc/translate.o CC sparc64-linux-user/hax-stub.o CC sparc64-linux-user/kvm-stub.o CC sparc64-linux-user/gdbstub.o CC sparc-linux-user/disas.o CC sparc-linux-user/tcg-runtime.o CC sparc64-linux-user/thunk.o CC tilegx-linux-user/disas.o CC sparc64-linux-user/user-exec.o CC tilegx-linux-user/tcg-runtime.o CC sparc-linux-user/hax-stub.o CC sparc32plus-linux-user/target/sparc/helper.o CC sparc64-linux-user/user-exec-stub.o CC sparc32plus-linux-user/target/sparc/cpu.o CC sparc-linux-user/kvm-stub.o CC tilegx-linux-user/hax-stub.o CC sparc-linux-user/gdbstub.o CC sparc64-linux-user/linux-user/main.o CC tilegx-linux-user/kvm-stub.o CC sparc32plus-linux-user/target/sparc/fop_helper.o CC sparc64-linux-user/linux-user/syscall.o CC sparc-linux-user/thunk.o CC tilegx-linux-user/gdbstub.o CC sparc32plus-linux-user/target/sparc/cc_helper.o CC sparc-linux-user/user-exec.o CC sparc32plus-linux-user/target/sparc/win_helper.o CC sparc-linux-user/user-exec-stub.o CC tilegx-linux-user/thunk.o CC sparc-linux-user/linux-user/main.o CC sparc32plus-linux-user/target/sparc/mmu_helper.o CC sparc-linux-user/linux-user/syscall.o CC tilegx-linux-user/user-exec.o CC sparc32plus-linux-user/target/sparc/ldst_helper.o CC tilegx-linux-user/user-exec-stub.o CC sparc32plus-linux-user/target/sparc/int64_helper.o CC tilegx-linux-user/linux-user/main.o CC sparc32plus-linux-user/target/sparc/vis_helper.o CC tilegx-linux-user/linux-user/syscall.o CC sparc32plus-linux-user/target/sparc/gdbstub.o GEN trace/generated-helpers.c CC sparc32plus-linux-user/trace/control-target.o CC sparc64-linux-user/linux-user/strace.o CC sparc32plus-linux-user/trace/generated-helpers.o CC sparc64-linux-user/linux-user/mmap.o LINK sparc32plus-linux-user/qemu-sparc32plus CC sparc64-linux-user/linux-user/signal.o CC tilegx-linux-user/linux-user/strace.o CC sparc-linux-user/linux-user/strace.o CC sparc64-linux-user/linux-user/elfload.o CC sparc-linux-user/linux-user/mmap.o CC tilegx-linux-user/linux-user/mmap.o CC sparc-linux-user/linux-user/signal.o CC sparc64-linux-user/linux-user/linuxload.o CC sparc-linux-user/linux-user/elfload.o CC sparc64-linux-user/linux-user/uaccess.o CC tilegx-linux-user/linux-user/signal.o CC sparc-linux-user/linux-user/linuxload.o CC sparc64-linux-user/linux-user/uname.o CC tilegx-linux-user/linux-user/elfload.o CC sparc-linux-user/linux-user/uaccess.o CCAS sparc64-linux-user/linux-user/safe-syscall.o CC sparc-linux-user/linux-user/uname.o CC sparc64-linux-user/target/sparc/translate.o CC tilegx-linux-user/linux-user/linuxload.o CCAS sparc-linux-user/linux-user/safe-syscall.o CC tilegx-linux-user/linux-user/uaccess.o CC sparc-linux-user/target/sparc/translate.o CC sparc-linux-user/target/sparc/helper.o CC tilegx-linux-user/linux-user/uname.o CCAS tilegx-linux-user/linux-user/safe-syscall.o CC tilegx-linux-user/target/tilegx/cpu.o CC sparc-linux-user/target/sparc/cpu.o CC tilegx-linux-user/target/tilegx/translate.o CC tilegx-linux-user/target/tilegx/helper.o CC sparc-linux-user/target/sparc/fop_helper.o CC sparc-linux-user/target/sparc/cc_helper.o CC sparc64-linux-user/target/sparc/helper.o CC tilegx-linux-user/target/tilegx/simd_helper.o CC sparc-linux-user/target/sparc/win_helper.o CC sparc-linux-user/target/sparc/mmu_helper.o CC sparc64-linux-user/target/sparc/cpu.o GEN trace/generated-helpers.c CC tilegx-linux-user/trace/control-target.o CC sparc-linux-user/target/sparc/ldst_helper.o CC sparc64-linux-user/target/sparc/fop_helper.o CC tilegx-linux-user/trace/generated-helpers.o GEN x86_64-linux-user/config-target.h CC x86_64-linux-user/exec.o CC sparc-linux-user/target/sparc/int32_helper.o CC sparc64-linux-user/target/sparc/cc_helper.o LINK tilegx-linux-user/qemu-tilegx CC sparc-linux-user/target/sparc/gdbstub.o CC x86_64-linux-user/translate-all.o CC sparc64-linux-user/target/sparc/win_helper.o GEN trace/generated-helpers.c CC sparc-linux-user/trace/control-target.o CC x86_64-linux-user/cpu-exec.o CC sparc64-linux-user/target/sparc/mmu_helper.o CC sparc-linux-user/trace/generated-helpers.o CC x86_64-linux-user/translate-common.o CC sparc64-linux-user/target/sparc/ldst_helper.o CC x86_64-linux-user/cpu-exec-common.o LINK sparc-linux-user/qemu-sparc CC sparc64-linux-user/target/sparc/int64_helper.o CC sparc64-linux-user/target/sparc/vis_helper.o CC x86_64-linux-user/tcg/tcg.o CC sparc64-linux-user/target/sparc/gdbstub.o CC x86_64-linux-user/tcg/tcg-op.o CC x86_64-linux-user/tcg/optimize.o GEN trace/generated-helpers.c CC sparc64-linux-user/trace/control-target.o CC sparc64-linux-user/trace/generated-helpers.o CC x86_64-linux-user/tcg/tcg-common.o LINK sparc64-linux-user/qemu-sparc64 CC x86_64-linux-user/fpu/softfloat.o CC x86_64-linux-user/disas.o CC x86_64-linux-user/tcg-runtime.o CC x86_64-linux-user/hax-stub.o CC x86_64-linux-user/kvm-stub.o CC x86_64-linux-user/gdbstub.o CC x86_64-linux-user/thunk.o CC x86_64-linux-user/user-exec.o CC x86_64-linux-user/user-exec-stub.o CC x86_64-linux-user/linux-user/main.o CC x86_64-linux-user/linux-user/syscall.o CC x86_64-linux-user/linux-user/strace.o CC x86_64-linux-user/linux-user/mmap.o CC x86_64-linux-user/linux-user/signal.o CC x86_64-linux-user/linux-user/elfload.o CC x86_64-linux-user/linux-user/linuxload.o CC x86_64-linux-user/linux-user/uaccess.o CC x86_64-linux-user/linux-user/uname.o CCAS x86_64-linux-user/linux-user/safe-syscall.o CC x86_64-linux-user/target/i386/translate.o CC x86_64-linux-user/target/i386/helper.o CC x86_64-linux-user/target/i386/cpu.o CC x86_64-linux-user/target/i386/bpt_helper.o CC x86_64-linux-user/target/i386/excp_helper.o CC x86_64-linux-user/target/i386/fpu_helper.o CC x86_64-linux-user/target/i386/cc_helper.o CC x86_64-linux-user/target/i386/int_helper.o CC x86_64-linux-user/target/i386/svm_helper.o CC x86_64-linux-user/target/i386/smm_helper.o CC x86_64-linux-user/target/i386/misc_helper.o CC x86_64-linux-user/target/i386/mem_helper.o CC x86_64-linux-user/target/i386/seg_helper.o CC x86_64-linux-user/target/i386/mpx_helper.o CC x86_64-linux-user/target/i386/gdbstub.o CC x86_64-linux-user/target/i386/kvm-stub.o GEN trace/generated-helpers.c CC x86_64-linux-user/trace/control-target.o CC x86_64-linux-user/trace/generated-helpers.o LINK x86_64-linux-user/qemu-x86_64 TEST tests/qapi-schema/alternate-array.out TEST tests/qapi-schema/alternate-clash.out TEST tests/qapi-schema/alternate-base.out TEST tests/qapi-schema/alternate-any.out TEST tests/qapi-schema/alternate-conflict-dict.out TEST tests/qapi-schema/alternate-empty.out TEST tests/qapi-schema/alternate-nested.out TEST tests/qapi-schema/alternate-conflict-string.out TEST tests/qapi-schema/alternate-unknown.out TEST tests/qapi-schema/args-alternate.out TEST tests/qapi-schema/args-any.out TEST tests/qapi-schema/args-array-empty.out TEST tests/qapi-schema/args-array-unknown.out TEST tests/qapi-schema/args-bad-boxed.out TEST tests/qapi-schema/args-boxed-anon.out TEST tests/qapi-schema/args-boxed-empty.out TEST tests/qapi-schema/args-boxed-string.out TEST tests/qapi-schema/args-int.out TEST tests/qapi-schema/args-invalid.out TEST tests/qapi-schema/args-member-array-bad.out TEST tests/qapi-schema/args-member-case.out TEST tests/qapi-schema/args-member-unknown.out TEST tests/qapi-schema/args-union.out TEST tests/qapi-schema/args-name-clash.out TEST tests/qapi-schema/args-unknown.out TEST tests/qapi-schema/bad-base.out TEST tests/qapi-schema/bad-data.out TEST tests/qapi-schema/bad-ident.out TEST tests/qapi-schema/bad-type-bool.out TEST tests/qapi-schema/bad-type-dict.out TEST tests/qapi-schema/bad-type-int.out TEST tests/qapi-schema/base-cycle-direct.out TEST tests/qapi-schema/base-cycle-indirect.out TEST tests/qapi-schema/command-int.out TEST tests/qapi-schema/doc-bad-args.out TEST tests/qapi-schema/comments.out TEST tests/qapi-schema/doc-bad-symbol.out TEST tests/qapi-schema/doc-duplicated-arg.out TEST tests/qapi-schema/doc-duplicated-return.out TEST tests/qapi-schema/doc-duplicated-since.out TEST tests/qapi-schema/doc-empty-arg.out TEST tests/qapi-schema/doc-empty-section.out TEST tests/qapi-schema/doc-empty-symbol.out TEST tests/qapi-schema/doc-interleaved-section.out TEST tests/qapi-schema/doc-invalid-end.out TEST tests/qapi-schema/doc-invalid-end2.out TEST tests/qapi-schema/doc-invalid-return.out TEST tests/qapi-schema/doc-invalid-section.out TEST tests/qapi-schema/doc-invalid-start.out TEST tests/qapi-schema/doc-missing-colon.out TEST tests/qapi-schema/doc-missing-expr.out TEST tests/qapi-schema/doc-missing-space.out TEST tests/qapi-schema/doc-optional.out TEST tests/qapi-schema/double-data.out TEST tests/qapi-schema/double-type.out TEST tests/qapi-schema/duplicate-key.out TEST tests/qapi-schema/empty.out TEST tests/qapi-schema/enum-bad-name.out TEST tests/qapi-schema/enum-bad-prefix.out TEST tests/qapi-schema/enum-clash-member.out TEST tests/qapi-schema/enum-dict-member.out TEST tests/qapi-schema/enum-int-member.out TEST tests/qapi-schema/enum-member-case.out TEST tests/qapi-schema/enum-missing-data.out TEST tests/qapi-schema/enum-wrong-data.out TEST tests/qapi-schema/escape-outside-string.out TEST tests/qapi-schema/escape-too-big.out TEST tests/qapi-schema/escape-too-short.out TEST tests/qapi-schema/event-boxed-empty.out TEST tests/qapi-schema/event-case.out TEST tests/qapi-schema/event-nest-struct.out TEST tests/qapi-schema/flat-union-array-branch.out TEST tests/qapi-schema/flat-union-bad-base.out TEST tests/qapi-schema/flat-union-bad-discriminator.out TEST tests/qapi-schema/flat-union-base-any.out TEST tests/qapi-schema/flat-union-base-union.out TEST tests/qapi-schema/flat-union-clash-member.out TEST tests/qapi-schema/flat-union-empty.out TEST tests/qapi-schema/flat-union-incomplete-branch.out TEST tests/qapi-schema/flat-union-inline.out TEST tests/qapi-schema/flat-union-int-branch.out TEST tests/qapi-schema/flat-union-invalid-branch-key.out TEST tests/qapi-schema/flat-union-invalid-discriminator.out TEST tests/qapi-schema/flat-union-no-base.out TEST tests/qapi-schema/flat-union-optional-discriminator.out TEST tests/qapi-schema/flat-union-string-discriminator.out TEST tests/qapi-schema/funny-char.out TEST tests/qapi-schema/ident-with-escape.out TEST tests/qapi-schema/include-before-err.out TEST tests/qapi-schema/include-cycle.out TEST tests/qapi-schema/include-format-err.out TEST tests/qapi-schema/include-nested-err.out TEST tests/qapi-schema/include-no-file.out TEST tests/qapi-schema/include-non-file.out TEST tests/qapi-schema/include-relpath.out TEST tests/qapi-schema/include-repetition.out TEST tests/qapi-schema/include-self-cycle.out TEST tests/qapi-schema/include-simple.out TEST tests/qapi-schema/indented-expr.out TEST tests/qapi-schema/leading-comma-list.out TEST tests/qapi-schema/leading-comma-object.out TEST tests/qapi-schema/missing-colon.out TEST tests/qapi-schema/missing-comma-list.out TEST tests/qapi-schema/missing-comma-object.out TEST tests/qapi-schema/missing-type.out TEST tests/qapi-schema/non-objects.out TEST tests/qapi-schema/nested-struct-data.out TEST tests/qapi-schema/qapi-schema-test.out TEST tests/qapi-schema/quoted-structural-chars.out TEST tests/qapi-schema/redefined-builtin.out TEST tests/qapi-schema/redefined-command.out TEST tests/qapi-schema/redefined-event.out TEST tests/qapi-schema/redefined-type.out TEST tests/qapi-schema/reserved-command-q.out TEST tests/qapi-schema/reserved-enum-q.out TEST tests/qapi-schema/reserved-member-has.out TEST tests/qapi-schema/reserved-member-q.out TEST tests/qapi-schema/reserved-member-u.out TEST tests/qapi-schema/reserved-member-underscore.out TEST tests/qapi-schema/reserved-type-kind.out TEST tests/qapi-schema/reserved-type-list.out TEST tests/qapi-schema/returns-alternate.out TEST tests/qapi-schema/returns-array-bad.out TEST tests/qapi-schema/returns-dict.out TEST tests/qapi-schema/returns-unknown.out TEST tests/qapi-schema/returns-whitelist.out TEST tests/qapi-schema/struct-base-clash-deep.out TEST tests/qapi-schema/struct-base-clash.out TEST tests/qapi-schema/struct-data-invalid.out TEST tests/qapi-schema/struct-member-invalid.out TEST tests/qapi-schema/trailing-comma-list.out TEST tests/qapi-schema/trailing-comma-object.out TEST tests/qapi-schema/type-bypass-bad-gen.out TEST tests/qapi-schema/unclosed-list.out TEST tests/qapi-schema/unclosed-object.out TEST tests/qapi-schema/unclosed-string.out TEST tests/qapi-schema/unicode-str.out TEST tests/qapi-schema/union-base-no-discriminator.out TEST tests/qapi-schema/union-branch-case.out TEST tests/qapi-schema/union-clash-branches.out TEST tests/qapi-schema/union-empty.out TEST tests/qapi-schema/union-invalid-base.out TEST tests/qapi-schema/union-optional-branch.out TEST tests/qapi-schema/union-unknown.out TEST tests/qapi-schema/unknown-escape.out CC tests/check-qdict.o TEST tests/qapi-schema/unknown-expr-key.out CC tests/test-char.o CC tests/check-qfloat.o CC tests/check-qint.o CC tests/check-qstring.o CC tests/check-qlist.o CC tests/check-qnull.o CC tests/check-qjson.o CC tests/test-qobject-output-visitor.o GEN tests/test-qapi-visit.c GEN tests/test-qapi-types.c GEN tests/test-qapi-event.c GEN tests/test-qmp-introspect.c CC tests/test-clone-visitor.o CC tests/test-qobject-input-visitor.o CC tests/test-qobject-input-strict.o CC tests/test-qmp-commands.o GEN tests/test-qmp-marshal.c CC tests/test-string-input-visitor.o CC tests/test-string-output-visitor.o CC tests/test-qmp-event.o CC tests/test-opts-visitor.o CC tests/test-coroutine.o CC tests/iothread.o CC tests/test-visitor-serialization.o CC tests/test-iov.o CC tests/test-aio.o CC tests/test-aio-multithread.o CC tests/test-throttle.o CC tests/test-thread-pool.o CC tests/test-hbitmap.o CC tests/test-blockjob.o CC tests/test-blockjob-txn.o CC tests/test-x86-cpuid.o CC tests/test-xbzrle.o CC tests/test-vmstate.o CC tests/test-cutils.o CC tests/test-shift128.o CC tests/test-mul64.o CC tests/test-int128.o CC tests/rcutorture.o CC tests/test-rcu-list.o CC tests/test-qdist.o CC tests/test-qht.o CC tests/test-qht-par.o CC tests/qht-bench.o CC tests/test-bitops.o CC tests/test-bitcnt.o CC tests/test-qdev-global-props.o CC tests/check-qom-interface.o CC tests/check-qom-proplist.o CC tests/test-qemu-opts.o CC tests/test-write-threshold.o CC tests/test-crypto-hmac.o CC tests/test-crypto-hash.o CC tests/test-crypto-cipher.o CC tests/test-crypto-secret.o CC tests/test-crypto-tlscredsx509.o CC tests/crypto-tls-x509-helpers.o CC tests/pkix_asn1_tab.o CC tests/test-crypto-tlssession.o CC tests/test-qga.o CC tests/libqtest.o CC tests/test-timed-average.o CC tests/test-io-task.o CC tests/test-io-channel-socket.o CC tests/io-channel-helpers.o CC tests/test-io-channel-file.o CC tests/test-io-channel-tls.o CC tests/test-io-channel-command.o CC tests/test-io-channel-buffer.o CC tests/test-base64.o CC tests/test-crypto-pbkdf.o CC tests/test-crypto-ivgen.o CC tests/test-crypto-afsplit.o CC tests/test-crypto-xts.o CC tests/test-crypto-block.o CC tests/test-logging.o CC tests/test-replication.o CC tests/test-bufferiszero.o CC tests/test-uuid.o CC tests/ptimer-test.o CC tests/ptimer-test-stubs.o CC tests/boot-serial-test.o CC tests/libqos/pci.o CC tests/libqos/fw_cfg.o CC tests/libqos/malloc.o CC tests/libqos/i2c.o CC tests/libqos/libqos.o CC tests/tmp105-test.o CC tests/libqos/i2c-omap.o CC tests/ds1338-test.o CC tests/libqos/i2c-imx.o CC tests/m25p80-test.o CC tests/virtio-blk-test.o CC tests/libqos/malloc-spapr.o CC tests/libqos/libqos-spapr.o CC tests/libqos/rtas.o CC tests/libqos/pci-spapr.o CC tests/libqos/malloc-pc.o CC tests/libqos/pci-pc.o CC tests/libqos/libqos-pc.o CC tests/libqos/ahci.o CC tests/libqos/virtio.o CC tests/libqos/virtio-mmio.o CC tests/libqos/virtio-pci.o CC tests/libqos/malloc-generic.o CC tests/test-arm-mptimer.o CC tests/endianness-test.o CC tests/fdc-test.o CC tests/ide-test.o CC tests/ahci-test.o CC tests/boot-order-test.o CC tests/hd-geo-test.o CC tests/bios-tables-test.o CC tests/boot-sector.o CC tests/pxe-test.o CC tests/rtc-test.o CC tests/ipmi-kcs-test.o CC tests/ipmi-bt-test.o CC tests/i440fx-test.o CC tests/fw_cfg-test.o CC tests/drive_del-test.o CC tests/wdt_ib700-test.o CC tests/tco-test.o CC tests/e1000-test.o CC tests/e1000e-test.o CC tests/rtl8139-test.o CC tests/pcnet-test.o CC tests/eepro100-test.o CC tests/ne2000-test.o CC tests/nvme-test.o CC tests/ac97-test.o CC tests/es1370-test.o CC tests/virtio-net-test.o CC tests/virtio-balloon-test.o CC tests/virtio-rng-test.o CC tests/virtio-scsi-test.o CC tests/virtio-9p-test.o CC tests/virtio-console-test.o CC tests/virtio-serial-test.o CC tests/tpci200-test.o CC tests/ipoctal232-test.o CC tests/display-vga-test.o CC tests/intel-hda-test.o CC tests/ivshmem-test.o CC tests/vmxnet3-test.o CC tests/i82801b11-test.o CC tests/pvpanic-test.o CC tests/ioh3420-test.o CC tests/usb-hcd-ohci-test.o CC tests/libqos/usb.o CC tests/usb-hcd-uhci-test.o CC tests/usb-hcd-ehci-test.o CC tests/usb-hcd-xhci-test.o CC tests/pc-cpu-test.o CC tests/test-netfilter.o CC tests/q35-test.o CC tests/test-filter-mirror.o CC tests/test-filter-redirector.o CC tests/postcopy-test.o CC tests/test-x86-cpuid-compat.o CC tests/spapr-phb-test.o CC tests/prom-env-test.o CC tests/pnv-xscom-test.o CC tests/rtas-test.o CC tests/device-introspect-test.o CC tests/qom-test.o LINK tests/check-qdict LINK tests/test-char LINK tests/check-qfloat LINK tests/check-qint LINK tests/check-qstring LINK tests/check-qlist LINK tests/check-qnull LINK tests/check-qjson CC tests/test-qapi-visit.o CC tests/test-qapi-types.o CC tests/test-qapi-event.o CC tests/test-qmp-introspect.o CC tests/test-qmp-marshal.o LINK tests/test-coroutine LINK tests/test-iov LINK tests/test-aio LINK tests/test-aio-multithread LINK tests/test-throttle LINK tests/test-thread-pool LINK tests/test-hbitmap LINK tests/test-blockjob LINK tests/test-x86-cpuid LINK tests/test-blockjob-txn LINK tests/test-xbzrle LINK tests/test-vmstate LINK tests/test-cutils LINK tests/test-shift128 LINK tests/test-int128 LINK tests/test-mul64 LINK tests/rcutorture LINK tests/test-rcu-list LINK tests/test-qdist LINK tests/test-qht LINK tests/qht-bench LINK tests/test-bitops LINK tests/test-bitcnt LINK tests/test-qdev-global-props LINK tests/check-qom-interface LINK tests/check-qom-proplist LINK tests/test-qemu-opts LINK tests/test-write-threshold LINK tests/test-crypto-hash LINK tests/test-crypto-hmac LINK tests/test-crypto-cipher LINK tests/test-crypto-secret LINK tests/test-crypto-tlscredsx509 LINK tests/test-crypto-tlssession LINK tests/test-qga LINK tests/test-timed-average LINK tests/test-io-task LINK tests/test-io-channel-socket LINK tests/test-io-channel-file LINK tests/test-io-channel-tls LINK tests/test-io-channel-command LINK tests/test-io-channel-buffer LINK tests/test-base64 LINK tests/test-crypto-pbkdf LINK tests/test-crypto-ivgen LINK tests/test-crypto-afsplit LINK tests/test-crypto-xts LINK tests/test-crypto-block LINK tests/test-logging LINK tests/test-replication LINK tests/test-bufferiszero LINK tests/test-uuid LINK tests/ptimer-test LINK tests/boot-serial-test LINK tests/tmp105-test LINK tests/ds1338-test LINK tests/m25p80-test LINK tests/virtio-blk-test LINK tests/test-arm-mptimer LINK tests/endianness-test LINK tests/fdc-test LINK tests/ide-test LINK tests/ahci-test LINK tests/hd-geo-test LINK tests/boot-order-test LINK tests/bios-tables-test LINK tests/pxe-test LINK tests/rtc-test LINK tests/ipmi-kcs-test LINK tests/ipmi-bt-test LINK tests/i440fx-test LINK tests/fw_cfg-test LINK tests/drive_del-test LINK tests/wdt_ib700-test LINK tests/tco-test LINK tests/e1000-test LINK tests/e1000e-test LINK tests/rtl8139-test LINK tests/pcnet-test LINK tests/eepro100-test LINK tests/ne2000-test LINK tests/nvme-test LINK tests/ac97-test LINK tests/es1370-test LINK tests/virtio-net-test LINK tests/virtio-balloon-test LINK tests/virtio-rng-test LINK tests/virtio-scsi-test LINK tests/virtio-9p-test LINK tests/virtio-serial-test LINK tests/virtio-console-test LINK tests/tpci200-test LINK tests/display-vga-test LINK tests/ipoctal232-test LINK tests/ivshmem-test LINK tests/intel-hda-test LINK tests/vmxnet3-test LINK tests/pvpanic-test LINK tests/i82801b11-test LINK tests/ioh3420-test LINK tests/usb-hcd-ohci-test LINK tests/usb-hcd-ehci-test LINK tests/usb-hcd-uhci-test LINK tests/usb-hcd-xhci-test LINK tests/pc-cpu-test LINK tests/q35-test LINK tests/test-netfilter LINK tests/test-filter-mirror LINK tests/test-filter-redirector LINK tests/postcopy-test LINK tests/test-x86-cpuid-compat LINK tests/spapr-phb-test LINK tests/prom-env-test LINK tests/pnv-xscom-test LINK tests/rtas-test LINK tests/qom-test LINK tests/device-introspect-test GTESTER tests/test-char GTESTER tests/check-qdict GTESTER tests/check-qfloat GTESTER tests/check-qint GTESTER tests/check-qstring GTESTER tests/check-qlist GTESTER tests/check-qnull GTESTER tests/check-qjson LINK tests/test-qobject-output-visitor LINK tests/test-qobject-input-visitor LINK tests/test-clone-visitor LINK tests/test-qobject-input-strict LINK tests/test-qmp-commands LINK tests/test-string-input-visitor LINK tests/test-string-output-visitor LINK tests/test-qmp-event LINK tests/test-opts-visitor GTESTER tests/test-coroutine LINK tests/test-visitor-serialization GTESTER tests/test-iov GTESTER tests/test-aio GTESTER tests/test-aio-multithread GTESTER tests/test-throttle GTESTER tests/test-thread-pool GTESTER tests/test-hbitmap GTESTER tests/test-blockjob GTESTER tests/test-blockjob-txn GTESTER tests/test-x86-cpuid GTESTER tests/test-xbzrle GTESTER tests/test-vmstate GTESTER tests/test-cutils GTESTER tests/test-shift128 GTESTER tests/test-mul64 GTESTER tests/test-int128 GTESTER tests/rcutorture GTESTER tests/test-rcu-list GTESTER tests/test-qdist GTESTER tests/test-qht LINK tests/test-qht-par GTESTER tests/test-bitops GTESTER tests/test-bitcnt GTESTER tests/test-qdev-global-props GTESTER tests/check-qom-interface GTESTER tests/check-qom-proplist GTESTER tests/test-qemu-opts GTESTER tests/test-write-threshold GTESTER tests/test-crypto-hash GTESTER tests/test-crypto-hmac GTESTER tests/test-crypto-cipher GTESTER tests/test-crypto-secret GTESTER tests/test-crypto-tlscredsx509 GTESTER tests/test-crypto-tlssession GTESTER tests/test-qga GTESTER tests/test-timed-average GTESTER tests/test-io-task GTESTER tests/test-io-channel-socket GTESTER tests/test-io-channel-file GTESTER tests/test-io-channel-tls GTESTER tests/test-io-channel-command GTESTER tests/test-io-channel-buffer GTESTER tests/test-base64 GTESTER tests/test-crypto-pbkdf GTESTER tests/test-crypto-ivgen GTESTER tests/test-crypto-afsplit GTESTER tests/test-crypto-xts GTESTER tests/test-crypto-block GTESTER tests/test-logging GTESTER tests/test-replication GTESTER tests/test-bufferiszero GTESTER tests/test-uuid GTESTER tests/ptimer-test GTESTER check-qtest-aarch64 GTESTER check-qtest-alpha GTESTER check-qtest-arm GTESTER check-qtest-cris GTESTER check-qtest-i386 GTESTER check-qtest-lm32 GTESTER check-qtest-m68k GTESTER check-qtest-microblazeel GTESTER check-qtest-microblaze GTESTER check-qtest-mips64el GTESTER check-qtest-mips64 GTESTER check-qtest-mipsel GTESTER check-qtest-mips GTESTER check-qtest-moxie GTESTER check-qtest-nios2 GTESTER check-qtest-or1k GTESTER check-qtest-ppc64 GTESTER check-qtest-ppcemb "kvm" accelerator not found. Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml "kvm" accelerator not found. Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml "kvm" accelerator not found. GTESTER check-qtest-ppc GTESTER check-qtest-s390x Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml GTester: last random seed: R02S67b79687214a158c46bc466678067fdb "kvm" accelerator not found. Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml "kvm" accelerator not found. Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml "kvm" accelerator not found. Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml "kvm" accelerator not found. Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml "kvm" accelerator not found. Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml "kvm" accelerator not found. /var/tmp/patchew-tester-tmp-_t3ms3un/src/tests/Makefile.include:793: recipe for target 'check-qtest-s390x' failed make: *** [check-qtest-s390x] Error 1 make: *** Waiting for unfinished jobs.... Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml "kvm" accelerator not found. Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml Warning! iasl couldn't parse the expected aml "kvm" accelerator not found. "kvm" accelerator not found. === OUTPUT END === Test command exited with code: 2 --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-devel@freelists.org ^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue 2017-02-27 18:04 Peter Maydell 2017-02-27 19:14 ` no-reply @ 2017-02-28 12:07 ` Peter Maydell 1 sibling, 0 replies; 43+ messages in thread From: Peter Maydell @ 2017-02-28 12:07 UTC (permalink / raw) To: QEMU Developers On 27 February 2017 at 18:04, Peter Maydell <peter.maydell@linaro.org> wrote: > ARM queu; includes all the NVIC rewrite patches. > The QOMify-armv7m patchset hasn't got enough review just > yet but I may be able to sneak it in before freeze > tomorrow if it gets review. Didn't want to hold this lot > up waiting, anyway. > > thanks > -- PMM > > > The following changes since commit 8f2d7c341184a95d05476ea3c45dbae2b9ddbe51: > > Merge remote-tracking branch 'remotes/berrange/tags/pull-qcrypto-2017-02-27-1' into staging (2017-02-27 15:33:21 +0000) > > are available in the git repository at: > > git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170227 > > for you to fetch changes up to 94d5bcf5a7f3799660b62098a5183f161aad0601: > > hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID (2017-02-27 17:23:16 +0000) > > ---------------------------------------------------------------- > target-arm queue: > * raspi2: implement RNG module, GPIO and new SD card controller > (sufficient to boot new raspbian kernels) > * sdhci: bugfixes for block transfers > * virt: fix cpu object reference leak > * Add missing fp_access_check() to aarch64 crypto instructions > * cputlb: Don't assume do_unassigned_access() never returns > * virt: Add a user option to disallow ITS instantiation > * i.MX timers: fix reset handling > * ARMv7M NVIC: rewrite to fix broken priority handling and masking > * exynos: Fix proper mapping of CPUs by providing real cluster ID > * exynos: Fix Linux kernel division by zero for PLLs > Unfortunately I see crashes or assert failures on the raspi2 model on OSX hosts. Not sure why OSX only, probably just that the malloc/free has different patterns of reusing freed memory. In any case we clearly didn't get the reparent-the-sdcard code right, so I'm going to have to drop those patches for the moment :-( thanks -- PMM ^ permalink raw reply [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2016-06-14 14:13 Peter Maydell
0 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2016-06-14 14:13 UTC (permalink / raw)
To: qemu-devel
target-arm queue; quite a lot of patches but nothing earthshaking.
thanks
-- PMM
The following changes since commit d32490ca74c700edc74f0b2f6b7536b52a644739:
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20160614' into staging (2016-06-14 13:14:55 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160614
for you to fetch changes up to ea924f729b7703c9d81f62b54bcaa75f9d9f314e:
target-arm: Don't permit ARMv8-only Neon insns on ARMv7 (2016-06-14 15:02:30 +0100)
----------------------------------------------------------------
target-arm queue:
* add PMU support for virt machine under KVM
* fix reset and migration of TTBCR(S)
* add virt-2.7 machine type
* QOMify various ARM devices
* implement xilinx DisplayPort device
* don't permit ARMv8-only Neon insns to work on ARMv7
----------------------------------------------------------------
Andrew Jones (4):
hw/arm/virt: separate versioned type-init code
hw/arm/virt: introduce DEFINE_VIRT_MACHINE
hw/arm/virt: introduce DEFINE_VIRT_MACHINE_AS_LATEST
hw/arm/virt: create the 2.7 machine type
KONRAD Frederic (7):
i2cbus: remove unused dev field
i2c: implement broadcast write
introduce aux-bus
introduce dpcd module
introduce xlnx-dpdma
introduce xlnx-dp
arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdma
Peter Crosthwaite (1):
i2c: Factor our send() and recv() common logic
Peter Maydell (3):
target-arm: Fix reset and migration of TTBCR(S)
hw/i2c-ddc.c: Implement DDC I2C slave
target-arm: Don't permit ARMv8-only Neon insns on ARMv7
Shannon Zhao (3):
target-arm: kvm64: set guest PMUv3 feature bit if supported
hw/arm/virt: Add PMU node for virt machine
hw/arm/virt-acpi-build: Add PMU IRQ number in ACPI table
xiaoqiang zhao (12):
hw/i2c: QOM'ify bitbang_i2c.c
hw/i2c: QOM'ify exynos4210_i2c.c
hw/i2c: QOM'ify omap_i2c.c
hw/i2c: QOM'ify versatile_i2c.c
hw/gpio: QOM'ify omap_gpio.c
hw/gpio: QOM'ify pl061.c
hw/gpio: QOM'ify zaurus.c
hw/misc: QOM'ify arm_l2x0.c
hw/misc: QOM'ify exynos4210_pmu.c
hw/misc: QOM'ify mst_fpga.c
hw/dma: QOM'ify pxa2xx_dma.c
hw/sd: QOM'ify pl181.c
default-configs/aarch64-softmmu.mak | 3 +
hw/arm/virt-acpi-build.c | 4 +
hw/arm/virt.c | 99 ++-
hw/arm/xlnx-zynqmp.c | 32 +-
hw/display/Makefile.objs | 2 +
hw/display/dpcd.c | 173 +++++
hw/display/xlnx_dp.c | 1336 +++++++++++++++++++++++++++++++++++
hw/dma/Makefile.objs | 1 +
hw/dma/pxa2xx_dma.c | 38 +-
hw/dma/xlnx_dpdma.c | 794 +++++++++++++++++++++
hw/gpio/omap_gpio.c | 61 +-
hw/gpio/pl061.c | 24 +-
hw/gpio/zaurus.c | 14 +-
hw/i2c/Makefile.objs | 1 +
hw/i2c/bitbang_i2c.c | 14 +-
hw/i2c/core.c | 161 +++--
hw/i2c/exynos4210_i2c.c | 13 +-
hw/i2c/i2c-ddc.c | 307 ++++++++
hw/i2c/omap_i2c.c | 42 +-
hw/i2c/versatile_i2c.c | 19 +-
hw/misc/Makefile.objs | 1 +
hw/misc/arm_l2x0.c | 11 +-
hw/misc/aux.c | 292 ++++++++
hw/misc/exynos4210_pmu.c | 11 +-
hw/misc/mst_fpga.c | 13 +-
hw/sd/pl181.c | 26 +-
include/hw/arm/virt.h | 4 +
include/hw/arm/xlnx-zynqmp.h | 4 +
include/hw/display/dpcd.h | 105 +++
include/hw/display/xlnx_dp.h | 109 +++
include/hw/dma/xlnx_dpdma.h | 85 +++
include/hw/i2c/i2c-ddc.h | 38 +
include/hw/i2c/i2c.h | 1 +
include/hw/misc/aux.h | 128 ++++
target-arm/cpu.h | 2 +
target-arm/helper.c | 5 +-
target-arm/kvm32.c | 6 +
target-arm/kvm64.c | 46 ++
target-arm/kvm_arm.h | 7 +
target-arm/translate.c | 28 +
40 files changed, 3837 insertions(+), 223 deletions(-)
create mode 100644 hw/display/dpcd.c
create mode 100644 hw/display/xlnx_dp.c
create mode 100644 hw/dma/xlnx_dpdma.c
create mode 100644 hw/i2c/i2c-ddc.c
create mode 100644 hw/misc/aux.c
create mode 100644 include/hw/display/dpcd.h
create mode 100644 include/hw/display/xlnx_dp.h
create mode 100644 include/hw/dma/xlnx_dpdma.h
create mode 100644 include/hw/i2c/i2c-ddc.h
create mode 100644 include/hw/misc/aux.h
^ permalink raw reply [flat|nested] 43+ messages in thread* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2016-03-04 11:41 Peter Maydell
2016-03-04 14:05 ` Peter Maydell
0 siblings, 1 reply; 43+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
Here's the target-arm queue: fairly large with a roundup of lots
of patches that hit the list at or just before the softfreeze
deadline. Most notable thing in here is Peter/Paolo's bigendian
and SETEND support patchset.
There are still some patchsets on list that I haven't got to
reviewing yet (eg last set of raspi patches, imx6) which I hope
to get to early next week and into a pullreq next week sometime.
thanks
-- PMM
The following changes since commit 2d3b7c0164e1b9287304bc70dd6ed071ba3e8dfc:
Merge remote-tracking branch 'remotes/amit-virtio-rng/tags/rng-for-2.6-1' into staging (2016-03-03 13:13:36 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160304
for you to fetch changes up to ba63cf47a93041137a94e86b7d0cd87fc896949b:
target-arm: Only trap SRS from S-EL1 if specified mode is MON (2016-03-04 11:30:22 +0000)
----------------------------------------------------------------
target-arm queue:
* Correct handling of writes to CPSR from gdbstub in user mode
* virt: lift maximum RAM limit to 255GB
* sdhci: implement reset
* virt: if booting in Secure mode, provide secure-only RAM, make first
flash device secure-only, and assume the EL3 boot rom will handle PSCI
* bcm2835: use explicit endianness accessors rather than ldl/stl_phys
* support big-endian in system mode for ARM
* implement SETEND instruction
* arm_gic: implement the GICv2 GICC_DIR register
* fix SRS bug: only trap from S-EL1 to EL3 if specified mode is Mon
----------------------------------------------------------------
Andrew Baumann (1):
bcm2835_mbox/property: replace ldl_phys/stl_phys with endian-specific accesses
Paolo Bonzini (8):
linux-user: arm: fix coding style for some linux-user signal functions
linux-user: arm: pass env to get_user_code_*
target-arm: implement SCTLR.B, drop bswap_code
linux-user: arm: handle CPSR.E correctly in strex emulation
target-arm: pass DisasContext to gen_aa32_ld*/st*
target-arm: introduce disas flag for endianness
target-arm: implement setend
target-arm: implement BE32 mode in system emulation
Peter Crosthwaite (10):
target-arm: cpu: Move cpu_is_big_endian to header
arm: cpu: handle BE32 user-mode as BE
linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode
target-arm: implement SCTLR.EE
target-arm: a64: Add endianness support
target-arm: introduce tbflag for endianness
loader: add API to load elf header
loader: load_elf(): Add doc comment
loader: Add data swap option to load-elf
arm: boot: Support big-endian elfs
Peter Maydell (10):
target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode
virt: Lift the maximum RAM limit from 30GB to 255GB
sd.c: Handle NULL block backend in sd_get_inserted()
sdhci: Implement DeviceClass reset
hw/arm/virt: Provide a secure-only RAM if booting in Secure mode
loader: Add load_image_mr() to load ROM image to a MemoryRegion
hw/arm/virt: Load bios image to MemoryRegion, not physaddr
hw/arm/virt: Make first flash device Secure-only if booting secure
hw/arm/virt: Assume EL3 boot rom will handle PSCI if one is provided
hw/intc/arm_gic.c: Implement GICv2 GICC_DIR
Ralf-Philipp Weinmann (1):
target-arm: Only trap SRS from S-EL1 if specified mode is MON
hw/alpha/dp264.c | 4 +-
hw/arm/armv7m.c | 2 +-
hw/arm/boot.c | 93 ++++++++-
hw/arm/virt.c | 168 +++++++++++++----
hw/core/loader.c | 99 +++++++++-
hw/cpu/a15mpcore.c | 2 +-
hw/cris/boot.c | 2 +-
hw/i386/multiboot.c | 3 +-
hw/intc/arm_gic.c | 45 ++++-
hw/intc/arm_gic_common.c | 2 +-
hw/lm32/lm32_boards.c | 4 +-
hw/lm32/milkymist.c | 2 +-
hw/m68k/an5206.c | 2 +-
hw/m68k/dummy_m68k.c | 2 +-
hw/m68k/mcf5208.c | 2 +-
hw/microblaze/boot.c | 4 +-
hw/mips/mips_fulong2e.c | 2 +-
hw/mips/mips_malta.c | 2 +-
hw/mips/mips_mipssim.c | 2 +-
hw/mips/mips_r4k.c | 2 +-
hw/misc/bcm2835_mbox.c | 6 +-
hw/misc/bcm2835_property.c | 38 ++--
hw/moxie/moxiesim.c | 3 +-
hw/openrisc/openrisc_sim.c | 3 +-
hw/pci-host/prep.c | 2 +-
hw/ppc/e500.c | 2 +-
hw/ppc/mac_newworld.c | 5 +-
hw/ppc/mac_oldworld.c | 5 +-
hw/ppc/ppc440_bamboo.c | 3 +-
hw/ppc/spapr.c | 6 +-
hw/ppc/virtex_ml507.c | 3 +-
hw/s390x/ipl.c | 4 +-
hw/sd/sd.c | 2 +-
hw/sd/sdhci.c | 21 ++-
hw/sparc/leon3.c | 2 +-
hw/sparc/sun4m.c | 4 +-
hw/sparc64/sun4u.c | 4 +-
hw/tricore/tricore_testboard.c | 2 +-
hw/xtensa/sim.c | 4 +-
hw/xtensa/xtfpga.c | 2 +-
include/hw/arm/arm.h | 9 +
include/hw/arm/virt.h | 1 +
include/hw/elf_ops.h | 22 ++-
include/hw/loader.h | 59 +++++-
linux-user/main.c | 77 ++++++--
linux-user/signal.c | 110 +++++------
target-arm/arm_ldst.h | 8 +-
target-arm/cpu.c | 21 +--
target-arm/cpu.h | 98 +++++++++-
target-arm/helper.c | 42 ++++-
target-arm/helper.h | 1 +
target-arm/op_helper.c | 5 +
target-arm/translate-a64.c | 56 +++---
target-arm/translate.c | 418 ++++++++++++++++++++++++-----------------
target-arm/translate.h | 3 +-
55 files changed, 1064 insertions(+), 431 deletions(-)
^ permalink raw reply [flat|nested] 43+ messages in thread* Re: [Qemu-devel] [PULL 00/30] target-arm queue 2016-03-04 11:41 Peter Maydell @ 2016-03-04 14:05 ` Peter Maydell 0 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2016-03-04 14:05 UTC (permalink / raw) To: QEMU Developers On 4 March 2016 at 11:41, Peter Maydell <peter.maydell@linaro.org> wrote: > Here's the target-arm queue: fairly large with a roundup of lots > of patches that hit the list at or just before the softfreeze > deadline. Most notable thing in here is Peter/Paolo's bigendian > and SETEND support patchset. > > There are still some patchsets on list that I haven't got to > reviewing yet (eg last set of raspi patches, imx6) which I hope > to get to early next week and into a pullreq next week sometime. > > thanks > -- PMM > > The following changes since commit 2d3b7c0164e1b9287304bc70dd6ed071ba3e8dfc: > > Merge remote-tracking branch 'remotes/amit-virtio-rng/tags/rng-for-2.6-1' into staging (2016-03-03 13:13:36 +0000) > > are available in the git repository at: > > > git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160304 > > for you to fetch changes up to ba63cf47a93041137a94e86b7d0cd87fc896949b: > > target-arm: Only trap SRS from S-EL1 if specified mode is MON (2016-03-04 11:30:22 +0000) > > ---------------------------------------------------------------- > target-arm queue: > * Correct handling of writes to CPSR from gdbstub in user mode > * virt: lift maximum RAM limit to 255GB > * sdhci: implement reset > * virt: if booting in Secure mode, provide secure-only RAM, make first > flash device secure-only, and assume the EL3 boot rom will handle PSCI > * bcm2835: use explicit endianness accessors rather than ldl/stl_phys > * support big-endian in system mode for ARM > * implement SETEND instruction > * arm_gic: implement the GICv2 GICC_DIR register > * fix SRS bug: only trap from S-EL1 to EL3 if specified mode is Mon > Applied, thanks. -- PMM ^ permalink raw reply [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2014-02-20 11:17 Peter Maydell
2014-02-21 16:01 ` Peter Maydell
0 siblings, 1 reply; 43+ messages in thread
From: Peter Maydell @ 2014-02-20 11:17 UTC (permalink / raw)
To: Anthony Liguori; +Cc: Blue Swirl, qemu-devel, Aurelien Jarno
Here's the latest target-arm pull request. There are definitely
more things still in the pipeline so there will be at least one
more before softfreeze...
thanks
-- PMM
The following changes since commit 46eef33b89e936ca793e13c4aeea1414e97e8dbb:
Fix QEMU build on OpenBSD on x86 archs (2014-02-17 11:44:00 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20140220
for you to fetch changes up to 2ea5a2ca1f1dc302652d2ad5035e0b209ccaa177:
linux-user: AArch64: Fix exclusive store of the zero register (2014-02-20 10:35:56 +0000)
----------------------------------------------------------------
target-arm queue:
* Fix a bug causing an assertion in the NVIC on ARMv7M models
* More A64 Neon instructions
* Refactor cpreg API to separate out access check functions, as
groundwork for AArch64 system mode
* Fix bug in linux-user A64 store-exclusive of XZR
----------------------------------------------------------------
Alex Bennée (2):
target-arm: A64: Implement SIMD FP compare and set insns
target-arm: A64: Implement floating point pairwise insns
Janne Grunau (1):
linux-user: AArch64: Fix exclusive store of the zero register
Peter Maydell (27):
hw/intc/arm_gic: Fix NVIC assertion failure
target-arm: A64: Implement plain vector SIMD indexed element insns
target-arm: A64: Implement long vector x indexed insns
target-arm: A64: Implement SIMD scalar indexed instructions
target-arm: A64: Implement scalar three different instructions
softfloat: Support halving the result of muladd operation
target-arm: A64: Implement remaining 3-same instructions
target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs
target-arm: Define names for SCTLR bits
target-arm: Restrict check_ap() use of S and R bits to v6 and earlier
target-arm: Remove unused ARMCPUState sr substruct
target-arm: Log bad system register accesses with LOG_UNIMP
target-arm: Stop underdecoding ARM946 PRBS registers
target-arm: Split cpreg access checks out from read/write functions
target-arm: Convert performance monitor reginfo to accessfn
target-arm: Convert generic timer reginfo to accessfn
target-arm: Convert miscellaneous reginfo structs to accessfn
target-arm: Drop success/fail return from cpreg read and write functions
target-arm: Remove unnecessary code now read/write fns can't fail
target-arm: Remove failure status return from read/write_raw_cp_reg
target-arm: Fix incorrect type for value argument to write_raw_cp_reg
target-arm: A64: Implement store-exclusive for system mode
target-arm: A64: Add opcode comments to disas_simd_three_reg_diff
target-arm: A64: Add most remaining three-reg-diff widening ops
target-arm: A64: Implement the wide 3-reg-different operations
target-arm: A64: Implement narrowing three-reg-diff operations
target-arm: A64: Implement unprivileged load/store
fpu/softfloat.c | 38 ++
hw/arm/pxa2xx.c | 36 +-
hw/arm/pxa2xx_pic.c | 11 +-
hw/intc/arm_gic.c | 2 +-
include/fpu/softfloat.h | 3 +
linux-user/main.c | 6 +-
target-arm/cpu.c | 8 +-
target-arm/cpu.h | 105 +++-
target-arm/helper-a64.c | 105 ++++
target-arm/helper-a64.h | 9 +
target-arm/helper.c | 620 +++++++++-----------
target-arm/helper.h | 3 +
target-arm/kvm-consts.h | 16 +-
target-arm/neon_helper.c | 16 +
target-arm/op_helper.c | 46 +-
target-arm/translate-a64.c | 1358 ++++++++++++++++++++++++++++++++++++++------
target-arm/translate.c | 28 +-
17 files changed, 1815 insertions(+), 595 deletions(-)
^ permalink raw reply [flat|nested] 43+ messages in thread* Re: [Qemu-devel] [PULL 00/30] target-arm queue 2014-02-20 11:17 Peter Maydell @ 2014-02-21 16:01 ` Peter Maydell 0 siblings, 0 replies; 43+ messages in thread From: Peter Maydell @ 2014-02-21 16:01 UTC (permalink / raw) To: Anthony Liguori; +Cc: Blue Swirl, QEMU Developers, Aurelien Jarno On 20 February 2014 11:17, Peter Maydell <peter.maydell@linaro.org> wrote: > Here's the latest target-arm pull request. There are definitely > more things still in the pipeline so there will be at least one > more before softfreeze... Applied, thanks. -- PMM ^ permalink raw reply [flat|nested] 43+ messages in thread
end of thread, other threads:[~2019-07-11 12:54 UTC | newest] Thread overview: 43+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2018-08-16 13:34 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 01/30] target/arm: Fix typo in helper_sve_ld1hss_r Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 02/30] target/arm: Fix sign-extension in sve do_ldr/do_str Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 03/30] target/arm: Fix offset for LD1R instructions Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 04/30] target/arm: Fix offset scaling for LD_zprr and ST_zprr Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 05/30] target/arm: Reformat integer register dump Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 06/30] target/arm: Dump SVE state if enabled Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 07/30] target/arm: Add sve-max-vq cpu property to -cpu max Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 08/30] i.MX6UL: Add i.MX6UL specific CCM device Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 09/30] i.MX6UL: Add i.MX6UL SOC Peter Maydell 2019-07-11 12:53 ` Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 10/30] i.MX6UL: Add Freescale i.MX6 UltraLite 14x14 EVK Board Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 11/30] hw/arm: make bitbanded IO optional on ARMv7-M Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 12/30] target/arm: add "cortex-m0" CPU model Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 13/30] loader: extract rom_free() function Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 14/30] loader: add rom transaction API Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 15/30] loader: Implement .hex file loader Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 16/30] Add QTest testcase for the Intel Hexadecimal Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 17/30] imx_spi: Unset XCH when TX FIFO becomes empty Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 18/30] aspeed_sdmc: Extend number of valid registers Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 19/30] aspeed_sdmc: Fix saved values Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 20/30] aspeed_sdmc: Set 'cache initial sequence' always true Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 21/30] aspeed_sdmc: Init status always idle Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 22/30] aspeed_sdmc: Handle ECC training Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 23/30] aspeed: add a max_ram_size property to the memory controller Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 24/30] target/arm: Adjust FPCR_MASK for FZ16 Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 25/30] target/arm: Ignore float_flag_input_denormal from fp_status_f16 Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 26/30] target/arm: Use fp_status_fp16 for do_fmpa_zpzzz_h Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 27/30] target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-half Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 28/30] target/arm: Fix aa64 FCADD and FCMLA decode Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 29/30] softfloat: Fix missing inexact for floating-point add Peter Maydell 2018-08-16 13:34 ` [Qemu-devel] [PULL 30/30] hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj() Peter Maydell 2018-08-16 16:18 ` [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell -- strict thread matches above, loose matches on Subject: below -- 2018-02-09 11:02 Peter Maydell 2018-02-09 14:38 ` Peter Maydell 2017-02-27 18:04 Peter Maydell 2017-02-27 19:14 ` no-reply 2017-02-28 12:07 ` Peter Maydell 2016-06-14 14:13 Peter Maydell 2016-03-04 11:41 Peter Maydell 2016-03-04 14:05 ` Peter Maydell 2014-02-20 11:17 Peter Maydell 2014-02-21 16:01 ` Peter Maydell
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