From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>,
QEMU Developers <qemu-devel@nongnu.org>,
"patches@linaro.org" <patches@linaro.org>,
Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH 8/9] target/arm: Support some Thumb insns being always unconditional
Date: Wed, 11 Oct 2017 10:57:42 +0100 [thread overview]
Message-ID: <CAFEAcA8OzWu9KqA4MuTYst0o4K60wythCf0u7UuPHjp0q7NAxQ@mail.gmail.com> (raw)
In-Reply-To: <3bab968b-3476-55c2-ba7d-ffd2b902e532@linaro.org>
On 11 October 2017 at 03:52, Richard Henderson
<richard.henderson@linaro.org> wrote:
> On 10/09/2017 06:48 AM, Peter Maydell wrote:
>> - if (dc->condexec_mask) {
>> + if (dc->condexec_mask && !thumb_insn_is_unconditional(dc, insn)) {
>> uint32_t cond = dc->condexec_cond;
>>
>> if (cond != 0x0e) { /* Skip conditional when condition is AL. */
>
> Don't you still need to advance the condexec_mask?
Yes -- that happens after we've called disas_thumb{,2}_insn()
in thumb_tr_translate_insn().
This patch just makes always-unconditional insns behave
as if the condition is AL.
thanks
-- PMM
next prev parent reply other threads:[~2017-10-11 9:58 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-09 13:48 [Qemu-devel] [PATCH 0/9] v8M: BLXNS, SG, secure function return Peter Maydell
2017-10-09 13:48 ` [Qemu-devel] [PATCH 1/9] target/arm: Add M profile secure MMU index values to get_a32_user_mem_index() Peter Maydell
2017-10-10 23:36 ` Richard Henderson
2017-10-09 13:48 ` [Qemu-devel] [PATCH 2/9] target/arm: Implement SG instruction Peter Maydell
2017-10-11 0:27 ` Richard Henderson
2017-10-09 13:48 ` [Qemu-devel] [PATCH 3/9] target/arm: Implement BLXNS Peter Maydell
2017-10-09 13:48 ` [Qemu-devel] [PATCH 4/9] target/arm: Implement secure function return Peter Maydell
2017-10-09 13:48 ` [Qemu-devel] [PATCH 5/9] target-arm: Don't check for "Thumb2 or M profile" for not-Thumb1 Peter Maydell
2017-10-11 0:29 ` Richard Henderson
2017-10-09 13:48 ` [Qemu-devel] [PATCH 6/9] target/arm: Pull Thumb insn word loads up to top level Peter Maydell
2017-10-11 2:18 ` Richard Henderson
2017-10-11 9:55 ` Peter Maydell
2017-10-09 13:48 ` [Qemu-devel] [PATCH 7/9] target-arm: Simplify insn_crosses_page() Peter Maydell
2017-10-11 2:26 ` Richard Henderson
2017-10-09 13:48 ` [Qemu-devel] [PATCH 8/9] target/arm: Support some Thumb insns being always unconditional Peter Maydell
2017-10-11 2:52 ` Richard Henderson
2017-10-11 9:57 ` Peter Maydell [this message]
2017-10-11 14:14 ` Richard Henderson
2017-10-09 13:48 ` [Qemu-devel] [PATCH 9/9] target/arm: Implement SG instruction corner cases Peter Maydell
2017-10-11 2:57 ` Richard Henderson
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