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From: Peter Maydell <peter.maydell@linaro.org>
Date: Wed, 11 Oct 2017 10:57:42 +0100
Message-ID: <CAFEAcA8OzWu9KqA4MuTYst0o4K60wythCf0u7UuPHjp0q7NAxQ@mail.gmail.com>
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Subject: Re: [Qemu-devel] [PATCH 8/9] target/arm: Support some Thumb insns
 being always unconditional
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To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>, QEMU Developers <qemu-devel@nongnu.org>, "patches@linaro.org" <patches@linaro.org>, Richard Henderson <rth@twiddle.net>

On 11 October 2017 at 03:52, Richard Henderson
<richard.henderson@linaro.org> wrote:
> On 10/09/2017 06:48 AM, Peter Maydell wrote:
>> -    if (dc->condexec_mask) {
>> +    if (dc->condexec_mask && !thumb_insn_is_unconditional(dc, insn)) {
>>          uint32_t cond = dc->condexec_cond;
>>
>>          if (cond != 0x0e) {     /* Skip conditional when condition is AL. */
>
> Don't you still need to advance the condexec_mask?

Yes -- that happens after we've called disas_thumb{,2}_insn()
in thumb_tr_translate_insn().

This patch just makes always-unconditional insns behave
as if the condition is AL.

thanks
-- PMM