From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35665) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aK5Uf-0001dW-M3 for qemu-devel@nongnu.org; Fri, 15 Jan 2016 09:36:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aK5Ue-0003zZ-Mb for qemu-devel@nongnu.org; Fri, 15 Jan 2016 09:36:49 -0500 Received: from mail-vk0-x236.google.com ([2607:f8b0:400c:c05::236]:34895) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aK5Ue-0003zR-Hl for qemu-devel@nongnu.org; Fri, 15 Jan 2016 09:36:48 -0500 Received: by mail-vk0-x236.google.com with SMTP id k1so299211206vkb.2 for ; Fri, 15 Jan 2016 06:36:48 -0800 (PST) MIME-Version: 1.0 In-Reply-To: References: From: Peter Maydell Date: Fri, 15 Jan 2016 14:36:28 +0000 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v5 1/1] xlnx-zynqmp: Add support for high DDR memory regions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis Cc: Peter Crosthwaite , QEMU Developers On 12 January 2016 at 22:39, Alistair Francis wrote: > The Xilinx ZynqMP SoC and EP108 board supports three memory regions: > - A 2GB region starting at 0 > - A 32GB region starting at 32GB > - A 256GB region starting at 768GB > > This patch adds support for the first two memory regions, which is > automatically created based on the size specified by the QEMU memory > command line argument. > > On hardware the physical memory region is one continuous region, it is then > mapped into the three different regions by the DDRC. As we don't model the > DDRC this is done at startup by QEMU. The board creates the memory region and > then passes that memory region to the SoC. The SoC then maps the memory > regions. > > Signed-off-by: Alistair Francis > Reviewed-by: Peter Crosthwaite > --- > V5: > - Fix compilation on 32-bit host issue > V4: > - Small fixes > - Localisation of ram_size > V3: > - Assert on the RAM sizes > - Remove ram_size property > - General fixes > V2: > - Create one continuous memory region and pass it to the SoC Applied to target-arm.next, thanks. -- PMM