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From: Peter Maydell <peter.maydell@linaro.org>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
	Huacai Chen <chenhuacai@kernel.org>,
	QEMU Developers <qemu-devel@nongnu.org>,
	Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PULL 00/36] MIPS patches for 2021-05-02
Date: Tue, 4 May 2021 10:09:52 +0100	[thread overview]
Message-ID: <CAFEAcA8RB8Qrc5CwL9-3KcQ3qzEO5kxAh9GWCx1AvXQ_QtnntA@mail.gmail.com> (raw)
In-Reply-To: <20210502161538.534038-1-f4bug@amsat.org>

On Sun, 2 May 2021 at 17:20, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> The following changes since commit 53c5433e84e8935abed8e91d4a2eb813168a0ecf:
>
>   Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210501' into staging (2021-05-02 12:02:46 +0100)
>
> are available in the Git repository at:
>
>   https://github.com/philmd/qemu.git tags/mips-20210502
>
> for you to fetch changes up to 1c13514449439b5ff1f746ed0bf73b298da39cf0:
>
>   gitlab-ci: Add KVM mips64el cross-build jobs (2021-05-02 16:49:35 +0200)
>
> ----------------------------------------------------------------
> MIPS patches queue
>
> - Fix CACHEE opcode
> - Add missing CP0 checks to nanoMIPS RDPGPR / WRPGPR opcodes
> - Remove isa_get_irq() call in PIIX4 south bridge
> - Add various missing fields to the MIPS CPU migration vmstate
> - Lot of code moved around to allow TCG or KVM only builds
> - Restrict non-virtualized machines to TCG
> - Add KVM mips64el cross-build jobs to gitlab-ci
>
>
> scripts/checkpatch.pl false positive in patch 31
> "Move TLB management helpers to tcg/sysemu/tlb_helper.c":
>
> 4 checkpatch errors:
>
>   ERROR: space prohibited after that '&' (ctx:WxW)
>   #414: FILE: target/mips/tcg/sysemu/tlb_helper.c:71:
>   +    tlb->XI0 = (env->CP0_EntryLo0 >> CP0EnLo_XI) & 1;
>                                                     ^
>
>   ERROR: space prohibited after that '&' (ctx:WxW)
>   #415: FILE: target/mips/tcg/sysemu/tlb_helper.c:72:
>   +    tlb->RI0 = (env->CP0_EntryLo0 >> CP0EnLo_RI) & 1;
>                                                     ^
>
>   ERROR: space prohibited after that '&' (ctx:WxW)
>   #420: FILE: target/mips/tcg/sysemu/tlb_helper.c:77:
>   +    tlb->XI1 = (env->CP0_EntryLo1 >> CP0EnLo_XI) & 1;
>                                                     ^
>
>   ERROR: space prohibited after that '&' (ctx:WxW)
>   #421: FILE: target/mips/tcg/sysemu/tlb_helper.c:78:
>   +    tlb->RI1 = (env->CP0_EntryLo1 >> CP0EnLo_RI) & 1;
>                                                     ^
>
>   total: 4 errors, 0 warnings, 688 lines checked

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/6.1
for any user-visible changes.

-- PMM


      parent reply	other threads:[~2021-05-04  9:24 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-02 16:15 [PULL 00/36] MIPS patches for 2021-05-02 Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 02/36] target/mips: Fix CACHEE opcode (CACHE using EVA addressing) Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 03/36] target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 04/36] target/mips: Remove spurious LOG_UNIMP of MTHC0 opcode Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 05/36] target/mips: Migrate missing CPU fields Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 06/36] target/mips: Make check_cp0_enabled() return a boolean Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 07/36] target/mips: Simplify meson TCG rules Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 08/36] target/mips: Move IEEE rounding mode array to new source file Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 09/36] target/mips: Move msa_reset() " Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 10/36] target/mips: Make CPU/FPU regnames[] arrays global Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 11/36] target/mips: Optimize CPU/FPU regnames[] arrays Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 12/36] target/mips: Restrict mips_cpu_dump_state() to cpu.c Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 13/36] target/mips: Turn printfpr() macro into a proper function Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 14/36] target/mips: Declare mips_env_set_pc() inlined in "internal.h" Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 15/36] target/mips: Merge do_translate_address into cpu_mips_translate_address Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 16/36] target/mips: Extract load/store helpers to ldst_helper.c Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 17/36] meson: Introduce meson_user_arch source set for arch-specific user-mode Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 18/36] target/mips: Introduce tcg-internal.h for TCG specific declarations Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 19/36] target/mips: Add simple user-mode mips_cpu_do_interrupt() Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 20/36] target/mips: Add simple user-mode mips_cpu_tlb_fill() Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 21/36] target/mips: Move cpu_signal_handler definition around Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 22/36] target/mips: Move sysemu specific files under sysemu/ subfolder Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 23/36] target/mips: Move physical addressing code to sysemu/physaddr.c Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 24/36] target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 25/36] target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 26/36] target/mips: Restrict mmu_init() to TCG Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 27/36] target/mips: Move tlb_helper.c to tcg/sysemu/ Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 28/36] target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 29/36] target/mips: Move Special opcodes to tcg/sysemu/special_helper.c Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 30/36] target/mips: Move helper_cache() " Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 31/36] target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 32/36] target/mips: Move exception management code to exception.c Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 33/36] target/mips: Move CP0 helpers to sysemu/cp0.c Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 34/36] target/mips: Move TCG source files under tcg/ sub directory Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 35/36] hw/mips: Restrict non-virtualized machines to TCG Philippe Mathieu-Daudé
2021-05-02 16:15 ` [PULL 36/36] gitlab-ci: Add KVM mips64el cross-build jobs Philippe Mathieu-Daudé
2021-05-02 16:24 ` [PULL 00/36] MIPS patches for 2021-05-02 no-reply
2021-05-04  9:09 ` Peter Maydell [this message]

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