From: Peter Maydell <peter.maydell@linaro.org>
To: "Richard W.M. Jones" <rjones@redhat.com>
Cc: Andrea Bolognani <abologna@redhat.com>,
"palmer@sifive.com" <palmer@sifive.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"mjc@sifive.com" <mjc@sifive.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Alistair <alistair23@gmail.com>,
"stephen@eideticom.com" <stephen@eideticom.com>,
Edgar Iglesias <edgar.iglesias@xilinx.com>
Subject: Re: [Qemu-devel] [PATCH v5 0/5] Connect a PCIe host and graphics support to RISC-V
Date: Thu, 11 Oct 2018 13:00:05 +0100 [thread overview]
Message-ID: <CAFEAcA8RDvDdoTd6pgKi+P_XuGR_vAJor03rW6Cf5XZnahPqyQ@mail.gmail.com> (raw)
In-Reply-To: <20181011075544.GR27120@redhat.com>
On 11 October 2018 at 08:55, Richard W.M. Jones <rjones@redhat.com> wrote:
> Can we ignore non-PCIe guests? virtio-mmio should die.
I note that Edgar's recent Xilinx Versal patchset adds a
new user of virtio-mmio. If that statement is meant to
apply generally it might be worth starting the discussion
in that patchthread too.
thanks
-- PMM
next prev parent reply other threads:[~2018-10-11 12:00 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-04 20:06 [Qemu-devel] [PATCH v5 0/5] Connect a PCIe host and graphics support to RISC-V Alistair Francis
2018-10-04 20:06 ` [Qemu-devel] [PATCH v5 1/5] hw/riscv/virt: Increase the number of interrupts Alistair Francis
2018-10-04 20:06 ` [Qemu-devel] [PATCH v5 2/5] hw/riscv/virt: Connect the gpex PCIe Alistair Francis
2018-10-25 18:47 ` Peter Maydell
2018-10-30 21:39 ` Alistair Francis
2018-10-04 20:06 ` [Qemu-devel] [PATCH v5 3/5] riscv: Enable VGA and PCIE_VGA Alistair Francis
2018-10-04 20:06 ` [Qemu-devel] [PATCH v5 4/5] hw/riscv/sifive_u: Connect the Xilinx PCIe Alistair Francis
2018-10-04 20:06 ` [Qemu-devel] [PATCH v5 5/5] hw/riscv/virt: Connect a VirtIO net PCIe device Alistair Francis
2018-10-10 12:26 ` [Qemu-devel] [PATCH v5 0/5] Connect a PCIe host and graphics support to RISC-V Andrea Bolognani
2018-10-10 13:11 ` Stephen Bates
2018-10-10 13:43 ` Andrea Bolognani
2018-10-10 17:24 ` Stephen Bates
2018-10-10 17:32 ` Stephen Bates
2018-10-10 18:01 ` Alistair
2018-10-10 18:47 ` Stephen Bates
2018-10-10 19:53 ` Alistair
2018-10-11 5:45 ` Andrea Bolognani
2018-10-10 19:01 ` Stephen Bates
2018-10-10 19:55 ` Alistair
2018-10-10 17:57 ` Alistair
2018-10-11 5:59 ` Andrea Bolognani
2018-10-11 7:55 ` Richard W.M. Jones
2018-10-11 12:00 ` Peter Maydell [this message]
2018-10-11 8:01 ` Richard W.M. Jones
2018-10-11 11:45 ` Richard W.M. Jones
2018-10-11 12:15 ` Andrea Bolognani
2018-10-11 12:25 ` Stephen Bates
2018-10-11 17:40 ` Alistair Francis
2018-10-12 13:46 ` Andrea Bolognani
2018-10-12 16:12 ` Alistair Francis
2018-10-15 14:39 ` Andrea Bolognani
2018-10-15 16:59 ` Alistair Francis
2018-10-16 7:38 ` Andrea Bolognani
2018-10-16 14:11 ` Andrea Bolognani
2018-10-16 14:55 ` Andrea Bolognani
2018-10-16 17:31 ` Stephen Bates
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